1 /*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h
6 * Copyright (C) 2012-2014 LSI Corporation
7 * Copyright (C) 2013-2014 Avago Technologies
8 * (mailto: MPT-FusionLinux.pdl@avagotech.com)
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * NO WARRANTY
21 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
22 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
24 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
25 * solely responsible for determining the appropriateness of using and
26 * distributing the Program and assumes all risks associated with its
27 * exercise of rights under this Agreement, including but not limited to
28 * the risks and costs of program errors, damage to or loss of data,
29 * programs or equipment, and unavailability or interruption of operations.
30
31 * DISCLAIMER OF LIABILITY
32 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
36 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
37 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
38 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
39
40 * You should have received a copy of the GNU General Public License
41 * along with this program; if not, write to the Free Software
42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
43 * USA.
44 */
45
46 #ifndef MPT3SAS_BASE_H_INCLUDED
47 #define MPT3SAS_BASE_H_INCLUDED
48
49 #include "mpi/mpi2_type.h"
50 #include "mpi/mpi2.h"
51 #include "mpi/mpi2_ioc.h"
52 #include "mpi/mpi2_cnfg.h"
53 #include "mpi/mpi2_init.h"
54 #include "mpi/mpi2_raid.h"
55 #include "mpi/mpi2_tool.h"
56 #include "mpi/mpi2_sas.h"
57 #include "mpi/mpi2_pci.h"
58 #include "mpi/mpi2_image.h"
59
60 #include <scsi/scsi.h>
61 #include <scsi/scsi_cmnd.h>
62 #include <scsi/scsi_device.h>
63 #include <scsi/scsi_host.h>
64 #include <scsi/scsi_tcq.h>
65 #include <scsi/scsi_transport_sas.h>
66 #include <scsi/scsi_dbg.h>
67 #include <scsi/scsi_eh.h>
68 #include <linux/pci.h>
69 #include <linux/poll.h>
70 #include <linux/irq_poll.h>
71
72 #include "mpt3sas_debug.h"
73 #include "mpt3sas_trigger_diag.h"
74 #include "mpt3sas_trigger_pages.h"
75
76 /* driver versioning info */
77 #define MPT3SAS_DRIVER_NAME "mpt3sas"
78 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>"
79 #define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver"
80 #define MPT3SAS_DRIVER_VERSION "37.101.00.00"
81 #define MPT3SAS_MAJOR_VERSION 37
82 #define MPT3SAS_MINOR_VERSION 101
83 #define MPT3SAS_BUILD_VERSION 0
84 #define MPT3SAS_RELEASE_VERSION 00
85
86 #define MPT2SAS_DRIVER_NAME "mpt2sas"
87 #define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver"
88 #define MPT2SAS_DRIVER_VERSION "20.102.00.00"
89 #define MPT2SAS_MAJOR_VERSION 20
90 #define MPT2SAS_MINOR_VERSION 102
91 #define MPT2SAS_BUILD_VERSION 0
92 #define MPT2SAS_RELEASE_VERSION 00
93
94 /* CoreDump: Default timeout */
95 #define MPT3SAS_DEFAULT_COREDUMP_TIMEOUT_SECONDS (15) /*15 seconds*/
96 #define MPT3SAS_COREDUMP_LOOP_DONE (0xFF)
97 #define MPT3SAS_TIMESYNC_TIMEOUT_SECONDS (10) /* 10 seconds */
98 #define MPT3SAS_TIMESYNC_UPDATE_INTERVAL (900) /* 15 minutes */
99 #define MPT3SAS_TIMESYNC_UNIT_MASK (0x80) /* bit 7 */
100 #define MPT3SAS_TIMESYNC_MASK (0x7F) /* 0 - 6 bits */
101 #define SECONDS_PER_MIN (60)
102 #define SECONDS_PER_HOUR (3600)
103 #define MPT3SAS_COREDUMP_LOOP_DONE (0xFF)
104 #define MPI26_SET_IOC_PARAMETER_SYNC_TIMESTAMP (0x81)
105
106 /*
107 * Set MPT3SAS_SG_DEPTH value based on user input.
108 */
109 #define MPT_MAX_PHYS_SEGMENTS SG_CHUNK_SIZE
110 #define MPT_MIN_PHYS_SEGMENTS 16
111 #define MPT_KDUMP_MIN_PHYS_SEGMENTS 32
112
113 #define MCPU_MAX_CHAINS_PER_IO 3
114
115 #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE
116 #define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE
117 #else
118 #define MPT3SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
119 #endif
120
121 #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE
122 #define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE
123 #else
124 #define MPT2SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
125 #endif
126
127 /*
128 * Generic Defines
129 */
130 #define MPT3SAS_SATA_QUEUE_DEPTH 32
131 #define MPT3SAS_SAS_QUEUE_DEPTH 254
132 #define MPT3SAS_RAID_QUEUE_DEPTH 128
133 #define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200
134
135 #define MPT3SAS_RAID_MAX_SECTORS 8192
136 #define MPT3SAS_HOST_PAGE_SIZE_4K 12
137 #define MPT3SAS_NVME_QUEUE_DEPTH 128
138 #define MPT_NAME_LENGTH 32 /* generic length of strings */
139 #define MPT_STRING_LENGTH 64
140 #define MPI_FRAME_START_OFFSET 256
141 #define REPLY_FREE_POOL_SIZE 512 /*(32 maxcredix *4)*(4 times)*/
142
143 #define MPT_MAX_CALLBACKS 32
144
145 #define INTERNAL_CMDS_COUNT 10 /* reserved cmds */
146 /* reserved for issuing internally framed scsi io cmds */
147 #define INTERNAL_SCSIIO_CMDS_COUNT 3
148
149 #define MPI3_HIM_MASK 0xFFFFFFFF /* mask every bit*/
150
151 #define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF
152
153 #define MAX_CHAIN_ELEMT_SZ 16
154 #define DEFAULT_NUM_FWCHAIN_ELEMTS 8
155
156 #define IO_UNIT_CONTROL_SHUTDOWN_TIMEOUT 6
157 #define FW_IMG_HDR_READ_TIMEOUT 15
158
159 #define IOC_OPERATIONAL_WAIT_COUNT 10
160
161 /*
162 * NVMe defines
163 */
164 #define NVME_PRP_SIZE 8 /* PRP size */
165 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */
166 #define NVME_TASK_ABORT_MIN_TIMEOUT 6
167 #define NVME_TASK_ABORT_MAX_TIMEOUT 60
168 #define NVME_TASK_MNGT_CUSTOM_MASK (0x0010)
169 #define NVME_PRP_PAGE_SIZE 4096 /* Page size */
170
171 struct mpt3sas_nvme_cmd {
172 u8 rsvd[24];
173 __le64 prp1;
174 __le64 prp2;
175 };
176
177 /*
178 * logging format
179 */
180 #define ioc_err(ioc, fmt, ...) \
181 pr_err("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
182 #define ioc_notice(ioc, fmt, ...) \
183 pr_notice("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
184 #define ioc_warn(ioc, fmt, ...) \
185 pr_warn("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
186 #define ioc_info(ioc, fmt, ...) \
187 pr_info("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
188
189 /*
190 * WarpDrive Specific Log codes
191 */
192
193 #define MPT2_WARPDRIVE_LOGENTRY (0x8002)
194 #define MPT2_WARPDRIVE_LC_SSDT (0x41)
195 #define MPT2_WARPDRIVE_LC_SSDLW (0x43)
196 #define MPT2_WARPDRIVE_LC_SSDLF (0x44)
197 #define MPT2_WARPDRIVE_LC_BRMF (0x4D)
198
199 /*
200 * per target private data
201 */
202 #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01
203 #define MPT_TARGET_FLAGS_VOLUME 0x02
204 #define MPT_TARGET_FLAGS_DELETED 0x04
205 #define MPT_TARGET_FASTPATH_IO 0x08
206 #define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10
207
208 #define SAS2_PCI_DEVICE_B0_REVISION (0x01)
209 #define SAS3_PCI_DEVICE_C0_REVISION (0x02)
210
211 /* Atlas PCIe Switch Management Port */
212 #define MPI26_ATLAS_PCIe_SWITCH_DEVID (0x00B2)
213
214 /*
215 * Intel HBA branding
216 */
217 #define MPT2SAS_INTEL_RMS25JB080_BRANDING \
218 "Intel(R) Integrated RAID Module RMS25JB080"
219 #define MPT2SAS_INTEL_RMS25JB040_BRANDING \
220 "Intel(R) Integrated RAID Module RMS25JB040"
221 #define MPT2SAS_INTEL_RMS25KB080_BRANDING \
222 "Intel(R) Integrated RAID Module RMS25KB080"
223 #define MPT2SAS_INTEL_RMS25KB040_BRANDING \
224 "Intel(R) Integrated RAID Module RMS25KB040"
225 #define MPT2SAS_INTEL_RMS25LB040_BRANDING \
226 "Intel(R) Integrated RAID Module RMS25LB040"
227 #define MPT2SAS_INTEL_RMS25LB080_BRANDING \
228 "Intel(R) Integrated RAID Module RMS25LB080"
229 #define MPT2SAS_INTEL_RMS2LL080_BRANDING \
230 "Intel Integrated RAID Module RMS2LL080"
231 #define MPT2SAS_INTEL_RMS2LL040_BRANDING \
232 "Intel Integrated RAID Module RMS2LL040"
233 #define MPT2SAS_INTEL_RS25GB008_BRANDING \
234 "Intel(R) RAID Controller RS25GB008"
235 #define MPT2SAS_INTEL_SSD910_BRANDING \
236 "Intel(R) SSD 910 Series"
237
238 #define MPT3SAS_INTEL_RMS3JC080_BRANDING \
239 "Intel(R) Integrated RAID Module RMS3JC080"
240 #define MPT3SAS_INTEL_RS3GC008_BRANDING \
241 "Intel(R) RAID Controller RS3GC008"
242 #define MPT3SAS_INTEL_RS3FC044_BRANDING \
243 "Intel(R) RAID Controller RS3FC044"
244 #define MPT3SAS_INTEL_RS3UC080_BRANDING \
245 "Intel(R) RAID Controller RS3UC080"
246
247 /*
248 * Intel HBA SSDIDs
249 */
250 #define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516
251 #define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517
252 #define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518
253 #define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519
254 #define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A
255 #define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B
256 #define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E
257 #define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F
258 #define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000
259 #define MPT2SAS_INTEL_SSD910_SSDID 0x3700
260
261 #define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521
262 #define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522
263 #define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523
264 #define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524
265
266 /*
267 * Dell HBA branding
268 */
269 #define MPT2SAS_DELL_BRANDING_SIZE 32
270
271 #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING "Dell 6Gbps SAS HBA"
272 #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING "Dell PERC H200 Adapter"
273 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated"
274 #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING "Dell PERC H200 Modular"
275 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING "Dell PERC H200 Embedded"
276 #define MPT2SAS_DELL_PERC_H200_BRANDING "Dell PERC H200"
277 #define MPT2SAS_DELL_6GBPS_SAS_BRANDING "Dell 6Gbps SAS"
278
279 #define MPT3SAS_DELL_12G_HBA_BRANDING \
280 "Dell 12Gbps HBA"
281
282 /*
283 * Dell HBA SSDIDs
284 */
285 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C
286 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D
287 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E
288 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F
289 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20
290 #define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21
291 #define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22
292
293 #define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46
294
295 /*
296 * Cisco HBA branding
297 */
298 #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING \
299 "Cisco 9300-8E 12G SAS HBA"
300 #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING \
301 "Cisco 9300-8i 12G SAS HBA"
302 #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING \
303 "Cisco 12G Modular SAS Pass through Controller"
304 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING \
305 "UCS C3X60 12G SAS Pass through Controller"
306 /*
307 * Cisco HBA SSSDIDs
308 */
309 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C
310 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154
311 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155
312 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156
313
314 /*
315 * status bits for ioc->diag_buffer_status
316 */
317 #define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01)
318 #define MPT3_DIAG_BUFFER_IS_RELEASED (0x02)
319 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04)
320 #define MPT3_DIAG_BUFFER_IS_DRIVER_ALLOCATED (0x08)
321 #define MPT3_DIAG_BUFFER_IS_APP_OWNED (0x10)
322
323 /*
324 * HP HBA branding
325 */
326 #define MPT2SAS_HP_3PAR_SSVID 0x1590
327
328 #define MPT2SAS_HP_2_4_INTERNAL_BRANDING \
329 "HP H220 Host Bus Adapter"
330 #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING \
331 "HP H221 Host Bus Adapter"
332 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING \
333 "HP H222 Host Bus Adapter"
334 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING \
335 "HP H220i Host Bus Adapter"
336 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING \
337 "HP H210i Host Bus Adapter"
338
339 /*
340 * HO HBA SSDIDs
341 */
342 #define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041
343 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042
344 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043
345 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044
346 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046
347
348 /*
349 * Combined Reply Queue constants,
350 * There are twelve Supplemental Reply Post Host Index Registers
351 * and each register is at offset 0x10 bytes from the previous one.
352 */
353 #define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8)
354 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12
355 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 16
356 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10)
357
358 /* OEM Identifiers */
359 #define MFG10_OEM_ID_INVALID (0x00000000)
360 #define MFG10_OEM_ID_DELL (0x00000001)
361 #define MFG10_OEM_ID_FSC (0x00000002)
362 #define MFG10_OEM_ID_SUN (0x00000003)
363 #define MFG10_OEM_ID_IBM (0x00000004)
364
365 /* GENERIC Flags 0*/
366 #define MFG10_GF0_OCE_DISABLED (0x00000001)
367 #define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002)
368 #define MFG10_GF0_R10_DISPLAY (0x00000004)
369 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008)
370 #define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010)
371
372 #define VIRTUAL_IO_FAILED_RETRY (0x32010081)
373
374 /* High IOPs definitions */
375 #define MPT3SAS_DEVICE_HIGH_IOPS_DEPTH 8
376 #define MPT3SAS_HIGH_IOPS_REPLY_QUEUES 8
377 #define MPT3SAS_HIGH_IOPS_BATCH_COUNT 16
378 #define MPT3SAS_GEN35_MAX_MSIX_QUEUES 128
379 #define RDPQ_MAX_INDEX_IN_ONE_CHUNK 16
380
381 /* OEM Specific Flags will come from OEM specific header files */
382 struct Mpi2ManufacturingPage10_t {
383 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
384 U8 OEMIdentifier; /* 04h */
385 U8 Reserved1; /* 05h */
386 U16 Reserved2; /* 08h */
387 U32 Reserved3; /* 0Ch */
388 U32 GenericFlags0; /* 10h */
389 U32 GenericFlags1; /* 14h */
390 U32 Reserved4; /* 18h */
391 U32 OEMSpecificFlags0; /* 1Ch */
392 U32 OEMSpecificFlags1; /* 20h */
393 U32 Reserved5[18]; /* 24h - 60h*/
394 };
395
396
397 /* Miscellaneous options */
398 struct Mpi2ManufacturingPage11_t {
399 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
400 __le32 Reserved1; /* 04h */
401 u8 Reserved2; /* 08h */
402 u8 EEDPTagMode; /* 09h */
403 u8 Reserved3; /* 0Ah */
404 u8 Reserved4; /* 0Bh */
405 __le32 Reserved5[8]; /* 0Ch-2Ch */
406 u16 AddlFlags2; /* 2Ch */
407 u8 AddlFlags3; /* 2Eh */
408 u8 Reserved6; /* 2Fh */
409 __le32 Reserved7[7]; /* 30h - 4Bh */
410 u8 NVMeAbortTO; /* 4Ch */
411 u8 NumPerDevEvents; /* 4Dh */
412 u8 HostTraceBufferDecrementSizeKB; /* 4Eh */
413 u8 HostTraceBufferFlags; /* 4Fh */
414 u16 HostTraceBufferMaxSizeKB; /* 50h */
415 u16 HostTraceBufferMinSizeKB; /* 52h */
416 u8 CoreDumpTOSec; /* 54h */
417 u8 TimeSyncInterval; /* 55h */
418 u16 Reserved9; /* 56h */
419 __le32 Reserved10; /* 58h */
420 };
421
422 /**
423 * struct MPT3SAS_TARGET - starget private hostdata
424 * @starget: starget object
425 * @sas_address: target sas address
426 * @raid_device: raid_device pointer to access volume data
427 * @handle: device handle
428 * @num_luns: number luns
429 * @flags: MPT_TARGET_FLAGS_XXX flags
430 * @deleted: target flaged for deletion
431 * @tm_busy: target is busy with TM request.
432 * @port: hba port entry containing target's port number info
433 * @sas_dev: The sas_device associated with this target
434 * @pcie_dev: The pcie device associated with this target
435 */
436 struct MPT3SAS_TARGET {
437 struct scsi_target *starget;
438 u64 sas_address;
439 struct _raid_device *raid_device;
440 u16 handle;
441 int num_luns;
442 u32 flags;
443 u8 deleted;
444 u8 tm_busy;
445 struct hba_port *port;
446 struct _sas_device *sas_dev;
447 struct _pcie_device *pcie_dev;
448 };
449
450
451 /*
452 * per device private data
453 */
454 #define MPT_DEVICE_FLAGS_INIT 0x01
455
456 #define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003)
457 #define MFG_PAGE10_HIDE_ALL_DISKS (0x00)
458 #define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01)
459 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02)
460
461 /**
462 * struct MPT3SAS_DEVICE - sdev private hostdata
463 * @sas_target: starget private hostdata
464 * @lun: lun number
465 * @flags: MPT_DEVICE_XXX flags
466 * @configured_lun: lun is configured
467 * @block: device is in SDEV_BLOCK state
468 * @tlr_snoop_check: flag used in determining whether to disable TLR
469 * @eedp_enable: eedp support enable bit
470 * @eedp_type: 0(type_1), 1(type_2), 2(type_3)
471 * @eedp_block_length: block size
472 * @ata_command_pending: SATL passthrough outstanding for device
473 */
474 struct MPT3SAS_DEVICE {
475 struct MPT3SAS_TARGET *sas_target;
476 unsigned int lun;
477 u32 flags;
478 u8 configured_lun;
479 u8 block;
480 u8 tlr_snoop_check;
481 u8 ignore_delay_remove;
482 /* Iopriority Command Handling */
483 u8 ncq_prio_enable;
484 /*
485 * Bug workaround for SATL handling: the mpt2/3sas firmware
486 * doesn't return BUSY or TASK_SET_FULL for subsequent
487 * commands while a SATL pass through is in operation as the
488 * spec requires, it simply does nothing with them until the
489 * pass through completes, causing them possibly to timeout if
490 * the passthrough is a long executing command (like format or
491 * secure erase). This variable allows us to do the right
492 * thing while a SATL command is pending.
493 */
494 unsigned long ata_command_pending;
495
496 };
497
498 #define MPT3_CMD_NOT_USED 0x8000 /* free */
499 #define MPT3_CMD_COMPLETE 0x0001 /* completed */
500 #define MPT3_CMD_PENDING 0x0002 /* pending */
501 #define MPT3_CMD_REPLY_VALID 0x0004 /* reply is valid */
502 #define MPT3_CMD_RESET 0x0008 /* host reset dropped the command */
503
504 /**
505 * struct _internal_cmd - internal commands struct
506 * @mutex: mutex
507 * @done: completion
508 * @reply: reply message pointer
509 * @sense: sense data
510 * @status: MPT3_CMD_XXX status
511 * @smid: system message id
512 */
513 struct _internal_cmd {
514 struct mutex mutex;
515 struct completion done;
516 void *reply;
517 void *sense;
518 u16 status;
519 u16 smid;
520 };
521
522
523
524 /**
525 * struct _sas_device - attached device information
526 * @list: sas device list
527 * @starget: starget object
528 * @sas_address: device sas address
529 * @device_name: retrieved from the SAS IDENTIFY frame.
530 * @handle: device handle
531 * @sas_address_parent: sas address of parent expander or sas host
532 * @enclosure_handle: enclosure handle
533 * @enclosure_logical_id: enclosure logical identifier
534 * @volume_handle: volume handle (valid when hidden raid member)
535 * @volume_wwid: volume unique identifier
536 * @device_info: bitfield provides detailed info about the device
537 * @id: target id
538 * @channel: target channel
539 * @slot: number number
540 * @phy: phy identifier provided in sas device page 0
541 * @responding: used in _scsih_sas_device_mark_responding
542 * @fast_path: fast path feature enable bit
543 * @pfa_led_on: flag for PFA LED status
544 * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add()
545 * addition routine.
546 * @chassis_slot: chassis slot
547 * @is_chassis_slot_valid: chassis slot valid or not
548 * @port: hba port entry containing device's port number info
549 * @rphy: device's sas_rphy address used to identify this device structure in
550 * target_alloc callback function
551 */
552 struct _sas_device {
553 struct list_head list;
554 struct scsi_target *starget;
555 u64 sas_address;
556 u64 device_name;
557 u16 handle;
558 u64 sas_address_parent;
559 u16 enclosure_handle;
560 u64 enclosure_logical_id;
561 u16 volume_handle;
562 u64 volume_wwid;
563 u32 device_info;
564 int id;
565 int channel;
566 u16 slot;
567 u8 phy;
568 u8 responding;
569 u8 fast_path;
570 u8 pfa_led_on;
571 u8 pend_sas_rphy_add;
572 u8 enclosure_level;
573 u8 chassis_slot;
574 u8 is_chassis_slot_valid;
575 u8 connector_name[5];
576 struct kref refcount;
577 struct hba_port *port;
578 struct sas_rphy *rphy;
579 };
580
sas_device_get(struct _sas_device * s)581 static inline void sas_device_get(struct _sas_device *s)
582 {
583 kref_get(&s->refcount);
584 }
585
sas_device_free(struct kref * r)586 static inline void sas_device_free(struct kref *r)
587 {
588 kfree(container_of(r, struct _sas_device, refcount));
589 }
590
sas_device_put(struct _sas_device * s)591 static inline void sas_device_put(struct _sas_device *s)
592 {
593 kref_put(&s->refcount, sas_device_free);
594 }
595
596 /*
597 * struct _pcie_device - attached PCIe device information
598 * @list: pcie device list
599 * @starget: starget object
600 * @wwid: device WWID
601 * @handle: device handle
602 * @device_info: bitfield provides detailed info about the device
603 * @id: target id
604 * @channel: target channel
605 * @slot: slot number
606 * @port_num: port number
607 * @responding: used in _scsih_pcie_device_mark_responding
608 * @fast_path: fast path feature enable bit
609 * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for
610 * NVMe device only
611 * @enclosure_handle: enclosure handle
612 * @enclosure_logical_id: enclosure logical identifier
613 * @enclosure_level: The level of device's enclosure from the controller
614 * @connector_name: ASCII value of the Connector's name
615 * @serial_number: pointer of serial number string allocated runtime
616 * @access_status: Device's Access Status
617 * @shutdown_latency: NVMe device's RTD3 Entry Latency
618 * @refcount: reference count for deletion
619 */
620 struct _pcie_device {
621 struct list_head list;
622 struct scsi_target *starget;
623 u64 wwid;
624 u16 handle;
625 u32 device_info;
626 int id;
627 int channel;
628 u16 slot;
629 u8 port_num;
630 u8 responding;
631 u8 fast_path;
632 u32 nvme_mdts;
633 u16 enclosure_handle;
634 u64 enclosure_logical_id;
635 u8 enclosure_level;
636 u8 connector_name[4];
637 u8 *serial_number;
638 u8 reset_timeout;
639 u8 access_status;
640 u16 shutdown_latency;
641 struct kref refcount;
642 };
643 /**
644 * pcie_device_get - Increment the pcie device reference count
645 *
646 * @p: pcie_device object
647 *
648 * When ever this function called it will increment the
649 * reference count of the pcie device for which this function called.
650 *
651 */
pcie_device_get(struct _pcie_device * p)652 static inline void pcie_device_get(struct _pcie_device *p)
653 {
654 kref_get(&p->refcount);
655 }
656
657 /**
658 * pcie_device_free - Release the pcie device object
659 * @r - kref object
660 *
661 * Free's the pcie device object. It will be called when reference count
662 * reaches to zero.
663 */
pcie_device_free(struct kref * r)664 static inline void pcie_device_free(struct kref *r)
665 {
666 kfree(container_of(r, struct _pcie_device, refcount));
667 }
668
669 /**
670 * pcie_device_put - Decrement the pcie device reference count
671 *
672 * @p: pcie_device object
673 *
674 * When ever this function called it will decrement the
675 * reference count of the pcie device for which this function called.
676 *
677 * When refernce count reaches to Zero, this will call pcie_device_free to the
678 * pcie_device object.
679 */
pcie_device_put(struct _pcie_device * p)680 static inline void pcie_device_put(struct _pcie_device *p)
681 {
682 kref_put(&p->refcount, pcie_device_free);
683 }
684 /**
685 * struct _raid_device - raid volume link list
686 * @list: sas device list
687 * @starget: starget object
688 * @sdev: scsi device struct (volumes are single lun)
689 * @wwid: unique identifier for the volume
690 * @handle: device handle
691 * @block_size: Block size of the volume
692 * @id: target id
693 * @channel: target channel
694 * @volume_type: the raid level
695 * @device_info: bitfield provides detailed info about the hidden components
696 * @num_pds: number of hidden raid components
697 * @responding: used in _scsih_raid_device_mark_responding
698 * @percent_complete: resync percent complete
699 * @direct_io_enabled: Whether direct io to PDs are allowed or not
700 * @stripe_exponent: X where 2powX is the stripe sz in blocks
701 * @block_exponent: X where 2powX is the block sz in bytes
702 * @max_lba: Maximum number of LBA in the volume
703 * @stripe_sz: Stripe Size of the volume
704 * @device_info: Device info of the volume member disk
705 * @pd_handle: Array of handles of the physical drives for direct I/O in le16
706 */
707 #define MPT_MAX_WARPDRIVE_PDS 8
708 struct _raid_device {
709 struct list_head list;
710 struct scsi_target *starget;
711 struct scsi_device *sdev;
712 u64 wwid;
713 u16 handle;
714 u16 block_sz;
715 int id;
716 int channel;
717 u8 volume_type;
718 u8 num_pds;
719 u8 responding;
720 u8 percent_complete;
721 u8 direct_io_enabled;
722 u8 stripe_exponent;
723 u8 block_exponent;
724 u64 max_lba;
725 u32 stripe_sz;
726 u32 device_info;
727 u16 pd_handle[MPT_MAX_WARPDRIVE_PDS];
728 };
729
730 /**
731 * struct _boot_device - boot device info
732 *
733 * @channel: sas, raid, or pcie channel
734 * @device: holds pointer for struct _sas_device, struct _raid_device or
735 * struct _pcie_device
736 */
737 struct _boot_device {
738 int channel;
739 void *device;
740 };
741
742 /**
743 * struct _sas_port - wide/narrow sas port information
744 * @port_list: list of ports belonging to expander
745 * @num_phys: number of phys belonging to this port
746 * @remote_identify: attached device identification
747 * @rphy: sas transport rphy object
748 * @port: sas transport wide/narrow port object
749 * @hba_port: hba port entry containing port's port number info
750 * @phy_list: _sas_phy list objects belonging to this port
751 */
752 struct _sas_port {
753 struct list_head port_list;
754 u8 num_phys;
755 struct sas_identify remote_identify;
756 struct sas_rphy *rphy;
757 struct sas_port *port;
758 struct hba_port *hba_port;
759 struct list_head phy_list;
760 };
761
762 /**
763 * struct _sas_phy - phy information
764 * @port_siblings: list of phys belonging to a port
765 * @identify: phy identification
766 * @remote_identify: attached device identification
767 * @phy: sas transport phy object
768 * @phy_id: unique phy id
769 * @handle: device handle for this phy
770 * @attached_handle: device handle for attached device
771 * @phy_belongs_to_port: port has been created for this phy
772 * @port: hba port entry containing port number info
773 */
774 struct _sas_phy {
775 struct list_head port_siblings;
776 struct sas_identify identify;
777 struct sas_identify remote_identify;
778 struct sas_phy *phy;
779 u8 phy_id;
780 u16 handle;
781 u16 attached_handle;
782 u8 phy_belongs_to_port;
783 u8 hba_vphy;
784 struct hba_port *port;
785 };
786
787 /**
788 * struct _sas_node - sas_host/expander information
789 * @list: list of expanders
790 * @parent_dev: parent device class
791 * @num_phys: number phys belonging to this sas_host/expander
792 * @sas_address: sas address of this sas_host/expander
793 * @handle: handle for this sas_host/expander
794 * @sas_address_parent: sas address of parent expander or sas host
795 * @enclosure_handle: handle for this a member of an enclosure
796 * @device_info: bitwise defining capabilities of this sas_host/expander
797 * @responding: used in _scsih_expander_device_mark_responding
798 * @phy: a list of phys that make up this sas_host/expander
799 * @sas_port_list: list of ports attached to this sas_host/expander
800 * @port: hba port entry containing node's port number info
801 * @rphy: sas_rphy object of this expander
802 */
803 struct _sas_node {
804 struct list_head list;
805 struct device *parent_dev;
806 u8 num_phys;
807 u64 sas_address;
808 u16 handle;
809 u64 sas_address_parent;
810 u16 enclosure_handle;
811 u64 enclosure_logical_id;
812 u8 responding;
813 struct hba_port *port;
814 struct _sas_phy *phy;
815 struct list_head sas_port_list;
816 struct sas_rphy *rphy;
817 };
818
819 /**
820 * struct _enclosure_node - enclosure information
821 * @list: list of enclosures
822 * @pg0: enclosure pg0;
823 */
824 struct _enclosure_node {
825 struct list_head list;
826 Mpi2SasEnclosurePage0_t pg0;
827 };
828
829 /**
830 * enum reset_type - reset state
831 * @FORCE_BIG_HAMMER: issue diagnostic reset
832 * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer
833 */
834 enum reset_type {
835 FORCE_BIG_HAMMER,
836 SOFT_RESET,
837 };
838
839 /**
840 * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O)
841 * @pcie_sgl: PCIe native SGL for NVMe devices
842 * @pcie_sgl_dma: physical address
843 */
844 struct pcie_sg_list {
845 void *pcie_sgl;
846 dma_addr_t pcie_sgl_dma;
847 };
848
849 /**
850 * struct chain_tracker - firmware chain tracker
851 * @chain_buffer: chain buffer
852 * @chain_buffer_dma: physical address
853 * @tracker_list: list of free request (ioc->free_chain_list)
854 */
855 struct chain_tracker {
856 void *chain_buffer;
857 dma_addr_t chain_buffer_dma;
858 };
859
860 struct chain_lookup {
861 struct chain_tracker *chains_per_smid;
862 atomic_t chain_offset;
863 };
864
865 /**
866 * struct scsiio_tracker - scsi mf request tracker
867 * @smid: system message id
868 * @cb_idx: callback index
869 * @direct_io: To indicate whether I/O is direct (WARPDRIVE)
870 * @chain_list: list of associated firmware chain tracker
871 * @msix_io: IO's msix
872 */
873 struct scsiio_tracker {
874 u16 smid;
875 struct scsi_cmnd *scmd;
876 u8 cb_idx;
877 u8 direct_io;
878 struct pcie_sg_list pcie_sg_list;
879 struct list_head chain_list;
880 u16 msix_io;
881 };
882
883 /**
884 * struct request_tracker - firmware request tracker
885 * @smid: system message id
886 * @cb_idx: callback index
887 * @tracker_list: list of free request (ioc->free_list)
888 */
889 struct request_tracker {
890 u16 smid;
891 u8 cb_idx;
892 struct list_head tracker_list;
893 };
894
895 /**
896 * struct _tr_list - target reset list
897 * @handle: device handle
898 * @state: state machine
899 */
900 struct _tr_list {
901 struct list_head list;
902 u16 handle;
903 u16 state;
904 };
905
906 /**
907 * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list
908 * @handle: device handle
909 */
910 struct _sc_list {
911 struct list_head list;
912 u16 handle;
913 };
914
915 /**
916 * struct _event_ack_list - delayed event acknowledgment list
917 * @Event: Event ID
918 * @EventContext: used to track the event uniquely
919 */
920 struct _event_ack_list {
921 struct list_head list;
922 U16 Event;
923 U32 EventContext;
924 };
925
926 /**
927 * struct adapter_reply_queue - the reply queue struct
928 * @ioc: per adapter object
929 * @msix_index: msix index into vector table
930 * @vector: irq vector
931 * @reply_post_host_index: head index in the pool where FW completes IO
932 * @reply_post_free: reply post base virt address
933 * @name: the name registered to request_irq()
934 * @busy: isr is actively processing replies on another cpu
935 * @os_irq: irq number
936 * @irqpoll: irq_poll object
937 * @irq_poll_scheduled: Tells whether irq poll is scheduled or not
938 * @list: this list
939 */
940 struct adapter_reply_queue {
941 struct MPT3SAS_ADAPTER *ioc;
942 u8 msix_index;
943 u32 reply_post_host_index;
944 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
945 char name[MPT_NAME_LENGTH];
946 atomic_t busy;
947 u32 os_irq;
948 struct irq_poll irqpoll;
949 bool irq_poll_scheduled;
950 bool irq_line_enable;
951 struct list_head list;
952 };
953
954 typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
955
956 /* SAS3.0 support */
957 typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc,
958 struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device);
959 typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge,
960 dma_addr_t data_out_dma, size_t data_out_sz,
961 dma_addr_t data_in_dma, size_t data_in_sz);
962 typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc,
963 void *paddr);
964
965 /* SAS3.5 support */
966 typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid,
967 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request,
968 dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
969 size_t data_in_sz);
970
971 /* To support atomic and non atomic descriptors*/
972 typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid,
973 u16 funcdep);
974 typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid);
975 typedef u32 (*BASE_READ_REG) (const volatile void __iomem *addr);
976 /*
977 * To get high iops reply queue's msix index when high iops mode is enabled
978 * else get the msix index of general reply queues.
979 */
980 typedef u8 (*GET_MSIX_INDEX) (struct MPT3SAS_ADAPTER *ioc,
981 struct scsi_cmnd *scmd);
982
983 /* IOC Facts and Port Facts converted from little endian to cpu */
984 union mpi3_version_union {
985 MPI2_VERSION_STRUCT Struct;
986 u32 Word;
987 };
988
989 struct mpt3sas_facts {
990 u16 MsgVersion;
991 u16 HeaderVersion;
992 u8 IOCNumber;
993 u8 VP_ID;
994 u8 VF_ID;
995 u16 IOCExceptions;
996 u16 IOCStatus;
997 u32 IOCLogInfo;
998 u8 MaxChainDepth;
999 u8 WhoInit;
1000 u8 NumberOfPorts;
1001 u8 MaxMSIxVectors;
1002 u16 RequestCredit;
1003 u16 ProductID;
1004 u32 IOCCapabilities;
1005 union mpi3_version_union FWVersion;
1006 u16 IOCRequestFrameSize;
1007 u16 IOCMaxChainSegmentSize;
1008 u16 MaxInitiators;
1009 u16 MaxTargets;
1010 u16 MaxSasExpanders;
1011 u16 MaxEnclosures;
1012 u16 ProtocolFlags;
1013 u16 HighPriorityCredit;
1014 u16 MaxReplyDescriptorPostQueueDepth;
1015 u8 ReplyFrameSize;
1016 u8 MaxVolumes;
1017 u16 MaxDevHandle;
1018 u16 MaxPersistentEntries;
1019 u16 MinDevHandle;
1020 u8 CurrentHostPageSize;
1021 };
1022
1023 struct mpt3sas_port_facts {
1024 u8 PortNumber;
1025 u8 VP_ID;
1026 u8 VF_ID;
1027 u8 PortType;
1028 u16 MaxPostedCmdBuffers;
1029 };
1030
1031 struct reply_post_struct {
1032 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
1033 dma_addr_t reply_post_free_dma;
1034 };
1035
1036 /**
1037 * struct virtual_phy - vSES phy structure
1038 * sas_address: SAS Address of vSES device
1039 * phy_mask: vSES device's phy number
1040 * flags: flags used to manage this structure
1041 */
1042 struct virtual_phy {
1043 struct list_head list;
1044 u64 sas_address;
1045 u32 phy_mask;
1046 u8 flags;
1047 };
1048
1049 #define MPT_VPHY_FLAG_DIRTY_PHY 0x01
1050
1051 /**
1052 * struct hba_port - Saves each HBA's Wide/Narrow port info
1053 * @sas_address: sas address of this wide/narrow port's attached device
1054 * @phy_mask: HBA PHY's belonging to this port
1055 * @port_id: port number
1056 * @flags: hba port flags
1057 * @vphys_mask : mask of vSES devices Phy number
1058 * @vphys_list : list containing vSES device structures
1059 */
1060 struct hba_port {
1061 struct list_head list;
1062 u64 sas_address;
1063 u32 phy_mask;
1064 u8 port_id;
1065 u8 flags;
1066 u32 vphys_mask;
1067 struct list_head vphys_list;
1068 };
1069
1070 /* hba port flags */
1071 #define HBA_PORT_FLAG_DIRTY_PORT 0x01
1072 #define HBA_PORT_FLAG_NEW_PORT 0x02
1073
1074 #define MULTIPATH_DISABLED_PORT_ID 0xFF
1075
1076 /**
1077 * struct htb_rel_query - diagnostic buffer release reason
1078 * @unique_id - unique id associated with this buffer.
1079 * @buffer_rel_condition - Release condition ioctl/sysfs/reset
1080 * @reserved
1081 * @trigger_type - Master/Event/scsi/MPI
1082 * @trigger_info_dwords - Data Correspondig to trigger type
1083 */
1084 struct htb_rel_query {
1085 u16 buffer_rel_condition;
1086 u16 reserved;
1087 u32 trigger_type;
1088 u32 trigger_info_dwords[2];
1089 };
1090
1091 /* Buffer_rel_condition bit fields */
1092
1093 /* Bit 0 - Diag Buffer not Released */
1094 #define MPT3_DIAG_BUFFER_NOT_RELEASED (0x00)
1095 /* Bit 0 - Diag Buffer Released */
1096 #define MPT3_DIAG_BUFFER_RELEASED (0x01)
1097
1098 /*
1099 * Bit 1 - Diag Buffer Released by IOCTL,
1100 * This bit is valid only if Bit 0 is one
1101 */
1102 #define MPT3_DIAG_BUFFER_REL_IOCTL (0x02 | MPT3_DIAG_BUFFER_RELEASED)
1103
1104 /*
1105 * Bit 2 - Diag Buffer Released by Trigger,
1106 * This bit is valid only if Bit 0 is one
1107 */
1108 #define MPT3_DIAG_BUFFER_REL_TRIGGER (0x04 | MPT3_DIAG_BUFFER_RELEASED)
1109
1110 /*
1111 * Bit 3 - Diag Buffer Released by SysFs,
1112 * This bit is valid only if Bit 0 is one
1113 */
1114 #define MPT3_DIAG_BUFFER_REL_SYSFS (0x08 | MPT3_DIAG_BUFFER_RELEASED)
1115
1116 /* DIAG RESET Master trigger flags */
1117 #define MPT_DIAG_RESET_ISSUED_BY_DRIVER 0x00000000
1118 #define MPT_DIAG_RESET_ISSUED_BY_USER 0x00000001
1119
1120 typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
1121 /**
1122 * struct MPT3SAS_ADAPTER - per adapter struct
1123 * @list: ioc_list
1124 * @shost: shost object
1125 * @id: unique adapter id
1126 * @cpu_count: number online cpus
1127 * @name: generic ioc string
1128 * @tmp_string: tmp string used for logging
1129 * @pdev: pci pdev object
1130 * @pio_chip: physical io register space
1131 * @chip: memory mapped register space
1132 * @chip_phys: physical addrss prior to mapping
1133 * @logging_level: see mpt3sas_debug.h
1134 * @fwfault_debug: debuging FW timeouts
1135 * @ir_firmware: IR firmware present
1136 * @bars: bitmask of BAR's that must be configured
1137 * @mask_interrupts: ignore interrupt
1138 * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and
1139 * pci resource handling
1140 * @fault_reset_work_q_name: fw fault work queue
1141 * @fault_reset_work_q: ""
1142 * @fault_reset_work: ""
1143 * @firmware_event_name: fw event work queue
1144 * @firmware_event_thread: ""
1145 * @fw_event_lock:
1146 * @fw_event_list: list of fw events
1147 * @current_evet: current processing firmware event
1148 * @fw_event_cleanup: set to one while cleaning up the fw events
1149 * @aen_event_read_flag: event log was read
1150 * @broadcast_aen_busy: broadcast aen waiting to be serviced
1151 * @shost_recovery: host reset in progress
1152 * @ioc_reset_in_progress_lock:
1153 * @ioc_link_reset_in_progress: phy/hard reset in progress
1154 * @ignore_loginfos: ignore loginfos during task management
1155 * @remove_host: flag for when driver unloads, to avoid sending dev resets
1156 * @pci_error_recovery: flag to prevent ioc access until slot reset completes
1157 * @wait_for_discovery_to_complete: flag set at driver load time when
1158 * waiting on reporting devices
1159 * @is_driver_loading: flag set at driver load time
1160 * @port_enable_failed: flag set when port enable has failed
1161 * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work
1162 * @start_scan_failed: means port enable failed, return's the ioc_status
1163 * @msix_enable: flag indicating msix is enabled
1164 * @msix_vector_count: number msix vectors
1165 * @cpu_msix_table: table for mapping cpus to msix index
1166 * @cpu_msix_table_sz: table size
1167 * @total_io_cnt: Gives total IO count, used to load balance the interrupts
1168 * @ioc_coredump_loop: will have non-zero value when FW is in CoreDump state
1169 * @timestamp_update_count: Counter to fire timeSync command
1170 * time_sync_interval: Time sync interval read from man page 11
1171 * @high_iops_outstanding: used to load balance the interrupts
1172 * within high iops reply queues
1173 * @msix_load_balance: Enables load balancing of interrupts across
1174 * the multiple MSIXs
1175 * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands
1176 * @thresh_hold: Max number of reply descriptors processed
1177 * before updating Host Index
1178 * @drv_support_bitmap: driver's supported feature bit map
1179 * @use_32bit_dma: Flag to use 32 bit consistent dma mask
1180 * @scsi_io_cb_idx: shost generated commands
1181 * @tm_cb_idx: task management commands
1182 * @scsih_cb_idx: scsih internal commands
1183 * @transport_cb_idx: transport internal commands
1184 * @ctl_cb_idx: clt internal commands
1185 * @base_cb_idx: base internal commands
1186 * @config_cb_idx: base internal commands
1187 * @tm_tr_cb_idx : device removal target reset handshake
1188 * @tm_tr_volume_cb_idx : volume removal target reset
1189 * @base_cmds:
1190 * @transport_cmds:
1191 * @scsih_cmds:
1192 * @tm_cmds:
1193 * @ctl_cmds:
1194 * @config_cmds:
1195 * @base_add_sg_single: handler for either 32/64 bit sgl's
1196 * @event_type: bits indicating which events to log
1197 * @event_context: unique id for each logged event
1198 * @event_log: event log pointer
1199 * @event_masks: events that are masked
1200 * @max_shutdown_latency: timeout value for NVMe shutdown operation,
1201 * which is equal that NVMe drive's RTD3 Entry Latency
1202 * which has reported maximum RTD3 Entry Latency value
1203 * among attached NVMe drives.
1204 * @facts: static facts data
1205 * @prev_fw_facts: previous fw facts data
1206 * @pfacts: static port facts data
1207 * @manu_pg0: static manufacturing page 0
1208 * @manu_pg10: static manufacturing page 10
1209 * @manu_pg11: static manufacturing page 11
1210 * @bios_pg2: static bios page 2
1211 * @bios_pg3: static bios page 3
1212 * @ioc_pg8: static ioc page 8
1213 * @iounit_pg0: static iounit page 0
1214 * @iounit_pg1: static iounit page 1
1215 * @iounit_pg8: static iounit page 8
1216 * @sas_hba: sas host object
1217 * @sas_expander_list: expander object list
1218 * @enclosure_list: enclosure object list
1219 * @sas_node_lock:
1220 * @sas_device_list: sas device object list
1221 * @sas_device_init_list: sas device object list (used only at init time)
1222 * @sas_device_lock:
1223 * @pcie_device_list: pcie device object list
1224 * @pcie_device_init_list: pcie device object list (used only at init time)
1225 * @pcie_device_lock:
1226 * @io_missing_delay: time for IO completed by fw when PDR enabled
1227 * @device_missing_delay: time for device missing by fw when PDR enabled
1228 * @sas_id : used for setting volume target IDs
1229 * @pcie_target_id: used for setting pcie target IDs
1230 * @blocking_handles: bitmask used to identify which devices need blocking
1231 * @pd_handles : bitmask for PD handles
1232 * @pd_handles_sz : size of pd_handle bitmask
1233 * @config_page_sz: config page size
1234 * @config_page: reserve memory for config page payload
1235 * @config_page_dma:
1236 * @hba_queue_depth: hba request queue depth
1237 * @sge_size: sg element size for either 32/64 bit
1238 * @scsiio_depth: SCSI_IO queue depth
1239 * @request_sz: per request frame size
1240 * @request: pool of request frames
1241 * @request_dma:
1242 * @request_dma_sz:
1243 * @scsi_lookup: firmware request tracker list
1244 * @scsi_lookup_lock:
1245 * @free_list: free list of request
1246 * @pending_io_count:
1247 * @reset_wq:
1248 * @chain: pool of chains
1249 * @chain_dma:
1250 * @max_sges_in_main_message: number sg elements in main message
1251 * @max_sges_in_chain_message: number sg elements per chain
1252 * @chains_needed_per_io: max chains per io
1253 * @chain_depth: total chains allocated
1254 * @chain_segment_sz: gives the max number of
1255 * SGEs accommodate on single chain buffer
1256 * @hi_priority_smid:
1257 * @hi_priority:
1258 * @hi_priority_dma:
1259 * @hi_priority_depth:
1260 * @hpr_lookup:
1261 * @hpr_free_list:
1262 * @internal_smid:
1263 * @internal:
1264 * @internal_dma:
1265 * @internal_depth:
1266 * @internal_lookup:
1267 * @internal_free_list:
1268 * @sense: pool of sense
1269 * @sense_dma:
1270 * @sense_dma_pool:
1271 * @reply_depth: hba reply queue depth:
1272 * @reply_sz: per reply frame size:
1273 * @reply: pool of replys:
1274 * @reply_dma:
1275 * @reply_dma_pool:
1276 * @reply_free_queue_depth: reply free depth
1277 * @reply_free: pool for reply free queue (32 bit addr)
1278 * @reply_free_dma:
1279 * @reply_free_dma_pool:
1280 * @reply_free_host_index: tail index in pool to insert free replys
1281 * @reply_post_queue_depth: reply post queue depth
1282 * @reply_post_struct: struct for reply_post_free physical & virt address
1283 * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init
1284 * @rdpq_array_enable: rdpq_array support is enabled in the driver
1285 * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag
1286 * is assigned only ones
1287 * @reply_queue_count: number of reply queue's
1288 * @reply_queue_list: link list contaning the reply queue info
1289 * @msix96_vector: 96 MSI-X vector support
1290 * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue
1291 * @delayed_tr_list: target reset link list
1292 * @delayed_tr_volume_list: volume target reset link list
1293 * @delayed_sc_list:
1294 * @delayed_event_ack_list:
1295 * @temp_sensors_count: flag to carry the number of temperature sensors
1296 * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and
1297 * pci resource handling. PCI resource freeing will lead to free
1298 * vital hardware/memory resource, which might be in use by cli/sysfs
1299 * path functions resulting in Null pointer reference followed by kernel
1300 * crash. To avoid the above race condition we use mutex syncrhonization
1301 * which ensures the syncrhonization between cli/sysfs_show path.
1302 * @atomic_desc_capable: Atomic Request Descriptor support.
1303 * @GET_MSIX_INDEX: Get the msix index of high iops queues.
1304 * @multipath_on_hba: flag to determine multipath on hba is enabled or not
1305 * @port_table_list: list containing HBA's wide/narrow port's info
1306 */
1307 struct MPT3SAS_ADAPTER {
1308 struct list_head list;
1309 struct Scsi_Host *shost;
1310 u8 id;
1311 int cpu_count;
1312 char name[MPT_NAME_LENGTH];
1313 char driver_name[MPT_NAME_LENGTH - 8];
1314 char tmp_string[MPT_STRING_LENGTH];
1315 struct pci_dev *pdev;
1316 Mpi2SystemInterfaceRegs_t __iomem *chip;
1317 phys_addr_t chip_phys;
1318 int logging_level;
1319 int fwfault_debug;
1320 u8 ir_firmware;
1321 int bars;
1322 u8 mask_interrupts;
1323
1324 /* fw fault handler */
1325 char fault_reset_work_q_name[20];
1326 struct workqueue_struct *fault_reset_work_q;
1327 struct delayed_work fault_reset_work;
1328
1329 /* fw event handler */
1330 char firmware_event_name[20];
1331 struct workqueue_struct *firmware_event_thread;
1332 spinlock_t fw_event_lock;
1333 struct list_head fw_event_list;
1334 struct fw_event_work *current_event;
1335 u8 fw_events_cleanup;
1336
1337 /* misc flags */
1338 int aen_event_read_flag;
1339 u8 broadcast_aen_busy;
1340 u16 broadcast_aen_pending;
1341 u8 shost_recovery;
1342 u8 got_task_abort_from_ioctl;
1343
1344 struct mutex reset_in_progress_mutex;
1345 spinlock_t ioc_reset_in_progress_lock;
1346 u8 ioc_link_reset_in_progress;
1347
1348 u8 ignore_loginfos;
1349 u8 remove_host;
1350 u8 pci_error_recovery;
1351 u8 wait_for_discovery_to_complete;
1352 u8 is_driver_loading;
1353 u8 port_enable_failed;
1354 u8 start_scan;
1355 u16 start_scan_failed;
1356
1357 u8 msix_enable;
1358 u16 msix_vector_count;
1359 u8 *cpu_msix_table;
1360 u16 cpu_msix_table_sz;
1361 resource_size_t __iomem **reply_post_host_index;
1362 u32 ioc_reset_count;
1363 MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
1364 u32 non_operational_loop;
1365 u8 ioc_coredump_loop;
1366 u32 timestamp_update_count;
1367 u32 time_sync_interval;
1368 atomic64_t total_io_cnt;
1369 atomic64_t high_iops_outstanding;
1370 bool msix_load_balance;
1371 u16 thresh_hold;
1372 u8 high_iops_queues;
1373 u32 drv_support_bitmap;
1374 u32 dma_mask;
1375 bool enable_sdev_max_qd;
1376 bool use_32bit_dma;
1377
1378 /* internal commands, callback index */
1379 u8 scsi_io_cb_idx;
1380 u8 tm_cb_idx;
1381 u8 transport_cb_idx;
1382 u8 scsih_cb_idx;
1383 u8 ctl_cb_idx;
1384 u8 base_cb_idx;
1385 u8 port_enable_cb_idx;
1386 u8 config_cb_idx;
1387 u8 tm_tr_cb_idx;
1388 u8 tm_tr_volume_cb_idx;
1389 u8 tm_sas_control_cb_idx;
1390 struct _internal_cmd base_cmds;
1391 struct _internal_cmd port_enable_cmds;
1392 struct _internal_cmd transport_cmds;
1393 struct _internal_cmd scsih_cmds;
1394 struct _internal_cmd tm_cmds;
1395 struct _internal_cmd ctl_cmds;
1396 struct _internal_cmd config_cmds;
1397
1398 MPT_ADD_SGE base_add_sg_single;
1399
1400 /* function ptr for either IEEE or MPI sg elements */
1401 MPT_BUILD_SG_SCMD build_sg_scmd;
1402 MPT_BUILD_SG build_sg;
1403 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge;
1404 u16 sge_size_ieee;
1405 u16 hba_mpi_version_belonged;
1406
1407 /* function ptr for MPI sg elements only */
1408 MPT_BUILD_SG build_sg_mpi;
1409 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi;
1410
1411 /* function ptr for NVMe PRP elements only */
1412 NVME_BUILD_PRP build_nvme_prp;
1413
1414 /* event log */
1415 u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1416 u32 event_context;
1417 void *event_log;
1418 u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1419
1420 u8 tm_custom_handling;
1421 u8 nvme_abort_timeout;
1422 u16 max_shutdown_latency;
1423
1424 /* static config pages */
1425 struct mpt3sas_facts facts;
1426 struct mpt3sas_facts prev_fw_facts;
1427 struct mpt3sas_port_facts *pfacts;
1428 Mpi2ManufacturingPage0_t manu_pg0;
1429 struct Mpi2ManufacturingPage10_t manu_pg10;
1430 struct Mpi2ManufacturingPage11_t manu_pg11;
1431 Mpi2BiosPage2_t bios_pg2;
1432 Mpi2BiosPage3_t bios_pg3;
1433 Mpi2IOCPage8_t ioc_pg8;
1434 Mpi2IOUnitPage0_t iounit_pg0;
1435 Mpi2IOUnitPage1_t iounit_pg1;
1436 Mpi2IOUnitPage8_t iounit_pg8;
1437 Mpi2IOCPage1_t ioc_pg1_copy;
1438
1439 struct _boot_device req_boot_device;
1440 struct _boot_device req_alt_boot_device;
1441 struct _boot_device current_boot_device;
1442
1443 /* sas hba, expander, and device list */
1444 struct _sas_node sas_hba;
1445 struct list_head sas_expander_list;
1446 struct list_head enclosure_list;
1447 spinlock_t sas_node_lock;
1448 struct list_head sas_device_list;
1449 struct list_head sas_device_init_list;
1450 spinlock_t sas_device_lock;
1451 struct list_head pcie_device_list;
1452 struct list_head pcie_device_init_list;
1453 spinlock_t pcie_device_lock;
1454
1455 struct list_head raid_device_list;
1456 spinlock_t raid_device_lock;
1457 u8 io_missing_delay;
1458 u16 device_missing_delay;
1459 int sas_id;
1460 int pcie_target_id;
1461
1462 void *blocking_handles;
1463 void *pd_handles;
1464 u16 pd_handles_sz;
1465
1466 void *pend_os_device_add;
1467 u16 pend_os_device_add_sz;
1468
1469 /* config page */
1470 u16 config_page_sz;
1471 void *config_page;
1472 dma_addr_t config_page_dma;
1473 void *config_vaddr;
1474
1475 /* scsiio request */
1476 u16 hba_queue_depth;
1477 u16 sge_size;
1478 u16 scsiio_depth;
1479 u16 request_sz;
1480 u8 *request;
1481 dma_addr_t request_dma;
1482 u32 request_dma_sz;
1483 struct pcie_sg_list *pcie_sg_lookup;
1484 spinlock_t scsi_lookup_lock;
1485 int pending_io_count;
1486 wait_queue_head_t reset_wq;
1487 u16 *io_queue_num;
1488
1489 /* PCIe SGL */
1490 struct dma_pool *pcie_sgl_dma_pool;
1491 /* Host Page Size */
1492 u32 page_size;
1493
1494 /* chain */
1495 struct chain_lookup *chain_lookup;
1496 struct list_head free_chain_list;
1497 struct dma_pool *chain_dma_pool;
1498 ulong chain_pages;
1499 u16 max_sges_in_main_message;
1500 u16 max_sges_in_chain_message;
1501 u16 chains_needed_per_io;
1502 u32 chain_depth;
1503 u16 chain_segment_sz;
1504 u16 chains_per_prp_buffer;
1505
1506 /* hi-priority queue */
1507 u16 hi_priority_smid;
1508 u8 *hi_priority;
1509 dma_addr_t hi_priority_dma;
1510 u16 hi_priority_depth;
1511 struct request_tracker *hpr_lookup;
1512 struct list_head hpr_free_list;
1513
1514 /* internal queue */
1515 u16 internal_smid;
1516 u8 *internal;
1517 dma_addr_t internal_dma;
1518 u16 internal_depth;
1519 struct request_tracker *internal_lookup;
1520 struct list_head internal_free_list;
1521
1522 /* sense */
1523 u8 *sense;
1524 dma_addr_t sense_dma;
1525 struct dma_pool *sense_dma_pool;
1526
1527 /* reply */
1528 u16 reply_sz;
1529 u8 *reply;
1530 dma_addr_t reply_dma;
1531 u32 reply_dma_max_address;
1532 u32 reply_dma_min_address;
1533 struct dma_pool *reply_dma_pool;
1534
1535 /* reply free queue */
1536 u16 reply_free_queue_depth;
1537 __le32 *reply_free;
1538 dma_addr_t reply_free_dma;
1539 struct dma_pool *reply_free_dma_pool;
1540 u32 reply_free_host_index;
1541
1542 /* reply post queue */
1543 u16 reply_post_queue_depth;
1544 struct reply_post_struct *reply_post;
1545 u8 rdpq_array_capable;
1546 u8 rdpq_array_enable;
1547 u8 rdpq_array_enable_assigned;
1548 struct dma_pool *reply_post_free_dma_pool;
1549 struct dma_pool *reply_post_free_array_dma_pool;
1550 Mpi2IOCInitRDPQArrayEntry *reply_post_free_array;
1551 dma_addr_t reply_post_free_array_dma;
1552 u8 reply_queue_count;
1553 struct list_head reply_queue_list;
1554
1555 u8 combined_reply_queue;
1556 u8 combined_reply_index_count;
1557 u8 smp_affinity_enable;
1558 /* reply post register index */
1559 resource_size_t **replyPostRegisterIndex;
1560
1561 struct list_head delayed_tr_list;
1562 struct list_head delayed_tr_volume_list;
1563 struct list_head delayed_sc_list;
1564 struct list_head delayed_event_ack_list;
1565 u8 temp_sensors_count;
1566 struct mutex pci_access_mutex;
1567
1568 /* diag buffer support */
1569 u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
1570 u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
1571 dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
1572 u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
1573 u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
1574 u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
1575 u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
1576 u32 ring_buffer_offset;
1577 u32 ring_buffer_sz;
1578 struct htb_rel_query htb_rel;
1579 u8 reset_from_user;
1580 u8 is_warpdrive;
1581 u8 is_mcpu_endpoint;
1582 u8 hide_ir_msg;
1583 u8 mfg_pg10_hide_flag;
1584 u8 hide_drives;
1585 spinlock_t diag_trigger_lock;
1586 u8 diag_trigger_active;
1587 u8 atomic_desc_capable;
1588 BASE_READ_REG base_readl;
1589 struct SL_WH_MASTER_TRIGGER_T diag_trigger_master;
1590 struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event;
1591 struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi;
1592 struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi;
1593 u8 supports_trigger_pages;
1594 void *device_remove_in_progress;
1595 u16 device_remove_in_progress_sz;
1596 u8 is_gen35_ioc;
1597 u8 is_aero_ioc;
1598 struct dentry *debugfs_root;
1599 struct dentry *ioc_dump;
1600 PUT_SMID_IO_FP_HIP put_smid_scsi_io;
1601 PUT_SMID_IO_FP_HIP put_smid_fast_path;
1602 PUT_SMID_IO_FP_HIP put_smid_hi_priority;
1603 PUT_SMID_DEFAULT put_smid_default;
1604 GET_MSIX_INDEX get_msix_index_for_smlio;
1605
1606 u8 multipath_on_hba;
1607 struct list_head port_table_list;
1608 };
1609
1610 struct mpt3sas_debugfs_buffer {
1611 void *buf;
1612 u32 len;
1613 };
1614
1615 #define MPT_DRV_SUPPORT_BITMAP_MEMMOVE 0x00000001
1616 #define MPT_DRV_SUPPORT_BITMAP_ADDNLQUERY 0x00000002
1617
1618 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1619 u32 reply);
1620
1621
1622 /* base shared API */
1623 extern struct list_head mpt3sas_ioc_list;
1624 extern char driver_name[MPT_NAME_LENGTH];
1625 /* spinlock on list operations over IOCs
1626 * Case: when multiple warpdrive cards(IOCs) are in use
1627 * Each IOC will added to the ioc list structure on initialization.
1628 * Watchdog threads run at regular intervals to check IOC for any
1629 * fault conditions which will trigger the dead_ioc thread to
1630 * deallocate pci resource, resulting deleting the IOC netry from list,
1631 * this deletion need to protected by spinlock to enusre that
1632 * ioc removal is syncrhonized, if not synchronized it might lead to
1633 * list_del corruption as the ioc list is traversed in cli path.
1634 */
1635 extern spinlock_t gioc_lock;
1636
1637 void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc);
1638 void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc);
1639
1640 int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc);
1641 void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc);
1642 int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc);
1643 void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc);
1644 void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc);
1645 int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc,
1646 enum reset_type type);
1647
1648 void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1649 void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1650 __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc,
1651 u16 smid);
1652 void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1653 dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1654 void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc, u8 poll);
1655 void mpt3sas_base_mask_interrupts(struct MPT3SAS_ADAPTER *ioc);
1656 void mpt3sas_base_unmask_interrupts(struct MPT3SAS_ADAPTER *ioc);
1657
1658 void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1659 u16 handle);
1660 void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1661 u16 msix_task);
1662 void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1663 void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1664 /* hi-priority queue */
1665 u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1666 u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
1667 struct scsi_cmnd *scmd);
1668 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc,
1669 struct scsiio_tracker *st);
1670
1671 u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1672 void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1673 void mpt3sas_base_initialize_callback_handler(void);
1674 u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func);
1675 void mpt3sas_base_release_callback_handler(u8 cb_idx);
1676
1677 u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1678 u32 reply);
1679 u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1680 u8 msix_index, u32 reply);
1681 void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc,
1682 u32 phys_addr);
1683
1684 u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked);
1685
1686 void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code);
1687 #define mpt3sas_print_fault_code(ioc, fault_code) \
1688 do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \
1689 mpt3sas_base_fault_info(ioc, fault_code); } while (0)
1690
1691 void mpt3sas_base_coredump_info(struct MPT3SAS_ADAPTER *ioc, u16 fault_code);
1692 #define mpt3sas_print_coredump_info(ioc, fault_code) \
1693 do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \
1694 mpt3sas_base_coredump_info(ioc, fault_code); } while (0)
1695
1696 int mpt3sas_base_wait_for_coredump_completion(struct MPT3SAS_ADAPTER *ioc,
1697 const char *caller);
1698 int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
1699 Mpi2SasIoUnitControlReply_t *mpi_reply,
1700 Mpi2SasIoUnitControlRequest_t *mpi_request);
1701 int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
1702 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
1703
1704 void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc,
1705 u32 *event_type);
1706
1707 void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc);
1708
1709 void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
1710 u16 device_missing_delay, u8 io_missing_delay);
1711
1712 int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc);
1713
1714 void
1715 mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc);
1716
1717 u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc,
1718 u8 status, void *mpi_request, int sz);
1719 #define mpt3sas_check_cmd_timeout(ioc, status, mpi_request, sz, issue_reset) \
1720 do { ioc_err(ioc, "In func: %s\n", __func__); \
1721 issue_reset = mpt3sas_base_check_cmd_timeout(ioc, \
1722 status, mpi_request, sz); } while (0)
1723
1724 int mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int wait_count);
1725
1726 /* scsih shared API */
1727 struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc,
1728 u16 smid);
1729 u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
1730 u32 reply);
1731 void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1732 void mpt3sas_scsih_clear_outstanding_scsi_tm_commands(
1733 struct MPT3SAS_ADAPTER *ioc);
1734 void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1735
1736 int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1737 uint channel, uint id, u64 lun, u8 type, u16 smid_task,
1738 u16 msix_task, u8 timeout, u8 tr_method);
1739 int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1740 uint channel, uint id, u64 lun, u8 type, u16 smid_task,
1741 u16 msix_task, u8 timeout, u8 tr_method);
1742
1743 void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1744 void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1745 void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1746 struct hba_port *port);
1747 void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
1748 u64 sas_address, struct hba_port *port);
1749 u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc,
1750 u16 smid);
1751 struct hba_port *
1752 mpt3sas_get_port_by_id(struct MPT3SAS_ADAPTER *ioc, u8 port,
1753 u8 bypass_dirty_port_flag);
1754
1755 struct _sas_node *mpt3sas_scsih_expander_find_by_handle(
1756 struct MPT3SAS_ADAPTER *ioc, u16 handle);
1757 struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address(
1758 struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1759 struct hba_port *port);
1760 struct _sas_device *mpt3sas_get_sdev_by_addr(
1761 struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1762 struct hba_port *port);
1763 struct _sas_device *__mpt3sas_get_sdev_by_addr(
1764 struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1765 struct hba_port *port);
1766 struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1767 u16 handle);
1768 struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1769 u16 handle);
1770
1771 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc);
1772 struct _raid_device *
1773 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1774 void mpt3sas_scsih_change_queue_depth(struct scsi_device *sdev, int qdepth);
1775 struct _sas_device *
1776 __mpt3sas_get_sdev_by_rphy(struct MPT3SAS_ADAPTER *ioc, struct sas_rphy *rphy);
1777 struct virtual_phy *
1778 mpt3sas_get_vphy_by_phy(struct MPT3SAS_ADAPTER *ioc,
1779 struct hba_port *port, u32 phy);
1780
1781 /* config shared API */
1782 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1783 u32 reply);
1784 int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc,
1785 u8 *num_phys);
1786 int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
1787 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
1788 int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc,
1789 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page,
1790 u16 sz);
1791 int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
1792 Mpi2ConfigReply_t *mpi_reply,
1793 struct Mpi2ManufacturingPage10_t *config_page);
1794
1795 int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1796 Mpi2ConfigReply_t *mpi_reply,
1797 struct Mpi2ManufacturingPage11_t *config_page);
1798 int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1799 Mpi2ConfigReply_t *mpi_reply,
1800 struct Mpi2ManufacturingPage11_t *config_page);
1801
1802 int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1803 *mpi_reply, Mpi2BiosPage2_t *config_page);
1804 int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1805 *mpi_reply, Mpi2BiosPage3_t *config_page);
1806 int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1807 *mpi_reply, Mpi2IOUnitPage0_t *config_page);
1808 int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1809 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
1810 u32 form, u32 handle);
1811 int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc,
1812 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page,
1813 u32 form, u32 handle);
1814 int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1815 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page,
1816 u32 form, u32 handle);
1817 int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc,
1818 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page,
1819 u32 form, u32 handle);
1820 int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
1821 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
1822 u16 sz);
1823 int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1824 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1825 int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc,
1826 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz);
1827 int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1828 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1829 int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1830 *mpi_reply, Mpi2IOUnitPage8_t *config_page);
1831 int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1832 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1833 u16 sz);
1834 int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1835 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1836 u16 sz);
1837 int mpt3sas_config_get_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1838 *mpi_reply, Mpi2IOCPage1_t *config_page);
1839 int mpt3sas_config_set_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1840 *mpi_reply, Mpi2IOCPage1_t *config_page);
1841 int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1842 *mpi_reply, Mpi2IOCPage8_t *config_page);
1843 int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc,
1844 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page,
1845 u32 form, u32 handle);
1846 int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc,
1847 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page,
1848 u32 phy_number, u16 handle);
1849 int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc,
1850 Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page,
1851 u32 form, u32 handle);
1852 int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1853 *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
1854 int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1855 *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
1856 int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
1857 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
1858 u32 handle);
1859 int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1860 u8 *num_pds);
1861 int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
1862 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
1863 u32 handle, u16 sz);
1864 int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc,
1865 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
1866 u32 form, u32 form_specific);
1867 int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
1868 u16 *volume_handle);
1869 int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc,
1870 u16 volume_handle, u64 *wwid);
1871 int
1872 mpt3sas_config_get_driver_trigger_pg0(struct MPT3SAS_ADAPTER *ioc,
1873 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage0_t *config_page);
1874 int
1875 mpt3sas_config_get_driver_trigger_pg1(struct MPT3SAS_ADAPTER *ioc,
1876 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage1_t *config_page);
1877 int
1878 mpt3sas_config_get_driver_trigger_pg2(struct MPT3SAS_ADAPTER *ioc,
1879 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage2_t *config_page);
1880 int
1881 mpt3sas_config_get_driver_trigger_pg3(struct MPT3SAS_ADAPTER *ioc,
1882 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage3_t *config_page);
1883 int
1884 mpt3sas_config_get_driver_trigger_pg4(struct MPT3SAS_ADAPTER *ioc,
1885 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage4_t *config_page);
1886 int
1887 mpt3sas_config_update_driver_trigger_pg1(struct MPT3SAS_ADAPTER *ioc,
1888 struct SL_WH_MASTER_TRIGGER_T *master_tg, bool set);
1889 int
1890 mpt3sas_config_update_driver_trigger_pg2(struct MPT3SAS_ADAPTER *ioc,
1891 struct SL_WH_EVENT_TRIGGERS_T *event_tg, bool set);
1892 int
1893 mpt3sas_config_update_driver_trigger_pg3(struct MPT3SAS_ADAPTER *ioc,
1894 struct SL_WH_SCSI_TRIGGERS_T *scsi_tg, bool set);
1895 int
1896 mpt3sas_config_update_driver_trigger_pg4(struct MPT3SAS_ADAPTER *ioc,
1897 struct SL_WH_MPI_TRIGGERS_T *mpi_tg, bool set);
1898
1899 /* ctl shared API */
1900 extern struct device_attribute *mpt3sas_host_attrs[];
1901 extern struct device_attribute *mpt3sas_dev_attrs[];
1902 void mpt3sas_ctl_init(ushort hbas_to_enumerate);
1903 void mpt3sas_ctl_exit(ushort hbas_to_enumerate);
1904 u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1905 u32 reply);
1906 void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1907 void mpt3sas_ctl_clear_outstanding_ioctls(struct MPT3SAS_ADAPTER *ioc);
1908 void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1909 u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc,
1910 u8 msix_index, u32 reply);
1911 void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
1912 Mpi2EventNotificationReply_t *mpi_reply);
1913
1914 void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc,
1915 u8 bits_to_register);
1916 int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
1917 u8 *issue_reset);
1918
1919 /* transport shared API */
1920 extern struct scsi_transport_template *mpt3sas_transport_template;
1921 u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1922 u32 reply);
1923 struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc,
1924 u16 handle, u64 sas_address, struct hba_port *port);
1925 void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1926 u64 sas_address_parent, struct hba_port *port);
1927 int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
1928 *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
1929 int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc,
1930 struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
1931 struct device *parent_dev);
1932 void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
1933 u64 sas_address, u16 handle, u8 phy_number, u8 link_rate,
1934 struct hba_port *port);
1935 extern struct sas_function_template mpt3sas_transport_functions;
1936 extern struct scsi_transport_template *mpt3sas_transport_template;
1937 void
1938 mpt3sas_transport_del_phy_from_an_existing_port(struct MPT3SAS_ADAPTER *ioc,
1939 struct _sas_node *sas_node, struct _sas_phy *mpt3sas_phy);
1940 void
1941 mpt3sas_transport_add_phy_to_an_existing_port(struct MPT3SAS_ADAPTER *ioc,
1942 struct _sas_node *sas_node, struct _sas_phy *mpt3sas_phy,
1943 u64 sas_address, struct hba_port *port);
1944 /* trigger data externs */
1945 void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc,
1946 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1947 void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
1948 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1949 void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc,
1950 u32 trigger_bitmask);
1951 void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
1952 u16 log_entry_qualifier);
1953 void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key,
1954 u8 asc, u8 ascq);
1955 void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status,
1956 u32 loginfo);
1957
1958 /* warpdrive APIs */
1959 u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc);
1960 void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc,
1961 struct _raid_device *raid_device);
1962 void
1963 mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
1964 struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request);
1965
1966 /* NCQ Prio Handling Check */
1967 bool scsih_ncq_prio_supp(struct scsi_device *sdev);
1968
1969 void mpt3sas_setup_debugfs(struct MPT3SAS_ADAPTER *ioc);
1970 void mpt3sas_destroy_debugfs(struct MPT3SAS_ADAPTER *ioc);
1971 void mpt3sas_init_debugfs(void);
1972 void mpt3sas_exit_debugfs(void);
1973
1974 /**
1975 * _scsih_is_pcie_scsi_device - determines if device is an pcie scsi device
1976 * @device_info: bitfield providing information about the device.
1977 * Context: none
1978 *
1979 * Returns 1 if scsi device.
1980 */
1981 static inline int
mpt3sas_scsih_is_pcie_scsi_device(u32 device_info)1982 mpt3sas_scsih_is_pcie_scsi_device(u32 device_info)
1983 {
1984 if ((device_info &
1985 MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE) == MPI26_PCIE_DEVINFO_SCSI)
1986 return 1;
1987 else
1988 return 0;
1989 }
1990 #endif /* MPT3SAS_BASE_H_INCLUDED */
1991