1 //===-- X86AsmBackend.cpp - X86 Assembler Backend -------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9
10 #include "llvm/Target/TargetAsmBackend.h"
11 #include "X86.h"
12 #include "X86FixupKinds.h"
13 #include "llvm/ADT/Twine.h"
14 #include "llvm/MC/ELFObjectWriter.h"
15 #include "llvm/MC/MCAssembler.h"
16 #include "llvm/MC/MCExpr.h"
17 #include "llvm/MC/MCObjectWriter.h"
18 #include "llvm/MC/MCSectionCOFF.h"
19 #include "llvm/MC/MCSectionELF.h"
20 #include "llvm/MC/MCSectionMachO.h"
21 #include "llvm/MC/MachObjectWriter.h"
22 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/Support/raw_ostream.h"
24 #include "llvm/Target/TargetRegistry.h"
25 #include "llvm/Target/TargetAsmBackend.h"
26 using namespace llvm;
27
28
getFixupKindLog2Size(unsigned Kind)29 static unsigned getFixupKindLog2Size(unsigned Kind) {
30 switch (Kind) {
31 default: assert(0 && "invalid fixup kind!");
32 case X86::reloc_pcrel_1byte:
33 case FK_Data_1: return 0;
34 case X86::reloc_pcrel_2byte:
35 case FK_Data_2: return 1;
36 case X86::reloc_pcrel_4byte:
37 case X86::reloc_riprel_4byte:
38 case X86::reloc_riprel_4byte_movq_load:
39 case FK_Data_4: return 2;
40 case FK_Data_8: return 3;
41 }
42 }
43
44 namespace {
45 class X86AsmBackend : public TargetAsmBackend {
46 public:
X86AsmBackend(const Target & T)47 X86AsmBackend(const Target &T)
48 : TargetAsmBackend(T) {}
49
ApplyFixup(const MCFixup & Fixup,MCDataFragment & DF,uint64_t Value) const50 void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
51 uint64_t Value) const {
52 unsigned Size = 1 << getFixupKindLog2Size(Fixup.getKind());
53
54 assert(Fixup.getOffset() + Size <= DF.getContents().size() &&
55 "Invalid fixup offset!");
56 for (unsigned i = 0; i != Size; ++i)
57 DF.getContents()[Fixup.getOffset() + i] = uint8_t(Value >> (i * 8));
58 }
59
60 bool MayNeedRelaxation(const MCInst &Inst) const;
61
62 void RelaxInstruction(const MCInst &Inst, MCInst &Res) const;
63
64 bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const;
65 };
66 } // end anonymous namespace
67
getRelaxedOpcode(unsigned Op)68 static unsigned getRelaxedOpcode(unsigned Op) {
69 switch (Op) {
70 default:
71 return Op;
72
73 case X86::JAE_1: return X86::JAE_4;
74 case X86::JA_1: return X86::JA_4;
75 case X86::JBE_1: return X86::JBE_4;
76 case X86::JB_1: return X86::JB_4;
77 case X86::JE_1: return X86::JE_4;
78 case X86::JGE_1: return X86::JGE_4;
79 case X86::JG_1: return X86::JG_4;
80 case X86::JLE_1: return X86::JLE_4;
81 case X86::JL_1: return X86::JL_4;
82 case X86::JMP_1: return X86::JMP_4;
83 case X86::JNE_1: return X86::JNE_4;
84 case X86::JNO_1: return X86::JNO_4;
85 case X86::JNP_1: return X86::JNP_4;
86 case X86::JNS_1: return X86::JNS_4;
87 case X86::JO_1: return X86::JO_4;
88 case X86::JP_1: return X86::JP_4;
89 case X86::JS_1: return X86::JS_4;
90 }
91 }
92
MayNeedRelaxation(const MCInst & Inst) const93 bool X86AsmBackend::MayNeedRelaxation(const MCInst &Inst) const {
94 // Check if this instruction is ever relaxable.
95 if (getRelaxedOpcode(Inst.getOpcode()) == Inst.getOpcode())
96 return false;
97
98 // If so, just assume it can be relaxed. Once we support relaxing more complex
99 // instructions we should check that the instruction actually has symbolic
100 // operands before doing this, but we need to be careful about things like
101 // PCrel.
102 return true;
103 }
104
105 // FIXME: Can tblgen help at all here to verify there aren't other instructions
106 // we can relax?
RelaxInstruction(const MCInst & Inst,MCInst & Res) const107 void X86AsmBackend::RelaxInstruction(const MCInst &Inst, MCInst &Res) const {
108 // The only relaxations X86 does is from a 1byte pcrel to a 4byte pcrel.
109 unsigned RelaxedOp = getRelaxedOpcode(Inst.getOpcode());
110
111 if (RelaxedOp == Inst.getOpcode()) {
112 SmallString<256> Tmp;
113 raw_svector_ostream OS(Tmp);
114 Inst.dump_pretty(OS);
115 OS << "\n";
116 report_fatal_error("unexpected instruction to relax: " + OS.str());
117 }
118
119 Res = Inst;
120 Res.setOpcode(RelaxedOp);
121 }
122
123 /// WriteNopData - Write optimal nops to the output file for the \arg Count
124 /// bytes. This returns the number of bytes written. It may return 0 if
125 /// the \arg Count is more than the maximum optimal nops.
126 ///
127 /// FIXME this is X86 32-bit specific and should move to a better place.
WriteNopData(uint64_t Count,MCObjectWriter * OW) const128 bool X86AsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
129 static const uint8_t Nops[16][16] = {
130 // nop
131 {0x90},
132 // xchg %ax,%ax
133 {0x66, 0x90},
134 // nopl (%[re]ax)
135 {0x0f, 0x1f, 0x00},
136 // nopl 0(%[re]ax)
137 {0x0f, 0x1f, 0x40, 0x00},
138 // nopl 0(%[re]ax,%[re]ax,1)
139 {0x0f, 0x1f, 0x44, 0x00, 0x00},
140 // nopw 0(%[re]ax,%[re]ax,1)
141 {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00},
142 // nopl 0L(%[re]ax)
143 {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00},
144 // nopl 0L(%[re]ax,%[re]ax,1)
145 {0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
146 // nopw 0L(%[re]ax,%[re]ax,1)
147 {0x66, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
148 // nopw %cs:0L(%[re]ax,%[re]ax,1)
149 {0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
150 // nopl 0(%[re]ax,%[re]ax,1)
151 // nopw 0(%[re]ax,%[re]ax,1)
152 {0x0f, 0x1f, 0x44, 0x00, 0x00,
153 0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00},
154 // nopw 0(%[re]ax,%[re]ax,1)
155 // nopw 0(%[re]ax,%[re]ax,1)
156 {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00,
157 0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00},
158 // nopw 0(%[re]ax,%[re]ax,1)
159 // nopl 0L(%[re]ax) */
160 {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00,
161 0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00},
162 // nopl 0L(%[re]ax)
163 // nopl 0L(%[re]ax)
164 {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00,
165 0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00},
166 // nopl 0L(%[re]ax)
167 // nopl 0L(%[re]ax,%[re]ax,1)
168 {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00,
169 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}
170 };
171
172 // Write an optimal sequence for the first 15 bytes.
173 uint64_t OptimalCount = (Count < 16) ? Count : 15;
174 for (uint64_t i = 0, e = OptimalCount; i != e; i++)
175 OW->Write8(Nops[OptimalCount - 1][i]);
176
177 // Finish with single byte nops.
178 for (uint64_t i = OptimalCount, e = Count; i != e; ++i)
179 OW->Write8(0x90);
180
181 return true;
182 }
183
184 /* *** */
185
186 namespace {
187 class ELFX86AsmBackend : public X86AsmBackend {
188 public:
ELFX86AsmBackend(const Target & T)189 ELFX86AsmBackend(const Target &T)
190 : X86AsmBackend(T) {
191 HasAbsolutizedSet = true;
192 HasScatteredSymbols = true;
193 }
194
isVirtualSection(const MCSection & Section) const195 bool isVirtualSection(const MCSection &Section) const {
196 const MCSectionELF &SE = static_cast<const MCSectionELF&>(Section);
197 return SE.getType() == MCSectionELF::SHT_NOBITS;;
198 }
199 };
200
201 class ELFX86_32AsmBackend : public ELFX86AsmBackend {
202 public:
ELFX86_32AsmBackend(const Target & T)203 ELFX86_32AsmBackend(const Target &T)
204 : ELFX86AsmBackend(T) {}
205
createObjectWriter(raw_ostream & OS) const206 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
207 return new ELFObjectWriter(OS, /*Is64Bit=*/false,
208 /*IsLittleEndian=*/true,
209 /*HasRelocationAddend=*/false);
210 }
211 };
212
213 class ELFX86_64AsmBackend : public ELFX86AsmBackend {
214 public:
ELFX86_64AsmBackend(const Target & T)215 ELFX86_64AsmBackend(const Target &T)
216 : ELFX86AsmBackend(T) {}
217
createObjectWriter(raw_ostream & OS) const218 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
219 return new ELFObjectWriter(OS, /*Is64Bit=*/true,
220 /*IsLittleEndian=*/true,
221 /*HasRelocationAddend=*/true);
222 }
223 };
224
225 class WindowsX86AsmBackend : public X86AsmBackend {
226 bool Is64Bit;
227 public:
WindowsX86AsmBackend(const Target & T,bool is64Bit)228 WindowsX86AsmBackend(const Target &T, bool is64Bit)
229 : X86AsmBackend(T)
230 , Is64Bit(is64Bit) {
231 HasScatteredSymbols = true;
232 }
233
createObjectWriter(raw_ostream & OS) const234 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
235 return createWinCOFFObjectWriter(OS, Is64Bit);
236 }
237
isVirtualSection(const MCSection & Section) const238 bool isVirtualSection(const MCSection &Section) const {
239 const MCSectionCOFF &SE = static_cast<const MCSectionCOFF&>(Section);
240 return SE.getCharacteristics() & COFF::IMAGE_SCN_CNT_UNINITIALIZED_DATA;
241 }
242 };
243
244 class DarwinX86AsmBackend : public X86AsmBackend {
245 public:
DarwinX86AsmBackend(const Target & T)246 DarwinX86AsmBackend(const Target &T)
247 : X86AsmBackend(T) {
248 HasAbsolutizedSet = true;
249 HasScatteredSymbols = true;
250 }
251
isVirtualSection(const MCSection & Section) const252 bool isVirtualSection(const MCSection &Section) const {
253 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
254 return (SMO.getType() == MCSectionMachO::S_ZEROFILL ||
255 SMO.getType() == MCSectionMachO::S_GB_ZEROFILL ||
256 SMO.getType() == MCSectionMachO::S_THREAD_LOCAL_ZEROFILL);
257 }
258 };
259
260 class DarwinX86_32AsmBackend : public DarwinX86AsmBackend {
261 public:
DarwinX86_32AsmBackend(const Target & T)262 DarwinX86_32AsmBackend(const Target &T)
263 : DarwinX86AsmBackend(T) {}
264
createObjectWriter(raw_ostream & OS) const265 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
266 return new MachObjectWriter(OS, /*Is64Bit=*/false);
267 }
268 };
269
270 class DarwinX86_64AsmBackend : public DarwinX86AsmBackend {
271 public:
DarwinX86_64AsmBackend(const Target & T)272 DarwinX86_64AsmBackend(const Target &T)
273 : DarwinX86AsmBackend(T) {
274 HasReliableSymbolDifference = true;
275 }
276
createObjectWriter(raw_ostream & OS) const277 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
278 return new MachObjectWriter(OS, /*Is64Bit=*/true);
279 }
280
doesSectionRequireSymbols(const MCSection & Section) const281 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
282 // Temporary labels in the string literals sections require symbols. The
283 // issue is that the x86_64 relocation format does not allow symbol +
284 // offset, and so the linker does not have enough information to resolve the
285 // access to the appropriate atom unless an external relocation is used. For
286 // non-cstring sections, we expect the compiler to use a non-temporary label
287 // for anything that could have an addend pointing outside the symbol.
288 //
289 // See <rdar://problem/4765733>.
290 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
291 return SMO.getType() == MCSectionMachO::S_CSTRING_LITERALS;
292 }
293
isSectionAtomizable(const MCSection & Section) const294 virtual bool isSectionAtomizable(const MCSection &Section) const {
295 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
296 // Fixed sized data sections are uniqued, they cannot be diced into atoms.
297 switch (SMO.getType()) {
298 default:
299 return true;
300
301 case MCSectionMachO::S_4BYTE_LITERALS:
302 case MCSectionMachO::S_8BYTE_LITERALS:
303 case MCSectionMachO::S_16BYTE_LITERALS:
304 case MCSectionMachO::S_LITERAL_POINTERS:
305 case MCSectionMachO::S_NON_LAZY_SYMBOL_POINTERS:
306 case MCSectionMachO::S_LAZY_SYMBOL_POINTERS:
307 case MCSectionMachO::S_MOD_INIT_FUNC_POINTERS:
308 case MCSectionMachO::S_MOD_TERM_FUNC_POINTERS:
309 case MCSectionMachO::S_INTERPOSING:
310 return false;
311 }
312 }
313 };
314
315 } // end anonymous namespace
316
createX86_32AsmBackend(const Target & T,const std::string & TT)317 TargetAsmBackend *llvm::createX86_32AsmBackend(const Target &T,
318 const std::string &TT) {
319 switch (Triple(TT).getOS()) {
320 case Triple::Darwin:
321 return new DarwinX86_32AsmBackend(T);
322 case Triple::MinGW32:
323 case Triple::Cygwin:
324 case Triple::Win32:
325 return new WindowsX86AsmBackend(T, false);
326 default:
327 return new ELFX86_32AsmBackend(T);
328 }
329 }
330
createX86_64AsmBackend(const Target & T,const std::string & TT)331 TargetAsmBackend *llvm::createX86_64AsmBackend(const Target &T,
332 const std::string &TT) {
333 switch (Triple(TT).getOS()) {
334 case Triple::Darwin:
335 return new DarwinX86_64AsmBackend(T);
336 case Triple::MinGW64:
337 case Triple::Cygwin:
338 case Triple::Win32:
339 return new WindowsX86AsmBackend(T, true);
340 default:
341 return new ELFX86_64AsmBackend(T);
342 }
343 }
344