1 //===-- X86InstrBuilder.h - Functions to aid building x86 insts -*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file exposes functions that may be used with BuildMI from the
11 // MachineInstrBuilder.h file to handle X86'isms in a clean way.
12 //
13 // The BuildMem function may be used with the BuildMI function to add entire
14 // memory references in a single, typed, function call. X86 memory references
15 // can be very complex expressions (described in the README), so wrapping them
16 // up behind an easier to use interface makes sense. Descriptions of the
17 // functions are included below.
18 //
19 // For reference, the order of operands for memory references is:
20 // (Operand), Base, Scale, Index, Displacement.
21 //
22 //===----------------------------------------------------------------------===//
23
24 #ifndef X86INSTRBUILDER_H
25 #define X86INSTRBUILDER_H
26
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineInstrBuilder.h"
29 #include "llvm/CodeGen/MachineMemOperand.h"
30 #include "llvm/CodeGen/PseudoSourceValue.h"
31
32 namespace llvm {
33
34 /// X86AddressMode - This struct holds a generalized full x86 address mode.
35 /// The base register can be a frame index, which will eventually be replaced
36 /// with BP or SP and Disp being offsetted accordingly. The displacement may
37 /// also include the offset of a global value.
38 struct X86AddressMode {
39 enum {
40 RegBase,
41 FrameIndexBase
42 } BaseType;
43
44 union {
45 unsigned Reg;
46 int FrameIndex;
47 } Base;
48
49 unsigned Scale;
50 unsigned IndexReg;
51 int Disp;
52 const GlobalValue *GV;
53 unsigned GVOpFlags;
54
X86AddressModeX86AddressMode55 X86AddressMode()
56 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0), GVOpFlags(0) {
57 Base.Reg = 0;
58 }
59 };
60
61 /// addDirectMem - This function is used to add a direct memory reference to the
62 /// current instruction -- that is, a dereference of an address in a register,
63 /// with no scale, index or displacement. An example is: DWORD PTR [EAX].
64 ///
65 static inline const MachineInstrBuilder &
addDirectMem(const MachineInstrBuilder & MIB,unsigned Reg)66 addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) {
67 // Because memory references are always represented with five
68 // values, this adds: Reg, 1, NoReg, 0, NoReg to the instruction.
69 return MIB.addReg(Reg).addImm(1).addReg(0).addImm(0).addReg(0);
70 }
71
72
73 static inline const MachineInstrBuilder &
addOffset(const MachineInstrBuilder & MIB,int Offset)74 addOffset(const MachineInstrBuilder &MIB, int Offset) {
75 return MIB.addImm(1).addReg(0).addImm(Offset).addReg(0);
76 }
77
78 /// addRegOffset - This function is used to add a memory reference of the form
79 /// [Reg + Offset], i.e., one with no scale or index, but with a
80 /// displacement. An example is: DWORD PTR [EAX + 4].
81 ///
82 static inline const MachineInstrBuilder &
addRegOffset(const MachineInstrBuilder & MIB,unsigned Reg,bool isKill,int Offset)83 addRegOffset(const MachineInstrBuilder &MIB,
84 unsigned Reg, bool isKill, int Offset) {
85 return addOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset);
86 }
87
88 /// addRegReg - This function is used to add a memory reference of the form:
89 /// [Reg + Reg].
addRegReg(const MachineInstrBuilder & MIB,unsigned Reg1,bool isKill1,unsigned Reg2,bool isKill2)90 static inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB,
91 unsigned Reg1, bool isKill1,
92 unsigned Reg2, bool isKill2) {
93 return MIB.addReg(Reg1, getKillRegState(isKill1)).addImm(1)
94 .addReg(Reg2, getKillRegState(isKill2)).addImm(0).addReg(0);
95 }
96
97 static inline const MachineInstrBuilder &
addFullAddress(const MachineInstrBuilder & MIB,const X86AddressMode & AM)98 addFullAddress(const MachineInstrBuilder &MIB,
99 const X86AddressMode &AM) {
100 assert(AM.Scale == 1 || AM.Scale == 2 || AM.Scale == 4 || AM.Scale == 8);
101
102 if (AM.BaseType == X86AddressMode::RegBase)
103 MIB.addReg(AM.Base.Reg);
104 else if (AM.BaseType == X86AddressMode::FrameIndexBase)
105 MIB.addFrameIndex(AM.Base.FrameIndex);
106 else
107 assert (0);
108 MIB.addImm(AM.Scale).addReg(AM.IndexReg);
109 if (AM.GV)
110 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags);
111 else
112 MIB.addImm(AM.Disp);
113
114 return MIB.addReg(0);
115 }
116
117 /// addFrameReference - This function is used to add a reference to the base of
118 /// an abstract object on the stack frame of the current function. This
119 /// reference has base register as the FrameIndex offset until it is resolved.
120 /// This allows a constant offset to be specified as well...
121 ///
122 static inline const MachineInstrBuilder &
123 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
124 MachineInstr *MI = MIB;
125 MachineFunction &MF = *MI->getParent()->getParent();
126 MachineFrameInfo &MFI = *MF.getFrameInfo();
127 const TargetInstrDesc &TID = MI->getDesc();
128 unsigned Flags = 0;
129 if (TID.mayLoad())
130 Flags |= MachineMemOperand::MOLoad;
131 if (TID.mayStore())
132 Flags |= MachineMemOperand::MOStore;
133 MachineMemOperand *MMO =
134 MF.getMachineMemOperand(PseudoSourceValue::getFixedStack(FI),
135 Flags, Offset,
136 MFI.getObjectSize(FI),
137 MFI.getObjectAlignment(FI));
138 return addOffset(MIB.addFrameIndex(FI), Offset)
139 .addMemOperand(MMO);
140 }
141
142 /// addConstantPoolReference - This function is used to add a reference to the
143 /// base of a constant value spilled to the per-function constant pool. The
144 /// reference uses the abstract ConstantPoolIndex which is retained until
145 /// either machine code emission or assembly output. In PIC mode on x86-32,
146 /// the GlobalBaseReg parameter can be used to make this a
147 /// GlobalBaseReg-relative reference.
148 ///
149 static inline const MachineInstrBuilder &
addConstantPoolReference(const MachineInstrBuilder & MIB,unsigned CPI,unsigned GlobalBaseReg,unsigned char OpFlags)150 addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
151 unsigned GlobalBaseReg, unsigned char OpFlags) {
152 //FIXME: factor this
153 return MIB.addReg(GlobalBaseReg).addImm(1).addReg(0)
154 .addConstantPoolIndex(CPI, 0, OpFlags).addReg(0);
155 }
156
157 } // End llvm namespace
158
159 #endif
160