1# 2# This software is Copyright (c) 2016-2018 Denis Burykin 3# [denis_burykin yahoo com], [denis-burykin2014 yandex ru] 4# and it is hereby released to the general public under the following terms: 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted. 7# 8# **************************** 9# 10# cmt2 - driven by IFCLK_IN 11# cmt_special.v 12# 13# **************************** 14# 15INST "clocks/cmt2/DCM_0" LOC=DCM_X0Y4; 16#INST "clocks/cmt2/DCM_CLKGEN_0" LOC=DCM_X0Y5; 17#INST "clocks/cmt2/PLL_0" LOC=PLL_ADV_X0Y2; 18 19NET "IFCLK" TNM_NET = "IFCLK"; 20TIMESPEC "TS_IFCLK" = PERIOD "IFCLK" 20.5 ns HIGH 50%; 21 22# CLK2X for PKT_COMM_CLK 23NET "clocks/cmt2/dcm0_clk2x" TNM_NET = "PKT_COMM_CLK"; 24TIMESPEC "TS_PKT_COMM_CLK" = PERIOD "PKT_COMM_CLK" 10.2 ns HIGH 50%; 25 26# CLK2 27#NET "clocks/cmt2/dcm0_clk90" TNM_NET = "cmt2_dcm0_clk90"; 28#TIMESPEC "TS_cmt2_dcm0_clk90" = PERIOD "cmt2_dcm0_clk90" 20.833 ns HIGH 50%; 29# PLL_CLK 30#NET "clocks/cmt2/dcm0_clkdv" TNM_NET = "PKT_COMM_CLK"; 31#TIMESPEC "TS_PKT_COMM_CLK" = PERIOD "PKT_COMM_CLK" 41.666 ns HIGH 50%; 32 33# **************************** 34# 35# Programmable clock #0 36# cmt_prog.v 37# 38# **************************** 39# 40INST "clocks/cmt3/DCM_CLKGEN_0" LOC=DCM_X0Y7; 41INST "clocks/cmt3/PLL_0" LOC=PLL_ADV_X0Y3; 42 43NET "clocks/cmt3/pll0_clkout0" TNM_NET = "CORE_CLK"; 44#TIMESPEC "TS_CORE_CLK" = PERIOD "CORE_CLK" 4.082 ns HIGH 50%; # 245 45#TIMESPEC "TS_CORE_CLK" = PERIOD "CORE_CLK" 4.166 ns HIGH 50%; # 240 46TIMESPEC "TS_CORE_CLK" = PERIOD "CORE_CLK" 4.255 ns HIGH 50%; # 235 47#TIMESPEC "TS_CORE_CLK" = PERIOD "CORE_CLK" 4.347 ns HIGH 50%; # 230 48#TIMESPEC "TS_CORE_CLK" = PERIOD "CORE_CLK" 4.545 ns HIGH 50%; # 220 49#TIMESPEC "TS_CORE_CLK" = PERIOD "CORE_CLK" 4.761 ns HIGH 50%; # 210 50#TIMESPEC "TS_CORE_CLK" = PERIOD "CORE_CLK" 5.000 ns HIGH 50%; # 200 51#TIMESPEC "TS_CORE_CLK" = PERIOD "CORE_CLK" 5.263 ns HIGH 50%; # 190 52#TIMESPEC "TS_CORE_CLK" = PERIOD "CORE_CLK" 5.405 ns HIGH 50%; # 185 53#TIMESPEC "TS_CORE_CLK" = PERIOD "CORE_CLK" 5.555 ns HIGH 50%; # 180 54#TIMESPEC "TS_CORE_CLK" = PERIOD "CORE_CLK" 5.714 ns HIGH 50%; # 175 55#TIMESPEC "TS_CORE_CLK" = PERIOD "CORE_CLK" 5.882 ns HIGH 50%; # 170 56 57 58