1General-Purpose Register Conventions
2
3Register Status Use
4
5GPR0 volatile In function prologs.
6GPR1 dedicated Stack pointer.
7GPR2 dedicated Table of Contents (TOC) pointer.
8GPR3 volatile First word of a function's argument list;
9 first word of a scalar function return.
10GPR4 volatile Second word of a function's argument list;
11 second word of a scalar function return.
12GPR5 volatile Third word of a function's argument list.
13GPR6 volatile Fourth word of a function's argument list.
14GPR7 volatile Fifth word of a function's argument list.
15GPR8 volatile Sixth word of a function's argument list.
16GPR9 volatile Seventh word of a function's argument list.
17GPR10 volatile Eighth word of a function's argument list.
18GPR11 volatile In calls by pointer and as an environment pointer
19 for languages that require it (for example, PASCAL).
20GPR12 volatile For special exception handling required by certain
21 languages and in glink code.
22GPR13 reserved Reserved under 64-bit environment;
23 not restored across system calls.
24GPR14:GPR31 nonvolatile These registers must be preserved across
25 a function call.
26
27Vector Register Conventions
28
29Register Status
30
31VR0:V19 Volatile
32VR20:VR31 Nonvolatile (extended ABI mode) their values are preserved
33 across function calls
34
35Addressing memory
36
37There are many ways to reference data, to maintain support of
38position-independent code the current implementations use GOT-indirect
39addressing (Accessing data through the global offset table):
401. Define data in .data section
412. Load the address of data into register from the global offset table
42   Use 32-bit offset (medium or large code model) to get maximum addressing
43   reach of 4 GB e.g. addis r7, r2, my_var@got@ha
44                      ld r7, my_var@got@l(r7)
453. Use the address to load the value of data into register
46   e.g. ld r3, 0(r7)
47Refer to [2] for more information about referencing data
48
49VSX instructions "lxvd2x/stxvd2x" are used to load and store data to
50memory instead of VR instructions "lvx/stvx" as it produces a fewer
51instructions "lvx/stvx" can be used to load/store data into storage
52operands but additional instructions are needed to access unaligned
53storage operands, refer to "6.4.1 Accessing Unaligned Storage Operands"
54in [3] to see an example of accessing unaligned storage operands.
55"lxvd2x/stxvd2x" can be used to load/store data into unaligned storage
56operands but permuting is needed for loading and storing data in
57little-endian mode VSX registers are defined with "X" suffix
58
59Function Prologue
60
61Big-endian systems only support ELFv1 ABI which requires the following
62steps in the function prologue:
631. Write the "official procedure descriptor" in ".opd","aw" section
642. Write procedure description for .my_func in my_func label
653. Switch back to ".text" section for program code
664. Label the beginning of the code .my_func
67Refer to [1] for more information
68Little-endian systems are compatible with ELFv2 ABI, an example of
69function prologue for ELFv2 ABI can be seen in [2]
70
71[1] http://www.ibm.com/developerworks/linux/library/l-powasm1.html
72[2] https://openpowerfoundation.org/?resource_lib=64-bit-elf-v2-abi-specification-power-architecture
73[3] https://openpowerfoundation.org/?resource_lib=ibm-power-isa-version-2-07-b
74