1 /*
2  * Copyright (c) 2020, MediaTek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 /****************************************************************
8  * Auto generated by DE, please DO NOT modify this file directly.
9  *****************************************************************/
10 #ifndef MT_SPM_PMIC_WRAP_H
11 #define MT_SPM_PMIC_WRAP_H
12 
13 enum pmic_wrap_phase_id {
14 	PMIC_WRAP_PHASE_ALLINONE,
15 	NR_PMIC_WRAP_PHASE,
16 };
17 
18 /* IDX mapping, PMIC_WRAP_PHASE_ALLINONE */
19 enum {
20 	CMD_0,        /* 0x0 */
21 	CMD_1,        /* 0x1 */
22 	CMD_2,        /* 0x2 */
23 	CMD_3,        /* 0x3 */
24 	CMD_4,        /* 0x4 */
25 	CMD_5,        /* 0x5 */
26 	CMD_6,        /* 0x6 */
27 	CMD_7,        /* 0x7 */
28 	CMD_8,        /* 0x8 */
29 	CMD_9,        /* 0x9 */
30 	CMD_10,        /* 0xA */
31 	CMD_11,        /* 0xB */
32 	CMD_12,        /* 0xC */
33 	CMD_13,        /* 0xD */
34 	CMD_14,        /* 0xE */
35 	CMD_15,        /* 0xF */
36 	NR_IDX_ALL,
37 };
38 
39 /* APIs */
40 extern void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase);
41 extern void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase,
42 				     uint32_t idx, uint32_t cmd_wdata);
43 extern uint64_t mt_spm_pmic_wrap_get_cmd(enum pmic_wrap_phase_id phase,
44 					 uint32_t idx);
45 #endif /* MT_SPM_PMIC_WRAP_H */
46