1 /** @file 2 Copies the memory related timing and configuration information into the 3 Compatible BIOS data (BDAT) table. 4 5 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR> 6 SPDX-License-Identifier: BSD-2-Clause-Patent 7 8 **/ 9 #ifndef _MrcRmtData_h_ 10 #define _MrcRmtData_h_ 11 12 #include "MrcTypes.h" 13 14 #define VDD_1_350 1350 ///< VDD in millivolts 15 #define VDD_1_500 1500 ///< VDD in millivolts 16 #define PI_STEP_BASE 2048 ///< Magic number from spec 17 #define PI_STEP_INTERVAL 128 ///< tCK is split into this amount of intervals 18 #define PI_STEP ((PI_STEP_BASE) / (PI_STEP_INTERVAL)) 19 #define VREF_STEP_BASE 100 ///< Magic number from spec 20 #define TX_VREF_STEP 7800 ///< TX Vref step in microvolts 21 #define TX_VREF(VDD) (((TX_VREF_STEP) * (VREF_STEP_BASE)) / (VDD)) ///< VDD passed in is in millivolts 22 #define RX_VREF_STEP 8000 ///< TX Vref step in microvolts 23 #define RX_VREF(VDD) (((RX_VREF_STEP) * (VREF_STEP_BASE)) / (VDD)) ///< VDD passed in is in millivolts 24 #define CA_VREF_STEP 8000 ///< TX Vref step in microvolts 25 #define CA_VREF(VDD) (((CA_VREF_STEP) * (VREF_STEP_BASE)) / (VDD)) ///< VDD passed in is in millivolts 26 27 #define MAX_SPD_RMT 512 ///< The maximum amount of data, in bytes, in an SPD structure. 28 #define RMT_PRIMARY_VERSION 4 ///< The BDAT structure that is currently supported. 29 #define RMT_SECONDARY_VERSION 0 ///< The BDAT structure that is currently supported. 30 #define MAX_MODE_REGISTER 7 ///< Number of mode registers 31 #define MAX_DRAM_DEVICE 9 ///< Maximum number of memory devices 32 33 // 34 // Warning: Bdat4.h has its own copy of this #define 35 // make sure to change it in both places 36 // 37 #define MAX_SCHEMA_LIST_LENGTH (10) 38 39 /* 40 Memory Schema GUID 41 This is private GUID used by MemoryInit internally. 42 {CE3F6794-4883-492C-8DBA-2FC098447710} 43 */ 44 #ifdef BDAT_SUPPORT 45 extern EFI_GUID gEfiMemorySchemaGuid; 46 #endif 47 /* 48 GUID for Schema List HOB 49 This is private GUID used by MemoryInit internally. 50 {3047C2AC-5E8E-4C55-A1CB-EAAD0A88861B} 51 */ 52 extern EFI_GUID gMrcSchemaListHobGuid; 53 54 55 #pragma pack(push, 1) 56 57 typedef struct { 58 UINT8 RxDqLeft; ///< Units = piStep 59 UINT8 RxDqRight; 60 UINT8 TxDqLeft; 61 UINT8 TxDqRight; 62 UINT8 RxVrefLow; ///< Units = rxVrefStep 63 UINT8 RxVrefHigh; 64 UINT8 TxVrefLow; ///< Units = txVrefStep 65 UINT8 TxVrefHigh; 66 } BDAT_DQ_MARGIN_STRUCTURE; 67 68 typedef struct { 69 UINT8 RxDqLeft; ///< Units = piStep 70 UINT8 RxDqRight; 71 UINT8 TxDqLeft; 72 UINT8 TxDqRight; 73 UINT8 CmdLeft; 74 UINT8 CmdRight; 75 UINT8 RecvenLeft; ///< Units = recvenStep 76 UINT8 RecvenRight; 77 UINT8 WrLevelLeft; ///< Units = wrLevelStep 78 UINT8 WrLevelRight; 79 UINT8 RxVrefLow; ///< Units = rxVrefStep 80 UINT8 RxVrefHigh; 81 UINT8 TxVrefLow; ///< Units = txVrefStep 82 UINT8 TxVrefHigh; 83 UINT8 CmdVrefLow; ///< Units = caVrefStep 84 UINT8 CmdVrefHigh; 85 } BDAT_RANK_MARGIN_STRUCTURE; 86 87 typedef struct { 88 UINT16 RecEnDelay[MAX_STROBE]; 89 UINT16 WlDelay[MAX_STROBE]; 90 UINT8 RxDqDelay[MAX_STROBE]; 91 UINT8 TxDqDelay[MAX_STROBE]; 92 UINT8 ClkDelay; 93 UINT8 CtlDelay; 94 UINT8 CmdDelay[3]; 95 UINT8 IoLatency; 96 UINT8 Roundtrip; 97 } BDAT_RANK_TRAINING_STRUCTURE; 98 99 typedef struct { 100 UINT16 ModeRegister[MAX_MODE_REGISTER]; ///< Mode register settings 101 } BDAT_DRAM_MRS_STRUCTURE; 102 103 typedef struct { 104 UINT8 RankEnabled; ///< 0 = Rank disabled 105 UINT8 RankMarginEnabled; ///< 0 = Rank margin disabled 106 UINT8 DqMarginEnabled; ///< 0 = Dq margin disabled 107 BDAT_RANK_MARGIN_STRUCTURE RankMargin; ///< Rank margin data 108 BDAT_DQ_MARGIN_STRUCTURE DqMargin[MAX_DQ]; ///< Array of Dq margin data per rank 109 BDAT_RANK_TRAINING_STRUCTURE RankTraining; ///< Rank training settings 110 BDAT_DRAM_MRS_STRUCTURE RankMRS[MAX_DRAM_DEVICE]; ///< Rank MRS settings 111 } BDAT_RANK_STRUCTURE; 112 113 typedef struct { 114 UINT8 SpdValid[MAX_SPD_RMT / (CHAR_BITS * sizeof (UINT8))]; ///< Each valid bit maps to SPD byte 115 UINT8 SpdData[MAX_SPD_RMT]; ///< Array of raw SPD data bytes 116 } BDAT_SPD_STRUCTURE; 117 118 typedef struct { 119 UINT8 DimmEnabled; ///< 0 = DIMM disabled 120 BDAT_RANK_STRUCTURE RankList[MAX_RANK_IN_DIMM]; ///< Array of ranks per DIMM 121 BDAT_SPD_STRUCTURE SpdBytes; ///< SPD data per DIMM 122 } BDAT_DIMM_STRUCTURE; 123 124 typedef struct { 125 UINT8 ChannelEnabled; ///< 0 = Channel disabled 126 UINT8 NumDimmSlot; ///< Number of slots per channel on the board 127 BDAT_DIMM_STRUCTURE DimmList[MAX_DIMMS_IN_CHANNEL]; ///< Array of DIMMs per channel 128 } BDAT_CHANNEL_STRUCTURE; 129 130 typedef struct { 131 UINT8 ControllerEnabled; ///< 0 = MC disabled 132 UINT16 ControllerDeviceId; ///< MC device Id 133 UINT8 ControllerRevisionId; ///< MC revision Id 134 UINT16 MemoryFrequency; ///< Memory frequency in units of MHz / 10 135 ///< e.g. ddrFreq = 13333 for tCK = 1.5 ns 136 UINT16 MemoryVoltage; ///< Memory Vdd in units of mV 137 ///< e.g. ddrVoltage = 1350 for Vdd = 1.35 V 138 UINT8 PiStep; ///< Step unit = piStep * tCK / 2048 139 ///< e.g. piStep = 16 for step = 11.7 ps (1/128 tCK) 140 UINT16 RxVrefStep; ///< Step unit = rxVrefStep * Vdd / 100 141 ///< e.g. rxVrefStep = 520 for step = 7.02 mV 142 UINT16 TxVrefStep; ///< Step unit = txVrefStep * Vdd / 100 143 UINT16 CaVrefStep; ///< Step unit = caVrefStep * Vdd / 100 144 UINT8 RecvenStep; ///< Step unit = recvenStep * tCK / 2048 145 UINT8 WrLevelStep; ///< Step unit = wrLevelStep * tCK / 2048 146 BDAT_CHANNEL_STRUCTURE ChannelList[MAX_CHANNEL]; ///< Array of channels per memory controller 147 } BDAT_SOCKET_STRUCTURE; 148 149 typedef struct { 150 union { 151 UINT32 Data32; ///< MRC version: Major.Minor.Revision.Build 152 struct { 153 UINT8 Build; ///< MRC version: Build 154 UINT8 Revision; ///< MRC version: Revision 155 UINT8 Minor; ///< MRC version: Minor 156 UINT8 Major; ///< MRC version: Major 157 } Version; 158 } RefCodeRevision; ///< Major.Minor.Revision.Build 159 UINT8 MaxController; ///< Max controllers per system, e.g. 1 160 UINT8 MaxChannel; ///< Max channels per memory controller, e.g. 2 161 UINT8 MaxDimm; ///< Max DIMM per channel, e.g. 2 162 UINT8 MaxRankDimm; ///< Max ranks per DIMM, e.g. 2 163 UINT8 MaxStrobe; ///< Number of Dqs used by the rank, e.g. 18 164 UINT8 MaxDq; ///< Number of Dq bits used by the rank, e.g. 72 165 UINT32 MarginLoopCount; ///< Units of cache line 166 BDAT_SOCKET_STRUCTURE ControllerList[MAX_CONTROLLERS]; ///< Array of memory controllers per system 167 } BDAT_SYSTEM_STRUCTURE; 168 169 typedef struct { 170 UINT32 Data1; 171 UINT16 Data2; 172 UINT16 Data3; 173 UINT8 Data4[8]; 174 } BDAT_EFI_GUID; 175 176 typedef struct { 177 UINT16 HobType; 178 UINT16 HobLength; 179 UINT32 Reserved; 180 } BDAT_HOB_GENERIC_HEADER; 181 182 typedef struct { 183 BDAT_HOB_GENERIC_HEADER Header; 184 BDAT_EFI_GUID Name; 185 /// 186 /// Guid specific data goes here 187 /// 188 } BDAT_HOB_GUID_TYPE; 189 190 typedef struct { 191 BDAT_EFI_GUID SchemaId; ///< The GUID uniquely identifies the format of the data contained within the structure. 192 UINT32 DataSize; ///< The total size of the memory block, including both the header as well as the schema specific data. 193 UINT16 Crc16; ///< Crc16 is computed in the same manner as the field in the BDAT_HEADER_STRUCTURE. 194 } MRC_BDAT_SCHEMA_HEADER_STRUCTURE; 195 196 typedef struct { 197 MRC_BDAT_SCHEMA_HEADER_STRUCTURE SchemaHeader; ///< The schema header. 198 union { 199 UINT32 Data; ///< MRC version: Major.Minor.Revision.Build 200 struct { 201 UINT8 Build; ///< MRC version: Build 202 UINT8 Revision; ///< MRC version: Revision 203 UINT8 Minor; ///< MRC version: Minor 204 UINT8 Major; ///< MRC version: Major 205 } Version; 206 } RefCodeRevision; ///< Major.Minor.Revision.Build 207 UINT8 MaxController; ///< Max controllers per system, e.g. 1 208 UINT8 MaxChannel; ///< Max channels per memory controller, e.g. 2 209 UINT8 MaxDimm; ///< Max DIMM per channel, e.g. 2 210 UINT8 MaxRankDimm; ///< Max ranks per DIMM, e.g. 2 211 UINT8 MaxStrobe; ///< Number of Dqs used by the rank, e.g. 18 212 UINT8 MaxDq; ///< Number of Dq bits used by the rank, e.g. 72 213 UINT32 MarginLoopCount; ///< Units of cache line 214 BDAT_SOCKET_STRUCTURE ControllerList[MAX_CONTROLLERS]; ///< Array of memory controllers per system 215 } BDAT_MEMORY_DATA_STRUCTURE; 216 217 typedef struct { 218 BDAT_HOB_GUID_TYPE HobGuidType; 219 BDAT_MEMORY_DATA_STRUCTURE MemorySchema; 220 } BDAT_MEMORY_DATA_HOB; 221 222 #pragma pack (pop) 223 224 typedef struct { 225 BDAT_HOB_GUID_TYPE HobGuidType; 226 UINT16 SchemaHobCount; 227 UINT16 Reserved; 228 BDAT_EFI_GUID SchemaHobGuids[MAX_SCHEMA_LIST_LENGTH]; 229 } MRC_BDAT_SCHEMA_LIST_HOB; 230 231 #endif //_MrcRmtData_h_ 232