1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Based on acpi.c from coreboot
4 *
5 * Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com>
6 * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
7 */
8
9 #define LOG_CATEGORY LOGC_ACPI
10
11 #include <common.h>
12 #include <bloblist.h>
13 #include <cpu.h>
14 #include <dm.h>
15 #include <log.h>
16 #include <dm/uclass-internal.h>
17 #include <mapmem.h>
18 #include <serial.h>
19 #include <version.h>
20 #include <acpi/acpigen.h>
21 #include <acpi/acpi_device.h>
22 #include <acpi/acpi_table.h>
23 #include <asm/acpi/global_nvs.h>
24 #include <asm/ioapic.h>
25 #include <asm/global_data.h>
26 #include <asm/lapic.h>
27 #include <asm/mpspec.h>
28 #include <asm/tables.h>
29 #include <asm/arch/global_nvs.h>
30 #include <dm/acpi.h>
31 #include <linux/err.h>
32
33 /*
34 * IASL compiles the dsdt entries and writes the hex values
35 * to a C array AmlCode[] (see dsdt.c).
36 */
37 extern const unsigned char AmlCode[];
38
39 /* ACPI RSDP address to be used in boot parameters */
40 static ulong acpi_rsdp_addr;
41
acpi_create_facs(struct acpi_facs * facs)42 static void acpi_create_facs(struct acpi_facs *facs)
43 {
44 memset((void *)facs, 0, sizeof(struct acpi_facs));
45
46 memcpy(facs->signature, "FACS", 4);
47 facs->length = sizeof(struct acpi_facs);
48 facs->hardware_signature = 0;
49 facs->firmware_waking_vector = 0;
50 facs->global_lock = 0;
51 facs->flags = 0;
52 facs->x_firmware_waking_vector_l = 0;
53 facs->x_firmware_waking_vector_h = 0;
54 facs->version = 1;
55 }
56
acpi_create_madt_lapic(struct acpi_madt_lapic * lapic,u8 cpu,u8 apic)57 static int acpi_create_madt_lapic(struct acpi_madt_lapic *lapic,
58 u8 cpu, u8 apic)
59 {
60 lapic->type = ACPI_APIC_LAPIC;
61 lapic->length = sizeof(struct acpi_madt_lapic);
62 lapic->flags = LOCAL_APIC_FLAG_ENABLED;
63 lapic->processor_id = cpu;
64 lapic->apic_id = apic;
65
66 return lapic->length;
67 }
68
acpi_create_madt_lapics(u32 current)69 int acpi_create_madt_lapics(u32 current)
70 {
71 struct udevice *dev;
72 int total_length = 0;
73 int cpu_num = 0;
74
75 for (uclass_find_first_device(UCLASS_CPU, &dev);
76 dev;
77 uclass_find_next_device(&dev)) {
78 struct cpu_plat *plat = dev_get_parent_plat(dev);
79 int length;
80
81 length = acpi_create_madt_lapic(
82 (struct acpi_madt_lapic *)current, cpu_num++,
83 plat->cpu_id);
84 current += length;
85 total_length += length;
86 }
87
88 return total_length;
89 }
90
acpi_create_madt_ioapic(struct acpi_madt_ioapic * ioapic,u8 id,u32 addr,u32 gsi_base)91 int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,
92 u32 addr, u32 gsi_base)
93 {
94 ioapic->type = ACPI_APIC_IOAPIC;
95 ioapic->length = sizeof(struct acpi_madt_ioapic);
96 ioapic->reserved = 0x00;
97 ioapic->gsi_base = gsi_base;
98 ioapic->ioapic_id = id;
99 ioapic->ioapic_addr = addr;
100
101 return ioapic->length;
102 }
103
acpi_create_madt_irqoverride(struct acpi_madt_irqoverride * irqoverride,u8 bus,u8 source,u32 gsirq,u16 flags)104 int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
105 u8 bus, u8 source, u32 gsirq, u16 flags)
106 {
107 irqoverride->type = ACPI_APIC_IRQ_SRC_OVERRIDE;
108 irqoverride->length = sizeof(struct acpi_madt_irqoverride);
109 irqoverride->bus = bus;
110 irqoverride->source = source;
111 irqoverride->gsirq = gsirq;
112 irqoverride->flags = flags;
113
114 return irqoverride->length;
115 }
116
acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi * lapic_nmi,u8 cpu,u16 flags,u8 lint)117 int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
118 u8 cpu, u16 flags, u8 lint)
119 {
120 lapic_nmi->type = ACPI_APIC_LAPIC_NMI;
121 lapic_nmi->length = sizeof(struct acpi_madt_lapic_nmi);
122 lapic_nmi->flags = flags;
123 lapic_nmi->processor_id = cpu;
124 lapic_nmi->lint = lint;
125
126 return lapic_nmi->length;
127 }
128
acpi_create_madt_irq_overrides(u32 current)129 static int acpi_create_madt_irq_overrides(u32 current)
130 {
131 struct acpi_madt_irqoverride *irqovr;
132 u16 sci_flags = MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH;
133 int length = 0;
134
135 irqovr = (void *)current;
136 length += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
137
138 irqovr = (void *)(current + length);
139 length += acpi_create_madt_irqoverride(irqovr, 0, 9, 9, sci_flags);
140
141 return length;
142 }
143
acpi_fill_madt(u32 current)144 __weak u32 acpi_fill_madt(u32 current)
145 {
146 current += acpi_create_madt_lapics(current);
147
148 current += acpi_create_madt_ioapic((struct acpi_madt_ioapic *)current,
149 io_apic_read(IO_APIC_ID) >> 24, IO_APIC_ADDR, 0);
150
151 current += acpi_create_madt_irq_overrides(current);
152
153 return current;
154 }
155
acpi_create_madt(struct acpi_madt * madt)156 static void acpi_create_madt(struct acpi_madt *madt)
157 {
158 struct acpi_table_header *header = &(madt->header);
159 u32 current = (u32)madt + sizeof(struct acpi_madt);
160
161 memset((void *)madt, 0, sizeof(struct acpi_madt));
162
163 /* Fill out header fields */
164 acpi_fill_header(header, "APIC");
165 header->length = sizeof(struct acpi_madt);
166 header->revision = ACPI_MADT_REV_ACPI_3_0;
167
168 madt->lapic_addr = LAPIC_DEFAULT_BASE;
169 madt->flags = ACPI_MADT_PCAT_COMPAT;
170
171 current = acpi_fill_madt(current);
172
173 /* (Re)calculate length and checksum */
174 header->length = current - (u32)madt;
175
176 header->checksum = table_compute_checksum((void *)madt, header->length);
177 }
178
acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig * mmconfig,u32 base,u16 seg_nr,u8 start,u8 end)179 int acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig *mmconfig, u32 base,
180 u16 seg_nr, u8 start, u8 end)
181 {
182 memset(mmconfig, 0, sizeof(*mmconfig));
183 mmconfig->base_address_l = base;
184 mmconfig->base_address_h = 0;
185 mmconfig->pci_segment_group_number = seg_nr;
186 mmconfig->start_bus_number = start;
187 mmconfig->end_bus_number = end;
188
189 return sizeof(struct acpi_mcfg_mmconfig);
190 }
191
acpi_fill_mcfg(u32 current)192 __weak u32 acpi_fill_mcfg(u32 current)
193 {
194 current += acpi_create_mcfg_mmconfig
195 ((struct acpi_mcfg_mmconfig *)current,
196 CONFIG_PCIE_ECAM_BASE, 0x0, 0x0, 255);
197
198 return current;
199 }
200
201 /* MCFG is defined in the PCI Firmware Specification 3.0 */
acpi_create_mcfg(struct acpi_mcfg * mcfg)202 static void acpi_create_mcfg(struct acpi_mcfg *mcfg)
203 {
204 struct acpi_table_header *header = &(mcfg->header);
205 u32 current = (u32)mcfg + sizeof(struct acpi_mcfg);
206
207 memset((void *)mcfg, 0, sizeof(struct acpi_mcfg));
208
209 /* Fill out header fields */
210 acpi_fill_header(header, "MCFG");
211 header->length = sizeof(struct acpi_mcfg);
212 header->revision = 1;
213
214 current = acpi_fill_mcfg(current);
215
216 /* (Re)calculate length and checksum */
217 header->length = current - (u32)mcfg;
218 header->checksum = table_compute_checksum((void *)mcfg, header->length);
219 }
220
221 /**
222 * acpi_create_tcpa() - Create a TCPA table
223 *
224 * @tcpa: Pointer to place to put table
225 *
226 * Trusted Computing Platform Alliance Capabilities Table
227 * TCPA PC Specific Implementation SpecificationTCPA is defined in the PCI
228 * Firmware Specification 3.0
229 */
acpi_create_tcpa(struct acpi_tcpa * tcpa)230 static int acpi_create_tcpa(struct acpi_tcpa *tcpa)
231 {
232 struct acpi_table_header *header = &tcpa->header;
233 u32 current = (u32)tcpa + sizeof(struct acpi_tcpa);
234 int size = 0x10000; /* Use this as the default size */
235 void *log;
236 int ret;
237
238 if (!CONFIG_IS_ENABLED(BLOBLIST))
239 return -ENXIO;
240 memset(tcpa, '\0', sizeof(struct acpi_tcpa));
241
242 /* Fill out header fields */
243 acpi_fill_header(header, "TCPA");
244 header->length = sizeof(struct acpi_tcpa);
245 header->revision = 1;
246
247 ret = bloblist_ensure_size_ret(BLOBLISTT_TCPA_LOG, &size, &log);
248 if (ret)
249 return log_msg_ret("blob", ret);
250
251 tcpa->platform_class = 0;
252 tcpa->laml = size;
253 tcpa->lasa = (ulong)log;
254
255 /* (Re)calculate length and checksum */
256 header->length = current - (u32)tcpa;
257 header->checksum = table_compute_checksum((void *)tcpa, header->length);
258
259 return 0;
260 }
261
get_tpm2_log(void ** ptrp,int * sizep)262 static int get_tpm2_log(void **ptrp, int *sizep)
263 {
264 const int tpm2_default_log_len = 0x10000;
265 int size;
266 int ret;
267
268 *sizep = 0;
269 size = tpm2_default_log_len;
270 ret = bloblist_ensure_size_ret(BLOBLISTT_TPM2_TCG_LOG, &size, ptrp);
271 if (ret)
272 return log_msg_ret("blob", ret);
273 *sizep = size;
274
275 return 0;
276 }
277
acpi_create_tpm2(struct acpi_tpm2 * tpm2)278 static int acpi_create_tpm2(struct acpi_tpm2 *tpm2)
279 {
280 struct acpi_table_header *header = &tpm2->header;
281 int tpm2_log_len;
282 void *lasa;
283 int ret;
284
285 memset((void *)tpm2, 0, sizeof(struct acpi_tpm2));
286
287 /*
288 * Some payloads like SeaBIOS depend on log area to use TPM2.
289 * Get the memory size and address of TPM2 log area or initialize it.
290 */
291 ret = get_tpm2_log(&lasa, &tpm2_log_len);
292 if (ret)
293 return ret;
294
295 /* Fill out header fields. */
296 acpi_fill_header(header, "TPM2");
297 memcpy(header->aslc_id, ASLC_ID, 4);
298
299 header->length = sizeof(struct acpi_tpm2);
300 header->revision = acpi_get_table_revision(ACPITAB_TPM2);
301
302 /* Hard to detect for coreboot. Just set it to 0 */
303 tpm2->platform_class = 0;
304
305 /* Must be set to 0 for FIFO-interface support */
306 tpm2->control_area = 0;
307 tpm2->start_method = 6;
308 memset(tpm2->msp, 0, sizeof(tpm2->msp));
309
310 /* Fill the log area size and start address fields. */
311 tpm2->laml = tpm2_log_len;
312 tpm2->lasa = (uintptr_t)lasa;
313
314 /* Calculate checksum. */
315 header->checksum = table_compute_checksum((void *)tpm2, header->length);
316
317 return 0;
318 }
319
acpi_fill_csrt(u32 current)320 __weak u32 acpi_fill_csrt(u32 current)
321 {
322 return 0;
323 }
324
acpi_create_csrt(struct acpi_csrt * csrt)325 static int acpi_create_csrt(struct acpi_csrt *csrt)
326 {
327 struct acpi_table_header *header = &(csrt->header);
328 u32 current = (u32)csrt + sizeof(struct acpi_csrt);
329 uint ptr;
330
331 memset((void *)csrt, 0, sizeof(struct acpi_csrt));
332
333 /* Fill out header fields */
334 acpi_fill_header(header, "CSRT");
335 header->length = sizeof(struct acpi_csrt);
336 header->revision = 0;
337
338 ptr = acpi_fill_csrt(current);
339 if (!ptr)
340 return -ENOENT;
341 current = ptr;
342
343 /* (Re)calculate length and checksum */
344 header->length = current - (u32)csrt;
345 header->checksum = table_compute_checksum((void *)csrt, header->length);
346
347 return 0;
348 }
349
acpi_create_spcr(struct acpi_spcr * spcr)350 static void acpi_create_spcr(struct acpi_spcr *spcr)
351 {
352 struct acpi_table_header *header = &(spcr->header);
353 struct serial_device_info serial_info = {0};
354 ulong serial_address, serial_offset;
355 struct udevice *dev;
356 uint serial_config;
357 uint serial_width;
358 int access_size;
359 int space_id;
360 int ret = -ENODEV;
361
362 memset((void *)spcr, 0, sizeof(struct acpi_spcr));
363
364 /* Fill out header fields */
365 acpi_fill_header(header, "SPCR");
366 header->length = sizeof(struct acpi_spcr);
367 header->revision = 2;
368
369 /* Read the device once, here. It is reused below */
370 dev = gd->cur_serial_dev;
371 if (dev)
372 ret = serial_getinfo(dev, &serial_info);
373 if (ret)
374 serial_info.type = SERIAL_CHIP_UNKNOWN;
375
376 /* Encode chip type */
377 switch (serial_info.type) {
378 case SERIAL_CHIP_16550_COMPATIBLE:
379 spcr->interface_type = ACPI_DBG2_16550_COMPATIBLE;
380 break;
381 case SERIAL_CHIP_UNKNOWN:
382 default:
383 spcr->interface_type = ACPI_DBG2_UNKNOWN;
384 break;
385 }
386
387 /* Encode address space */
388 switch (serial_info.addr_space) {
389 case SERIAL_ADDRESS_SPACE_MEMORY:
390 space_id = ACPI_ADDRESS_SPACE_MEMORY;
391 break;
392 case SERIAL_ADDRESS_SPACE_IO:
393 default:
394 space_id = ACPI_ADDRESS_SPACE_IO;
395 break;
396 }
397
398 serial_width = serial_info.reg_width * 8;
399 serial_offset = serial_info.reg_offset << serial_info.reg_shift;
400 serial_address = serial_info.addr + serial_offset;
401
402 /* Encode register access size */
403 switch (serial_info.reg_shift) {
404 case 0:
405 access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
406 break;
407 case 1:
408 access_size = ACPI_ACCESS_SIZE_WORD_ACCESS;
409 break;
410 case 2:
411 access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
412 break;
413 case 3:
414 access_size = ACPI_ACCESS_SIZE_QWORD_ACCESS;
415 break;
416 default:
417 access_size = ACPI_ACCESS_SIZE_UNDEFINED;
418 break;
419 }
420
421 debug("UART type %u @ %lx\n", spcr->interface_type, serial_address);
422
423 /* Fill GAS */
424 spcr->serial_port.space_id = space_id;
425 spcr->serial_port.bit_width = serial_width;
426 spcr->serial_port.bit_offset = 0;
427 spcr->serial_port.access_size = access_size;
428 spcr->serial_port.addrl = lower_32_bits(serial_address);
429 spcr->serial_port.addrh = upper_32_bits(serial_address);
430
431 /* Encode baud rate */
432 switch (serial_info.baudrate) {
433 case 9600:
434 spcr->baud_rate = 3;
435 break;
436 case 19200:
437 spcr->baud_rate = 4;
438 break;
439 case 57600:
440 spcr->baud_rate = 6;
441 break;
442 case 115200:
443 spcr->baud_rate = 7;
444 break;
445 default:
446 spcr->baud_rate = 0;
447 break;
448 }
449
450 serial_config = SERIAL_DEFAULT_CONFIG;
451 if (dev)
452 ret = serial_getconfig(dev, &serial_config);
453
454 spcr->parity = SERIAL_GET_PARITY(serial_config);
455 spcr->stop_bits = SERIAL_GET_STOP(serial_config);
456
457 /* No PCI devices for now */
458 spcr->pci_device_id = 0xffff;
459 spcr->pci_vendor_id = 0xffff;
460
461 /*
462 * SPCR has no clue if the UART base clock speed is different
463 * to the default one. However, the SPCR 1.04 defines baud rate
464 * 0 as a preconfigured state of UART and OS is supposed not
465 * to touch the configuration of the serial device.
466 */
467 if (serial_info.clock != SERIAL_DEFAULT_CLOCK)
468 spcr->baud_rate = 0;
469
470 /* Fix checksum */
471 header->checksum = table_compute_checksum((void *)spcr, header->length);
472 }
473
acpi_create_ssdt(struct acpi_ctx * ctx,struct acpi_table_header * ssdt,const char * oem_table_id)474 static int acpi_create_ssdt(struct acpi_ctx *ctx,
475 struct acpi_table_header *ssdt,
476 const char *oem_table_id)
477 {
478 memset((void *)ssdt, '\0', sizeof(struct acpi_table_header));
479
480 acpi_fill_header(ssdt, "SSDT");
481 ssdt->revision = acpi_get_table_revision(ACPITAB_SSDT);
482 ssdt->aslc_revision = 1;
483 ssdt->length = sizeof(struct acpi_table_header);
484
485 acpi_inc(ctx, sizeof(struct acpi_table_header));
486
487 acpi_fill_ssdt(ctx);
488
489 /* (Re)calculate length and checksum */
490 ssdt->length = ctx->current - (void *)ssdt;
491 ssdt->checksum = table_compute_checksum((void *)ssdt, ssdt->length);
492 log_debug("SSDT at %p, length %x\n", ssdt, ssdt->length);
493
494 /* Drop the table if it is empty */
495 if (ssdt->length == sizeof(struct acpi_table_header)) {
496 ctx->current = ssdt;
497 return -ENOENT;
498 }
499 acpi_align(ctx);
500
501 return 0;
502 }
503
504 /*
505 * QEMU's version of write_acpi_tables is defined in drivers/misc/qfw.c
506 */
write_acpi_tables(ulong start_addr)507 ulong write_acpi_tables(ulong start_addr)
508 {
509 const int thl = sizeof(struct acpi_table_header);
510 struct acpi_ctx *ctx;
511 struct acpi_facs *facs;
512 struct acpi_table_header *dsdt;
513 struct acpi_fadt *fadt;
514 struct acpi_table_header *ssdt;
515 struct acpi_mcfg *mcfg;
516 struct acpi_tcpa *tcpa;
517 struct acpi_madt *madt;
518 struct acpi_csrt *csrt;
519 struct acpi_spcr *spcr;
520 void *start;
521 int aml_len;
522 ulong addr;
523 int ret;
524 int i;
525
526 ctx = calloc(1, sizeof(*ctx));
527 if (!ctx)
528 return log_msg_ret("mem", -ENOMEM);
529 gd->acpi_ctx = ctx;
530
531 start = map_sysmem(start_addr, 0);
532
533 debug("ACPI: Writing ACPI tables at %lx\n", start_addr);
534
535 acpi_reset_items();
536 acpi_setup_base_tables(ctx, start);
537
538 debug("ACPI: * FACS\n");
539 facs = ctx->current;
540 acpi_inc_align(ctx, sizeof(struct acpi_facs));
541
542 acpi_create_facs(facs);
543
544 debug("ACPI: * DSDT\n");
545 dsdt = ctx->current;
546
547 /* Put the table header first */
548 memcpy(dsdt, &AmlCode, thl);
549 acpi_inc(ctx, thl);
550 log_debug("DSDT starts at %p, hdr ends at %p\n", dsdt, ctx->current);
551
552 /* If the table is not empty, allow devices to inject things */
553 aml_len = dsdt->length - thl;
554 if (aml_len) {
555 void *base = ctx->current;
556
557 acpi_inject_dsdt(ctx);
558 log_debug("Added %x bytes from inject_dsdt, now at %p\n",
559 ctx->current - base, ctx->current);
560 log_debug("Copy AML code size %x to %p\n", aml_len,
561 ctx->current);
562 memcpy(ctx->current, AmlCode + thl, aml_len);
563 acpi_inc(ctx, aml_len);
564 }
565
566 dsdt->length = ctx->current - (void *)dsdt;
567 acpi_align(ctx);
568 log_debug("Updated DSDT length to %x, total %x\n", dsdt->length,
569 ctx->current - (void *)dsdt);
570
571 if (!IS_ENABLED(CONFIG_ACPI_GNVS_EXTERNAL)) {
572 /* Pack GNVS into the ACPI table area */
573 for (i = 0; i < dsdt->length; i++) {
574 u32 *gnvs = (u32 *)((u32)dsdt + i);
575
576 if (*gnvs == ACPI_GNVS_ADDR) {
577 *gnvs = map_to_sysmem(ctx->current);
578 debug("Fix up global NVS in DSDT to %#08x\n",
579 *gnvs);
580 break;
581 }
582 }
583
584 /*
585 * Fill in platform-specific global NVS variables. If this fails
586 * we cannot return the error but this should only happen while
587 * debugging.
588 */
589 addr = acpi_create_gnvs(ctx->current);
590 if (IS_ERR_VALUE(addr))
591 printf("Error: Gailed to create GNVS\n");
592 acpi_inc_align(ctx, sizeof(struct acpi_global_nvs));
593 }
594
595 /*
596 * Recalculate the length and update the DSDT checksum since we patched
597 * the GNVS address. Set the checksum to zero since it is part of the
598 * region being checksummed.
599 */
600 dsdt->checksum = 0;
601 dsdt->checksum = table_compute_checksum((void *)dsdt, dsdt->length);
602
603 /*
604 * Fill in platform-specific global NVS variables. If this fails we
605 * cannot return the error but this should only happen while debugging.
606 */
607 addr = acpi_create_gnvs(ctx->current);
608 if (IS_ERR_VALUE(addr))
609 printf("Error: Failed to create GNVS\n");
610
611 acpi_inc_align(ctx, sizeof(struct acpi_global_nvs));
612
613 debug("ACPI: * FADT\n");
614 fadt = ctx->current;
615 acpi_inc_align(ctx, sizeof(struct acpi_fadt));
616 acpi_create_fadt(fadt, facs, dsdt);
617 acpi_add_table(ctx, fadt);
618
619 debug("ACPI: * SSDT\n");
620 ssdt = (struct acpi_table_header *)ctx->current;
621 if (!acpi_create_ssdt(ctx, ssdt, OEM_TABLE_ID))
622 acpi_add_table(ctx, ssdt);
623
624 debug("ACPI: * MCFG\n");
625 mcfg = ctx->current;
626 acpi_create_mcfg(mcfg);
627 acpi_inc_align(ctx, mcfg->header.length);
628 acpi_add_table(ctx, mcfg);
629
630 if (IS_ENABLED(CONFIG_TPM_V2)) {
631 struct acpi_tpm2 *tpm2;
632
633 debug("ACPI: * TPM2\n");
634 tpm2 = (struct acpi_tpm2 *)ctx->current;
635 ret = acpi_create_tpm2(tpm2);
636 if (!ret) {
637 acpi_inc_align(ctx, tpm2->header.length);
638 acpi_add_table(ctx, tpm2);
639 } else {
640 log_warning("TPM2 table creation failed\n");
641 }
642 }
643
644 debug("ACPI: * MADT\n");
645 madt = ctx->current;
646 acpi_create_madt(madt);
647 acpi_inc_align(ctx, madt->header.length);
648 acpi_add_table(ctx, madt);
649
650 if (IS_ENABLED(CONFIG_TPM_V1)) {
651 debug("ACPI: * TCPA\n");
652 tcpa = (struct acpi_tcpa *)ctx->current;
653 ret = acpi_create_tcpa(tcpa);
654 if (ret) {
655 log_warning("Failed to create TCPA table (err=%d)\n",
656 ret);
657 } else {
658 acpi_inc_align(ctx, tcpa->header.length);
659 acpi_add_table(ctx, tcpa);
660 }
661 }
662
663 debug("ACPI: * CSRT\n");
664 csrt = ctx->current;
665 if (!acpi_create_csrt(csrt)) {
666 acpi_inc_align(ctx, csrt->header.length);
667 acpi_add_table(ctx, csrt);
668 }
669
670 debug("ACPI: * SPCR\n");
671 spcr = ctx->current;
672 acpi_create_spcr(spcr);
673 acpi_inc_align(ctx, spcr->header.length);
674 acpi_add_table(ctx, spcr);
675
676 acpi_write_dev_tables(ctx);
677
678 addr = map_to_sysmem(ctx->current);
679 debug("current = %lx\n", addr);
680
681 acpi_rsdp_addr = (unsigned long)ctx->rsdp;
682 debug("ACPI: done\n");
683
684 return addr;
685 }
686
acpi_get_rsdp_addr(void)687 ulong acpi_get_rsdp_addr(void)
688 {
689 return acpi_rsdp_addr;
690 }
691
692 /**
693 * acpi_write_hpet() - Write out a HPET table
694 *
695 * Write out the table for High-Precision Event Timers
696 *
697 * @hpet: Place to put HPET table
698 */
acpi_create_hpet(struct acpi_hpet * hpet)699 static int acpi_create_hpet(struct acpi_hpet *hpet)
700 {
701 struct acpi_table_header *header = &hpet->header;
702 struct acpi_gen_regaddr *addr = &hpet->addr;
703
704 /*
705 * See IA-PC HPET (High Precision Event Timers) Specification v1.0a
706 * https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/software-developers-hpet-spec-1-0a.pdf
707 */
708 memset((void *)hpet, '\0', sizeof(struct acpi_hpet));
709
710 /* Fill out header fields. */
711 acpi_fill_header(header, "HPET");
712
713 header->aslc_revision = ASL_REVISION;
714 header->length = sizeof(struct acpi_hpet);
715 header->revision = acpi_get_table_revision(ACPITAB_HPET);
716
717 /* Fill out HPET address */
718 addr->space_id = 0; /* Memory */
719 addr->bit_width = 64;
720 addr->bit_offset = 0;
721 addr->addrl = CONFIG_HPET_ADDRESS & 0xffffffff;
722 addr->addrh = ((unsigned long long)CONFIG_HPET_ADDRESS) >> 32;
723
724 hpet->id = *(u32 *)CONFIG_HPET_ADDRESS;
725 hpet->number = 0;
726 hpet->min_tick = 0; /* HPET_MIN_TICKS */
727
728 header->checksum = table_compute_checksum(hpet,
729 sizeof(struct acpi_hpet));
730
731 return 0;
732 }
733
acpi_write_hpet(struct acpi_ctx * ctx)734 int acpi_write_hpet(struct acpi_ctx *ctx)
735 {
736 struct acpi_hpet *hpet;
737 int ret;
738
739 log_debug("ACPI: * HPET\n");
740
741 hpet = ctx->current;
742 acpi_inc_align(ctx, sizeof(struct acpi_hpet));
743 acpi_create_hpet(hpet);
744 ret = acpi_add_table(ctx, hpet);
745 if (ret)
746 return log_msg_ret("add", ret);
747
748 return 0;
749 }
750
acpi_write_dbg2_pci_uart(struct acpi_ctx * ctx,struct udevice * dev,uint access_size)751 int acpi_write_dbg2_pci_uart(struct acpi_ctx *ctx, struct udevice *dev,
752 uint access_size)
753 {
754 struct acpi_dbg2_header *dbg2 = ctx->current;
755 char path[ACPI_PATH_MAX];
756 struct acpi_gen_regaddr address;
757 phys_addr_t addr;
758 int ret;
759
760 if (!device_active(dev)) {
761 log_info("Device not enabled\n");
762 return -EACCES;
763 }
764 /*
765 * PCI devices don't remember their resource allocation information in
766 * U-Boot at present. We assume that MMIO is used for the UART and that
767 * the address space is 32 bytes: ns16550 uses 8 registers of up to
768 * 32-bits each. This is only for debugging so it is not a big deal.
769 */
770 addr = dm_pci_read_bar32(dev, 0);
771 log_debug("UART addr %lx\n", (ulong)addr);
772
773 memset(&address, '\0', sizeof(address));
774 address.space_id = ACPI_ADDRESS_SPACE_MEMORY;
775 address.addrl = (uint32_t)addr;
776 address.addrh = (uint32_t)((addr >> 32) & 0xffffffff);
777 address.access_size = access_size;
778
779 ret = acpi_device_path(dev, path, sizeof(path));
780 if (ret)
781 return log_msg_ret("path", ret);
782 acpi_create_dbg2(dbg2, ACPI_DBG2_SERIAL_PORT,
783 ACPI_DBG2_16550_COMPATIBLE, &address, 0x1000, path);
784
785 acpi_inc_align(ctx, dbg2->header.length);
786 acpi_add_table(ctx, dbg2);
787
788 return 0;
789 }
790
acpi_fadt_common(struct acpi_fadt * fadt,struct acpi_facs * facs,void * dsdt)791 void acpi_fadt_common(struct acpi_fadt *fadt, struct acpi_facs *facs,
792 void *dsdt)
793 {
794 struct acpi_table_header *header = &fadt->header;
795
796 memset((void *)fadt, '\0', sizeof(struct acpi_fadt));
797
798 acpi_fill_header(header, "FACP");
799 header->length = sizeof(struct acpi_fadt);
800 header->revision = 4;
801 memcpy(header->oem_id, OEM_ID, 6);
802 memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
803 memcpy(header->aslc_id, ASLC_ID, 4);
804 header->aslc_revision = 1;
805
806 fadt->firmware_ctrl = (unsigned long)facs;
807 fadt->dsdt = (unsigned long)dsdt;
808
809 fadt->x_firmware_ctl_l = (unsigned long)facs;
810 fadt->x_firmware_ctl_h = 0;
811 fadt->x_dsdt_l = (unsigned long)dsdt;
812 fadt->x_dsdt_h = 0;
813
814 fadt->preferred_pm_profile = ACPI_PM_MOBILE;
815
816 /* Use ACPI 3.0 revision */
817 fadt->header.revision = 4;
818 }
819
acpi_create_dmar_drhd(struct acpi_ctx * ctx,uint flags,uint segment,u64 bar)820 void acpi_create_dmar_drhd(struct acpi_ctx *ctx, uint flags, uint segment,
821 u64 bar)
822 {
823 struct dmar_entry *drhd = ctx->current;
824
825 memset(drhd, '\0', sizeof(*drhd));
826 drhd->type = DMAR_DRHD;
827 drhd->length = sizeof(*drhd); /* will be fixed up later */
828 drhd->flags = flags;
829 drhd->segment = segment;
830 drhd->bar = bar;
831 acpi_inc(ctx, drhd->length);
832 }
833
acpi_create_dmar_rmrr(struct acpi_ctx * ctx,uint segment,u64 bar,u64 limit)834 void acpi_create_dmar_rmrr(struct acpi_ctx *ctx, uint segment, u64 bar,
835 u64 limit)
836 {
837 struct dmar_rmrr_entry *rmrr = ctx->current;
838
839 memset(rmrr, '\0', sizeof(*rmrr));
840 rmrr->type = DMAR_RMRR;
841 rmrr->length = sizeof(*rmrr); /* will be fixed up later */
842 rmrr->segment = segment;
843 rmrr->bar = bar;
844 rmrr->limit = limit;
845 acpi_inc(ctx, rmrr->length);
846 }
847
acpi_dmar_drhd_fixup(struct acpi_ctx * ctx,void * base)848 void acpi_dmar_drhd_fixup(struct acpi_ctx *ctx, void *base)
849 {
850 struct dmar_entry *drhd = base;
851
852 drhd->length = ctx->current - base;
853 }
854
acpi_dmar_rmrr_fixup(struct acpi_ctx * ctx,void * base)855 void acpi_dmar_rmrr_fixup(struct acpi_ctx *ctx, void *base)
856 {
857 struct dmar_rmrr_entry *rmrr = base;
858
859 rmrr->length = ctx->current - base;
860 }
861
acpi_create_dmar_ds(struct acpi_ctx * ctx,enum dev_scope_type type,uint enumeration_id,pci_dev_t bdf)862 static int acpi_create_dmar_ds(struct acpi_ctx *ctx, enum dev_scope_type type,
863 uint enumeration_id, pci_dev_t bdf)
864 {
865 /* we don't support longer paths yet */
866 const size_t dev_scope_length = sizeof(struct dev_scope) + 2;
867 struct dev_scope *ds = ctx->current;
868
869 memset(ds, '\0', dev_scope_length);
870 ds->type = type;
871 ds->length = dev_scope_length;
872 ds->enumeration = enumeration_id;
873 ds->start_bus = PCI_BUS(bdf);
874 ds->path[0].dev = PCI_DEV(bdf);
875 ds->path[0].fn = PCI_FUNC(bdf);
876
877 return ds->length;
878 }
879
acpi_create_dmar_ds_pci_br(struct acpi_ctx * ctx,pci_dev_t bdf)880 int acpi_create_dmar_ds_pci_br(struct acpi_ctx *ctx, pci_dev_t bdf)
881 {
882 return acpi_create_dmar_ds(ctx, SCOPE_PCI_SUB, 0, bdf);
883 }
884
acpi_create_dmar_ds_pci(struct acpi_ctx * ctx,pci_dev_t bdf)885 int acpi_create_dmar_ds_pci(struct acpi_ctx *ctx, pci_dev_t bdf)
886 {
887 return acpi_create_dmar_ds(ctx, SCOPE_PCI_ENDPOINT, 0, bdf);
888 }
889
acpi_create_dmar_ds_ioapic(struct acpi_ctx * ctx,uint enumeration_id,pci_dev_t bdf)890 int acpi_create_dmar_ds_ioapic(struct acpi_ctx *ctx, uint enumeration_id,
891 pci_dev_t bdf)
892 {
893 return acpi_create_dmar_ds(ctx, SCOPE_IOAPIC, enumeration_id, bdf);
894 }
895
acpi_create_dmar_ds_msi_hpet(struct acpi_ctx * ctx,uint enumeration_id,pci_dev_t bdf)896 int acpi_create_dmar_ds_msi_hpet(struct acpi_ctx *ctx, uint enumeration_id,
897 pci_dev_t bdf)
898 {
899 return acpi_create_dmar_ds(ctx, SCOPE_MSI_HPET, enumeration_id, bdf);
900 }
901