1/*
2 * Copyright (C) 2018 MediaTek Inc.
3 * Author: Ryder Lee <ryder.lee@mediatek.com>
4 *
5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 */
7
8/dts-v1/;
9#include "mt7623.dtsi"
10#include "mt7623-u-boot.dtsi"
11
12/ {
13	model = "UniElec U7623-02 eMMC";
14	compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
15
16	memory@80000000 {
17		device_type = "memory";
18		reg = <0 0x80000000 0 0x20000000>;
19	};
20
21	chosen {
22		stdout-path = &uart2;
23		tick-timer = &timer0;
24	};
25
26	reg_1p8v: regulator-1p8v {
27		compatible = "regulator-fixed";
28		regulator-name = "fixed-1.8V";
29		regulator-min-microvolt = <1800000>;
30		regulator-max-microvolt = <1800000>;
31		regulator-boot-on;
32		regulator-always-on;
33	};
34
35	reg_3p3v: regulator-3p3v {
36		compatible = "regulator-fixed";
37		regulator-name = "fixed-3.3V";
38		regulator-min-microvolt = <3300000>;
39		regulator-max-microvolt = <3300000>;
40		regulator-boot-on;
41		regulator-always-on;
42	};
43
44	reg_5v: regulator-5v {
45		compatible = "regulator-fixed";
46		regulator-name = "fixed-5V";
47		regulator-min-microvolt = <5000000>;
48		regulator-max-microvolt = <5000000>;
49		regulator-boot-on;
50		regulator-always-on;
51	};
52
53	leds {
54		compatible = "gpio-leds";
55
56		led3 {
57			label = "u7623-01:green:led3";
58			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
59			default-state = "off";
60		};
61
62		led4 {
63			label = "u7623-01:green:led4";
64			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
65			default-state = "off";
66		};
67	};
68};
69
70&eth {
71	status = "okay";
72	mediatek,gmac-id = <0>;
73	phy-mode = "rgmii";
74	mediatek,switch = "mt7530";
75	mediatek,mcm;
76
77	fixed-link {
78		speed = <1000>;
79		full-duplex;
80	};
81};
82
83&mmc0 {
84	pinctrl-names = "default";
85	pinctrl-0 = <&mmc0_pins_default>;
86	status = "okay";
87	bus-width = <8>;
88	max-frequency = <50000000>;
89	cap-mmc-highspeed;
90	vmmc-supply = <&reg_3p3v>;
91	vqmmc-supply = <&reg_1p8v>;
92	non-removable;
93};
94
95&pinctrl {
96	ephy_default: ephy_default {
97		mux {
98			function = "eth";
99			groups = "mdc_mdio", "ephy";
100		};
101
102		conf {
103			pins = "G2_TXEN", "G2_TXD0", "G2_TXD1", "G2_TXD2",
104			       "G2_TXD3", "G2_TXC", "G2_RXC", "G2_RXD0",
105			       "G2_RXD1", "G2_RXD2", "G2_RXD3", "G2_RXDV",
106			       "MDC", "MDIO";
107			drive-strength = <12>;
108			mediatek,tdsel = <5>;
109		};
110	};
111
112	mmc0_pins_default: mmc0default {
113		mux {
114			function = "msdc";
115			groups =  "msdc0";
116		};
117
118		conf-cmd-data {
119			pins = "MSDC0_CMD", "MSDC0_DAT0", "MSDC0_DAT1",
120			       "MSDC0_DAT2", "MSDC0_DAT3", "MSDC0_DAT4",
121			       "MSDC0_DAT5", "MSDC0_DAT6", "MSDC0_DAT7";
122			input-enable;
123			bias-pull-up;
124		};
125
126		conf-clk {
127			pins = "MSDC0_CLK";
128			bias-pull-down;
129		};
130
131		conf-rst {
132			pins = "MSDC0_RSTB";
133			bias-pull-up;
134		};
135	};
136
137	pcie_default: pcie-default {
138		mux {
139			function = "pcie";
140			groups =  "pcie0_0_perst", "pcie1_0_perst";
141		};
142	};
143
144	uart0_pins_a: uart0-default {
145		mux {
146			function = "uart";
147			groups =  "uart0_0_txd_rxd";
148		};
149	};
150
151	uart1_pins_a: uart1-default {
152		mux {
153			function = "uart";
154			groups =  "uart1_0_txd_rxd";
155		};
156	};
157
158	uart2_pins_a: uart2-default {
159		mux {
160			function = "uart";
161			groups =  "uart2_0_txd_rxd";
162		};
163	};
164
165	uart2_pins_b: uart2-alt {
166		mux {
167			function = "uart";
168			groups =  "uart2_1_txd_rxd";
169		};
170	};
171};
172
173&pcie {
174	pinctrl-names = "default";
175	pinctrl-0 = <&pcie_default>;
176	status = "okay";
177
178	pcie@0,0 {
179		status = "okay";
180	};
181
182	pcie@1,0 {
183		status = "okay";
184	};
185};
186
187&pcie0_phy {
188	status = "okay";
189};
190
191&pcie1_phy {
192	status = "okay";
193};
194
195&uart0 {
196	pinctrl-names = "default";
197	pinctrl-0 = <&uart0_pins_a>;
198	status = "okay";
199};
200
201&uart1 {
202	pinctrl-names = "default";
203	pinctrl-0 = <&uart1_pins_a>;
204	status = "okay";
205};
206
207&uart2 {
208	pinctrl-names = "default";
209	pinctrl-0 = <&uart2_pins_b>;
210	status = "okay";
211};
212