1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2011
4  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
5  */
6 
7 #ifndef __ASM_ARCH_CLOCK_H
8 #define __ASM_ARCH_CLOCK_H
9 
10 #ifdef CONFIG_MX35_HCLK_FREQ
11 #define MXC_HCLK	CONFIG_MX35_HCLK_FREQ
12 #else
13 #define MXC_HCLK	24000000
14 #endif
15 
16 #ifdef CONFIG_MX35_CLK32
17 #define MXC_CLK32	CONFIG_MX35_CLK32
18 #else
19 #define MXC_CLK32	32768
20 #endif
21 
22 enum mxc_clock {
23 	MXC_ARM_CLK,
24 	MXC_AHB_CLK,
25 	MXC_IPG_CLK,
26 	MXC_IPG_PERCLK,
27 	MXC_UART_CLK,
28 	MXC_ESDHC1_CLK,
29 	MXC_ESDHC2_CLK,
30 	MXC_ESDHC3_CLK,
31 	MXC_USB_CLK,
32 	MXC_CSPI_CLK,
33 	MXC_FEC_CLK,
34 	MXC_I2C_CLK,
35 };
36 
37 enum mxc_main_clock {
38 	CPU_CLK,
39 	AHB_CLK,
40 	IPG_CLK,
41 	IPG_PER_CLK,
42 	NFC_CLK,
43 	USB_CLK,
44 	HSP_CLK,
45 };
46 
47 enum mxc_peri_clock {
48 	UART1_BAUD,
49 	UART2_BAUD,
50 	UART3_BAUD,
51 	SSI1_BAUD,
52 	SSI2_BAUD,
53 	CSI_BAUD,
54 	MSHC_CLK,
55 	ESDHC1_CLK,
56 	ESDHC2_CLK,
57 	ESDHC3_CLK,
58 	SPDIF_CLK,
59 	SPI1_CLK,
60 	SPI2_CLK,
61 };
62 
63 u32 imx_get_uartclk(void);
64 u32 imx_get_fecclk(void);
65 unsigned int mxc_get_clock(enum mxc_clock clk);
66 
67 #endif /* __ASM_ARCH_CLOCK_H */
68