1/* 2 * Copyright (C) 2014 DENX Software Engineering GmbH 3 * Heiko Schocher <hs@denx.de> 4 * 5 * Based on: 6 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12/dts-v1/; 13 14#include "am33xx.dtsi" 15#include <dt-bindings/input/input.h> 16 17/ { 18 model = "RUT"; 19 compatible = "ti,am335x-evm", "ti,am33xx"; 20 21 buzzer { 22 compatible = "pwm-beeper"; 23 pwms = <&ecap0 0 16000 0>; 24 }; 25 26 chosen { 27 stdout-path = &uart0; 28 tick-timer = &timer2; 29 }; 30 31 cpus { 32 cpu@0 { 33 cpu0-supply = <&dcdc2_reg>; 34 }; 35 }; 36 37 gpio_keys: powerfail-keys { 38 compatible = "gpio-keys"; 39 autorepeat; 40 41 pwr-fail0 { 42 label = "power-fail"; 43 linux,code = <KEY_POWER>; 44 gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>; 45 gpio-key,wakeup; 46 }; 47 48 pwr-fail1 { 49 label = "power-fail-redundant"; 50 linux,code = <KEY_POWER>; 51 gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; 52 gpio-key,wakeup; 53 }; 54 }; 55 56 leds { 57 compatible = "gpio-leds"; 58 59 led_green { 60 label = "rut:green:debug:run_mode"; 61 gpios = <&gpio3 20 1>; 62 /* activelow = 1, default trigger heartbeat */ 63 }; 64 led_yellow { 65 label = "rut:debug:yellow:osc_ch1"; 66 gpios = <&gpio0 17 1>; 67 /* activelow = 1, default trigger mmc0 */ 68 }; 69 led_red { 70 label = "rut:debug:red:osc_ch2"; 71 gpios = <&gpio0 16 1>; 72 /* activelow = 1, default trigger debug_osc_ch2 */ 73 }; 74 /* optional */ 75 led_alive { 76 label = "rut:alive"; 77 gpios = <&gpio0 15 1>; 78 linux,default-trigger = "heartbeat"; 79 /* activelow = 1, default trigger heartbeat */ 80 }; 81 82 }; 83 84 memory { 85 device_type = "memory"; 86 reg = <0x80000000 0x10000000>; /* 256 MB */ 87 }; 88 89 panel { 90 compatible = "ti,tilcdc,panel"; 91 pinctrl-names = "default"; 92 pinctrl-0 = <&lcd_pins_s0>; 93 status = "okay"; 94 95 /* FORMIKE_KWH043ST20_F01 */ 96 panel-info { 97 ac-bias = <255>; 98 ac-bias-intrpt = <0>; 99 dma-burst-sz = <16>; 100 bpp = <16>; 101 fdd = <0x80>; 102 sync-edge = <0>; 103 sync-ctrl = <1>; 104 raster-order = <0>; 105 fifo-th = <0>; 106 tft-alt-mode = <0>; 107 invert-pxl-clk = <1>; 108 }; 109 110 display-timings { 111 native-mode = <&timing1>; 112 timing1: 480x800p60 { 113 clock-frequency = <29925000>; 114 hactive = <480>; 115 vactive = <800>; 116 hfront-porch = <50>; 117 hback-porch = <50>; 118 hsync-len = <50>; 119 vback-porch = <50>; 120 vfront-porch = <50>; 121 vsync-len = <50>; 122 hsync-active = <1>; 123 vsync-active = <1>; 124 }; 125 }; 126 }; 127 128 vmmc: fixedregulator3 { 129 compatible = "regulator-fixed"; 130 regulator-name = "vmmc"; 131 regulator-min-microvolt = <3300000>; 132 regulator-max-microvolt = <3300000>; 133 }; 134 135 watchdog { 136 compatible = "linux,wdt-gpio"; 137 gpios = <&gpio0 14 0>; 138 hw_algo = "level"; 139 hw_margin_ms = <30000>; 140 }; 141}; 142 143&aes { 144 status = "okay"; 145}; 146 147&cppi41dma { 148 status = "okay"; 149}; 150 151&cpsw_emac0 { 152 phy-mode = "rmii"; 153 phy-handle = <ðernet_phy>; 154}; 155 156&davinci_mdio { 157 pinctrl-names = "default", "sleep"; 158 pinctrl-0 = <&davinci_mdio_default>; 159 pinctrl-1 = <&davinci_mdio_sleep>; 160 status = "okay"; 161 gpios = <&gpio2 18 0>; 162 163 ethernet_phy: ethernet-phy@1 { 164 compatible = "ethernet-phy-id2000.5ce1"; 165 reg = <1>; 166 natsemi,master_mode_fixup; 167 }; 168}; 169 170&elm { 171 status = "okay"; 172}; 173 174&epwmss0 { 175 status = "okay"; 176 177 ecap0: ecap@100 { 178 status = "okay"; 179 pinctrl-names = "default"; 180 pinctrl-0 = <&ecap0_pins>; 181 }; 182}; 183 184&epwmss1 { 185 status = "okay"; 186 pinctrl-names = "default"; 187 pinctrl-0 = <&epwmss1_pins>; 188}; 189 190&gpmc { 191 pinctrl-names = "default"; 192 pinctrl-0 = <&nandflash_pins>; 193 status = "okay"; 194 195 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ 196 197 nand@0,0 { 198 reg = <0 0 0>; /* CS0, offset 0 */ 199 nand-bus-width = <8>; 200 ti,nand-ecc-opt = "bch8"; 201 gpmc,device-nand = "true"; 202 gpmc,device-width = <1>; 203 gpmc,sync-clk-ps = <0>; 204 gpmc,cs-on-ns = <0>; 205 gpmc,cs-rd-off-ns = <57>; 206 gpmc,cs-wr-off-ns = <57>; 207 gpmc,adv-on-ns = <0>; 208 gpmc,adv-rd-off-ns = <57>; 209 gpmc,adv-wr-off-ns = <57>; 210 gpmc,we-on-ns = <0>; 211 gpmc,we-off-ns = <48>; 212 gpmc,oe-on-ns = <0>; 213 gpmc,oe-off-ns = <57>; 214 gpmc,access-ns = <38>; 215 gpmc,rd-cycle-ns = <67>; 216 gpmc,wr-cycle-ns = <67>; 217 gpmc,wait-on-read = "true"; 218 gpmc,wait-on-write = "true"; 219 gpmc,bus-turnaround-ns = <0>; 220 gpmc,cycle2cycle-delay-ns = <0>; 221 gpmc,clk-activation-ns = <0>; 222 gpmc,wait-monitoring-ns = <0>; 223 gpmc,wr-access-ns = <96>; 224 gpmc,wr-data-mux-bus-ns = <0>; 225 226 #address-cells = <1>; 227 #size-cells = <1>; 228 elm_id = <&elm>; 229 }; 230}; 231 232&i2c0 { 233 pinctrl-names = "default"; 234 pinctrl-0 = <&i2c0_pins>; 235 clock-frequency = <400000>; 236 status = "okay"; 237 238 eeprom: eeprom@50 { 239 compatible = "atmel,24c128"; 240 reg = <0x50>; 241 pagesize = <32>; 242 }; 243 244 tps: tps@24 { 245 reg = <0x24>; 246 }; 247}; 248 249&i2c1 { 250 pinctrl-names = "default"; 251 pinctrl-0 = <&i2c1_pins>; 252 clock-frequency = <100000>; 253 status = "okay"; 254 255 atmel: atmel_mxt_ts@4a { 256 compatible = "atmel,maxtouch"; 257 reg = <0x4a>; 258 interrupt-parent = <&gpio1>; 259 interrupts = <28 8>; 260 gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>; 261 }; 262 263 temp@48 { 264 compatible = "st,ds75"; 265 reg = <0x4c>; 266 }; 267}; 268 269&lcdc { 270 status = "okay"; 271}; 272 273&mac { 274 pinctrl-names = "default", "sleep"; 275 pinctrl-0 = <&cpsw_default>; 276 pinctrl-1 = <&cpsw_sleep>; 277 status = "okay"; 278}; 279 280&mmc1 { 281 vmmc-supply = <&vmmc>; 282 pinctrl-names = "default"; 283 pinctrl-0 = <&mmc1_pins>; 284 status = "okay"; 285}; 286 287&phy_sel { 288 rmii-clock-ext; 289}; 290 291&sham { 292 status = "okay"; 293}; 294 295&spi0 { 296 pinctrl-names = "default"; 297 pinctrl-0 = <&spi0_pins>; 298 status = "okay"; 299 spi-flash@0 { 300 #address-cells = <1>; 301 #size-cells = <1>; 302 compatible = "mx25l25635e"; 303 reg = <0>; /* Chip select 0 */ 304 spi-max-frequency = <24000000>; 305 306 partition@0 { 307 label = "dummy"; 308 reg = <0x0000000 0x8000>; 309 }; 310 }; 311}; 312 313&spi1 { 314 pinctrl-names = "default"; 315 pinctrl-0 = <&spi1_pins>; 316 status = "okay"; 317 318 lcd_init: lcd@0 { 319 compatible = "formike,kwh043st20"; 320 reg = <0>; 321 reset-gpios = <&gpio3 19 0>; 322 spi-max-frequency = <1200000>; 323 spi-cpol; 324 spi-cpha; 325 power-on-delay = <10>; 326 reset-delay = <10>; 327 }; 328}; 329 330/include/ "tps65217.dtsi" 331 332&tps { 333 backlight0: backlight { 334 isel = <1>; /* 1 - ISET1, 2 ISET2 */ 335 fdim = <1000>; /* TPS65217_BL_FDIM_100HZ */ 336 default-brightness = <80>; 337 }; 338 339 regulators { 340 dcdc1_reg: regulator@0 { 341 regulator-always-on; 342 }; 343 344 dcdc2_reg: regulator@1 { 345 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 346 regulator-name = "vdd_mpu"; 347 regulator-min-microvolt = <925000>; 348 regulator-max-microvolt = <1325000>; 349 regulator-boot-on; 350 regulator-always-on; 351 }; 352 353 dcdc3_reg: regulator@2 { 354 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 355 regulator-name = "vdd_core"; 356 regulator-min-microvolt = <925000>; 357 regulator-max-microvolt = <1150000>; 358 regulator-boot-on; 359 regulator-always-on; 360 }; 361 362 ldo1_reg: regulator@3 { 363 regulator-always-on; 364 }; 365 366 ldo2_reg: regulator@4 { 367 regulator-always-on; 368 }; 369 370 ldo3_reg: regulator@5 { 371 regulator-always-on; 372 }; 373 374 ldo4_reg: regulator@6 { 375 regulator-always-on; 376 }; 377 }; 378}; 379 380&tscadc { 381 status = "okay"; 382 adc { 383 ti,adc-channels = <4 5 6 7>; 384 }; 385}; 386 387&uart0 { 388 pinctrl-names = "default"; 389 pinctrl-0 = <&uart0_pins>; 390 391 status = "okay"; 392}; 393 394&usb { 395 status = "okay"; 396}; 397 398&usb_ctrl_mod { 399 status = "okay"; 400}; 401 402&usb0 { 403 dr_mode = "device"; 404 status = "okay"; 405}; 406 407&usb0_phy { 408 status = "okay"; 409}; 410 411&am33xx_pinmux { 412 pinctrl-names = "default"; 413 pinctrl-0 = <&clkout2_pin &gpio_pin>; 414 415 clkout2_pin: pinmux_clkout2_pin { 416 pinctrl-single,pins = < 417 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ 418 >; 419 }; 420 421 cpsw_default: cpsw_default { 422 pinctrl-single,pins = < 423 /* Slave 1 */ 424 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */ 425 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.mii1_rxerr */ 426 0x114 (MUX_MODE1) /* mii1_txen.mii1_txen */ 427 0x124 (MUX_MODE1) /* mii1_txd1.mii1_txd1 */ 428 0x128 (MUX_MODE1) /* mii1_txd0.mii1_txd0 */ 429 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.mii1_rxd1 */ 430 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.mii1_rxd0 */ 431 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii1_refclk */ 432 >; 433 }; 434 435 cpsw_sleep: cpsw_sleep { 436 pinctrl-single,pins = < 437 /* Slave 1 reset value */ 438 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) 439 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) 440 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) 441 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) 442 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) 443 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) 444 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) 445 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) 446 >; 447 }; 448 449 davinci_mdio_default: davinci_mdio_default { 450 pinctrl-single,pins = < 451 /* MDIO */ 452 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 453 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 454 >; 455 }; 456 457 davinci_mdio_sleep: davinci_mdio_sleep { 458 pinctrl-single,pins = < 459 /* MDIO reset value */ 460 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) 461 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) 462 >; 463 }; 464 465 ecap0_pins: ecap_pins { 466 pinctrl-single,pins = < 467 0x164 (MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 buzzer frequency: ecap.0 */ 468 >; 469 }; 470 471 epwmss1_pins: epwmss_pins { 472 pinctrl-single,pins = < 473 0x48 (PIN_INPUT | MUX_MODE7) /* gpmc_a2.gpio1_18 buzzer frequency: ehrpwm1A high-Z due to connected to ecap0 by R0469 */ 474 0x4c (MUX_MODE6) /* gpmc_a3.ehrpwm1B buzzer volume pwm */ 475 >; 476 }; 477 478 gpio_pin: gpio_pin { 479 pinctrl-single,pins = < 480 0x6c (PIN_INPUT | MUX_MODE7) /* gpmc_a11.gpio1_27 PWR_FAIL_GPIO_SPARE */ 481 0x78 (PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) /* gpmc_be1n.gpio1_28 TOUCH_CHANGE_N */ 482 0x88 (PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) /* gpmc_csn3.gpio2_0 RUT_GPIO0_GPIO */ 483 0x118 (PIN_INPUT | MUX_MODE7) /* gmii1_rxdv.gpio3_4 PWR_FAIL_GPIO */ 484 0x11c (MUX_MODE7) /* mii1_txd3.gpio0_16 DEBUG_OSC_CH2_GPIO */ 485 0x120 (MUX_MODE7) /* mii1_txd2.gpio0_17 DEBUG_OSC_CH1_GPIO */ 486 0x134 (MUX_MODE7) /* gmii1_rxd3.gpio2_18 PHY_RSTn_GPIO */ 487 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gmii1_rxd2.gpio2_19 PHY_INT_GPIO */ 488 0x180 (MUX_MODE7) /* uart1_rxd.gpio0_14 WATCHDOG_TRIGGER_GPIO */ 489 0x184 (MUX_MODE7) /* uart1_txd.gpio0_15 ALIVE_LED_N_GPIO */ 490 0x1a0 (MUX_MODE7) /* mcasp0_aclkr.gpio3_18 MAXTOUCH_RESET_GPIO */ 491 0x1a4 (MUX_MODE7) /* mcasp0_fsr.gpio3_19 DISPLAY_RESET_GPIO */ 492 0x1a8 (MUX_MODE7) /* mcasp0_axr1.gpio3_20 DEBUG_RUN_MODE_GPIO */ 493 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkx.gpio3_21 NORFLASH_WP_GPIO */ 494 0x1b0 (PIN_OUTPUT | MUX_MODE3) /* xdma_event_intr0.clkout1 */ 495 >; 496 }; 497 498 i2c0_pins: pinmux_i2c0_pins { 499 pinctrl-single,pins = < 500 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 501 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 502 >; 503 }; 504 505 i2c1_pins: pinmux_i2c1_pins { 506 pinctrl-single,pins = < 507 0x168 (PIN_INPUT | MUX_MODE3) /* uart0_ctsn.i2c1_sda */ 508 0x16c (PIN_INPUT | MUX_MODE3) /* uart0.rtsn.i2c1_scl */ 509 >; 510 }; 511 512 lcd_pins_s0: lcd_pins_s0 { 513 pinctrl-single,pins = < 514 0x20 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad8.lcd_data23 */ 515 0x24 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad9.lcd_data22 */ 516 0x28 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad10.lcd_data21 */ 517 0x2c (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad11.lcd_data20 */ 518 0x30 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad12.lcd_data19 */ 519 0x34 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad13.lcd_data18 */ 520 0x38 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad14.lcd_data17 */ 521 0x3c (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad15.lcd_data16 */ 522 0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */ 523 0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */ 524 0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */ 525 0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */ 526 0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */ 527 0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */ 528 0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */ 529 0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */ 530 0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */ 531 0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */ 532 0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */ 533 0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */ 534 0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */ 535 0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */ 536 0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */ 537 0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */ 538 0xe0 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_vsync.lcd_vsync */ 539 0xe4 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_hsync.lcd_hsync */ 540 0xe8 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_pclk.lcd_pclk */ 541 0xec (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */ 542 >; 543 }; 544 545 mmc1_pins: mmc1_pins { 546 pinctrl-single,pins = < 547 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ 548 0xf4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ 549 0xf8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ 550 0xfc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ 551 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 552 0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ 553 >; 554 }; 555 556 nandflash_pins: pinmux_nandflash_pins { 557 pinctrl-single,pins = < 558 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ 559 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ 560 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ 561 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ 562 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ 563 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ 564 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ 565 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ 566 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ 567 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ 568 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ 569 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ 570 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ 571 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ 572 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ 573 >; 574 }; 575 576 spi0_pins: pinmux_spi0_pins { 577 pinctrl-single,pins = < 578 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_sclk.spi0_sclk */ 579 0x154 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */ 580 0x158 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_d1.spi0_d1 */ 581 0x15c (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_CS0.spi0_CS0 */ 582 >; 583 }; 584 585 spi1_pins: pinmux_spi1_pins { 586 pinctrl-single,pins = < 587 0x190 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_aclkx.spi1_sclk */ 588 0x194 (PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */ 589 0x198 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */ 590 0x19c (PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */ 591 >; 592 }; 593 594 uart0_pins: pinmux_uart0_pins { 595 pinctrl-single,pins = < 596 0x170 (PIN_INPUT | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 597 0x174 (PIN_OUTPUT | MUX_MODE0) /* uart0_txd.uart0_txd */ 598 >; 599 }; 600}; 601