1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2002 4 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 5 * Marius Groeger <mgroeger@sysgo.de> 6 * 7 * (C) Copyright 2002 8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 9 * Alex Zuepke <azu@sysgo.de> 10 * 11 * (C) Copyright 2002 12 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> 13 */ 14 15 #include <common.h> 16 #include <cpu_func.h> 17 #include <time.h> 18 #if defined (CONFIG_IMX) 19 20 #include <asm/arch/imx-regs.h> 21 #include <linux/delay.h> 22 timer_init(void)23int timer_init (void) 24 { 25 int i; 26 /* setup GP Timer 1 */ 27 TCTL1 = TCTL_SWR; 28 for ( i=0; i<100; i++) TCTL1 = 0; /* We have no udelay by now */ 29 TPRER1 = get_PERCLK1() / 1000000; /* 1 MHz */ 30 TCTL1 |= TCTL_FRR | (1<<1); /* Freerun Mode, PERCLK1 input */ 31 32 /* Reset the timer */ 33 TCTL1 &= ~TCTL_TEN; 34 TCTL1 |= TCTL_TEN; /* Enable timer */ 35 36 return (0); 37 } 38 39 /* 40 * timer without interrupts 41 */ get_timer_masked(void)42static ulong get_timer_masked (void) 43 { 44 return TCN1; 45 } 46 get_timer(ulong base)47ulong get_timer (ulong base) 48 { 49 return get_timer_masked() - base; 50 } 51 __udelay(unsigned long usec)52void __udelay(unsigned long usec) 53 { 54 ulong endtime = get_timer_masked() + usec; 55 signed long diff; 56 57 do { 58 ulong now = get_timer_masked (); 59 diff = endtime - now; 60 } while (diff >= 0); 61 } 62 63 /* 64 * This function is derived from PowerPC code (read timebase as long long). 65 * On ARM it just returns the timer value. 66 */ get_ticks(void)67unsigned long long get_ticks(void) 68 { 69 return get_timer(0); 70 } 71 72 /* 73 * This function is derived from PowerPC code (timebase clock frequency). 74 * On ARM it returns the number of timer ticks per second. 75 */ get_tbclk(void)76ulong get_tbclk(void) 77 { 78 return CONFIG_SYS_HZ; 79 } 80 81 /* 82 * Reset the cpu by setting up the watchdog timer and let him time out 83 */ reset_cpu(void)84void reset_cpu(void) 85 { 86 /* Disable watchdog and set Time-Out field to 0 */ 87 WCR = 0x00000000; 88 89 /* Write Service Sequence */ 90 WSR = 0x00005555; 91 WSR = 0x0000AAAA; 92 93 /* Enable watchdog */ 94 WCR = 0x00000001; 95 96 while (1); 97 /*NOTREACHED*/ 98 } 99 100 #endif /* defined (CONFIG_IMX) */ 101