1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * mux_am43xx.h 4 * 5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 6 */ 7 8 #ifndef _MUX_AM43XX_H_ 9 #define _MUX_AM43XX_H_ 10 11 #include <asm/io.h> 12 13 #define MUX_CFG(value, offset) \ 14 __raw_writel(value, (CTRL_BASE + offset)); 15 16 /* PAD Control Fields */ 17 #define SLEWCTRL (0x1 << 19) 18 #define RXACTIVE (0x1 << 18) 19 #define PULLDOWN_EN (0x0 << 17) /* Pull Down Selection */ 20 #define PULLUP_EN (0x1 << 17) /* Pull Up Selection */ 21 #define PULLUDEN (0x0 << 16) /* Pull up/down enable */ 22 #define PULLUDDIS (0x1 << 16) /* Pull up/down disable */ 23 #define MODE(val) val /* used for Readability */ 24 25 /* 26 * PAD CONTROL OFFSETS 27 * Field names corresponds to the pad signal name 28 */ 29 struct pad_signals { 30 int gpmc_ad0; 31 int gpmc_ad1; 32 int gpmc_ad2; 33 int gpmc_ad3; 34 int gpmc_ad4; 35 int gpmc_ad5; 36 int gpmc_ad6; 37 int gpmc_ad7; 38 int gpmc_ad8; 39 int gpmc_ad9; 40 int gpmc_ad10; 41 int gpmc_ad11; 42 int gpmc_ad12; 43 int gpmc_ad13; 44 int gpmc_ad14; 45 int gpmc_ad15; 46 int gpmc_a0; 47 int gpmc_a1; 48 int gpmc_a2; 49 int gpmc_a3; 50 int gpmc_a4; 51 int gpmc_a5; 52 int gpmc_a6; 53 int gpmc_a7; 54 int gpmc_a8; 55 int gpmc_a9; 56 int gpmc_a10; 57 int gpmc_a11; 58 int gpmc_wait0; 59 int gpmc_wpn; 60 int gpmc_be1n; 61 int gpmc_csn0; 62 int gpmc_csn1; 63 int gpmc_csn2; 64 int gpmc_csn3; 65 int gpmc_clk; 66 int gpmc_advn_ale; 67 int gpmc_oen_ren; 68 int gpmc_wen; 69 int gpmc_be0n_cle; 70 int lcd_data0; 71 int lcd_data1; 72 int lcd_data2; 73 int lcd_data3; 74 int lcd_data4; 75 int lcd_data5; 76 int lcd_data6; 77 int lcd_data7; 78 int lcd_data8; 79 int lcd_data9; 80 int lcd_data10; 81 int lcd_data11; 82 int lcd_data12; 83 int lcd_data13; 84 int lcd_data14; 85 int lcd_data15; 86 int lcd_vsync; 87 int lcd_hsync; 88 int lcd_pclk; 89 int lcd_ac_bias_en; 90 int mmc0_dat3; 91 int mmc0_dat2; 92 int mmc0_dat1; 93 int mmc0_dat0; 94 int mmc0_clk; 95 int mmc0_cmd; 96 int mii1_col; 97 int mii1_crs; 98 int mii1_rxerr; 99 int mii1_txen; 100 int mii1_rxdv; 101 int mii1_txd3; 102 int mii1_txd2; 103 int mii1_txd1; 104 int mii1_txd0; 105 int mii1_txclk; 106 int mii1_rxclk; 107 int mii1_rxd3; 108 int mii1_rxd2; 109 int mii1_rxd1; 110 int mii1_rxd0; 111 int rmii1_refclk; 112 int mdio_data; 113 int mdio_clk; 114 int spi0_sclk; 115 int spi0_d0; 116 int spi0_d1; 117 int spi0_cs0; 118 int spi0_cs1; 119 int ecap0_in_pwm0_out; 120 int uart0_ctsn; 121 int uart0_rtsn; 122 int uart0_rxd; 123 int uart0_txd; 124 int uart1_ctsn; 125 int uart1_rtsn; 126 int uart1_rxd; 127 int uart1_txd; 128 int i2c0_sda; 129 int i2c0_scl; 130 int mcasp0_aclkx; 131 int mcasp0_fsx; 132 int mcasp0_axr0; 133 int mcasp0_ahclkr; 134 int mcasp0_aclkr; 135 int mcasp0_fsr; 136 int mcasp0_axr1; 137 int mcasp0_ahclkx; 138 int cam0_hd; 139 int cam0_vd; 140 int cam0_field; 141 int cam0_wen; 142 int cam0_pclk; 143 int cam0_data8; 144 int cam0_data9; 145 int cam1_data9; 146 int cam1_data8; 147 int cam1_hd; 148 int cam1_vd; 149 int cam1_pclk; 150 int cam1_field; 151 int cam1_wen; 152 int cam1_data0; 153 int cam1_data1; 154 int cam1_data2; 155 int cam1_data3; 156 int cam1_data4; 157 int cam1_data5; 158 int cam1_data6; 159 int cam1_data7; 160 int cam0_data0; 161 int cam0_data1; 162 int cam0_data2; 163 int cam0_data3; 164 int cam0_data4; 165 int cam0_data5; 166 int cam0_data6; 167 int cam0_data7; 168 int uart3_rxd; 169 int uart3_txd; 170 int uart3_ctsn; 171 int uart3_rtsn; 172 int gpio5_8; 173 int gpio5_9; 174 int gpio5_10; 175 int gpio5_11; 176 int gpio5_12; 177 int gpio5_13; 178 int spi4_sclk; 179 int spi4_d0; 180 int spi4_d1; 181 int spi4_cs0; 182 int spi2_sclk; 183 int spi2_d0; 184 int spi2_d1; 185 int spi2_cs0; 186 int xdma_evt_intr0; 187 int xdma_evt_intr1; 188 int clkreq; 189 int nresetin_out; 190 int rsvd1; 191 int nnmi; 192 int rsvd2; 193 int rsvd3; 194 int tms; 195 int tdi; 196 int tdo; 197 int tck; 198 int ntrst; 199 int emu0; 200 int emu1; 201 int osc1_in; 202 int osc1_out; 203 int rtc_porz; 204 int ext_wakeup0; 205 int pmic_power_en0; 206 int usb0_drvvbus; 207 int usb1_drvvbus; 208 }; 209 210 #endif /* _MUX_AM43XX_H_ */ 211