1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2020 Marvell International Ltd.
4  *
5  * Configuration and status register (CSR) type definitions for
6  * Octeon ipd.
7  */
8 
9 #ifndef __CVMX_IPD_DEFS_H__
10 #define __CVMX_IPD_DEFS_H__
11 
12 #define CVMX_IPD_1ST_MBUFF_SKIP		    (0x00014F0000000000ull)
13 #define CVMX_IPD_1st_NEXT_PTR_BACK	    (0x00014F0000000150ull)
14 #define CVMX_IPD_2nd_NEXT_PTR_BACK	    (0x00014F0000000158ull)
15 #define CVMX_IPD_BIST_STATUS		    (0x00014F00000007F8ull)
16 #define CVMX_IPD_BPIDX_MBUF_TH(offset)	    (0x00014F0000002000ull + ((offset) & 63) * 8)
17 #define CVMX_IPD_BPID_BP_COUNTERX(offset)   (0x00014F0000003000ull + ((offset) & 63) * 8)
18 #define CVMX_IPD_BP_PRT_RED_END		    (0x00014F0000000328ull)
19 #define CVMX_IPD_CLK_COUNT		    (0x00014F0000000338ull)
20 #define CVMX_IPD_CREDITS		    (0x00014F0000004410ull)
21 #define CVMX_IPD_CTL_STATUS		    (0x00014F0000000018ull)
22 #define CVMX_IPD_ECC_CTL		    (0x00014F0000004408ull)
23 #define CVMX_IPD_FREE_PTR_FIFO_CTL	    (0x00014F0000000780ull)
24 #define CVMX_IPD_FREE_PTR_VALUE		    (0x00014F0000000788ull)
25 #define CVMX_IPD_HOLD_PTR_FIFO_CTL	    (0x00014F0000000790ull)
26 #define CVMX_IPD_INT_ENB		    (0x00014F0000000160ull)
27 #define CVMX_IPD_INT_SUM		    (0x00014F0000000168ull)
28 #define CVMX_IPD_NEXT_PKT_PTR		    (0x00014F00000007A0ull)
29 #define CVMX_IPD_NEXT_WQE_PTR		    (0x00014F00000007A8ull)
30 #define CVMX_IPD_NOT_1ST_MBUFF_SKIP	    (0x00014F0000000008ull)
31 #define CVMX_IPD_ON_BP_DROP_PKTX(offset)    (0x00014F0000004100ull)
32 #define CVMX_IPD_PACKET_MBUFF_SIZE	    (0x00014F0000000010ull)
33 #define CVMX_IPD_PKT_ERR		    (0x00014F00000003F0ull)
34 #define CVMX_IPD_PKT_PTR_VALID		    (0x00014F0000000358ull)
35 #define CVMX_IPD_PORTX_BP_PAGE_CNT(offset)  (0x00014F0000000028ull + ((offset) & 63) * 8)
36 #define CVMX_IPD_PORTX_BP_PAGE_CNT2(offset) (0x00014F0000000368ull + ((offset) & 63) * 8 - 8 * 36)
37 #define CVMX_IPD_PORTX_BP_PAGE_CNT3(offset) (0x00014F00000003D0ull + ((offset) & 63) * 8 - 8 * 40)
38 #define CVMX_IPD_PORT_BP_COUNTERS2_PAIRX(offset)                                                   \
39 	(0x00014F0000000388ull + ((offset) & 63) * 8 - 8 * 36)
40 #define CVMX_IPD_PORT_BP_COUNTERS3_PAIRX(offset)                                                   \
41 	(0x00014F00000003B0ull + ((offset) & 63) * 8 - 8 * 40)
42 #define CVMX_IPD_PORT_BP_COUNTERS4_PAIRX(offset)                                                   \
43 	(0x00014F0000000410ull + ((offset) & 63) * 8 - 8 * 44)
44 #define CVMX_IPD_PORT_BP_COUNTERS_PAIRX(offset) (0x00014F00000001B8ull + ((offset) & 63) * 8)
45 #define CVMX_IPD_PORT_PTR_FIFO_CTL		(0x00014F0000000798ull)
46 #define CVMX_IPD_PORT_QOS_INTX(offset)		(0x00014F0000000808ull + ((offset) & 7) * 8)
47 #define CVMX_IPD_PORT_QOS_INT_ENBX(offset)	(0x00014F0000000848ull + ((offset) & 7) * 8)
48 #define CVMX_IPD_PORT_QOS_X_CNT(offset)		(0x00014F0000000888ull + ((offset) & 511) * 8)
49 #define CVMX_IPD_PORT_SOPX(offset)		(0x00014F0000004400ull)
50 #define CVMX_IPD_PRC_HOLD_PTR_FIFO_CTL		(0x00014F0000000348ull)
51 #define CVMX_IPD_PRC_PORT_PTR_FIFO_CTL		(0x00014F0000000350ull)
52 #define CVMX_IPD_PTR_COUNT			(0x00014F0000000320ull)
53 #define CVMX_IPD_PWP_PTR_FIFO_CTL		(0x00014F0000000340ull)
54 #define CVMX_IPD_QOS0_RED_MARKS			CVMX_IPD_QOSX_RED_MARKS(0)
55 #define CVMX_IPD_QOS1_RED_MARKS			CVMX_IPD_QOSX_RED_MARKS(1)
56 #define CVMX_IPD_QOS2_RED_MARKS			CVMX_IPD_QOSX_RED_MARKS(2)
57 #define CVMX_IPD_QOS3_RED_MARKS			CVMX_IPD_QOSX_RED_MARKS(3)
58 #define CVMX_IPD_QOS4_RED_MARKS			CVMX_IPD_QOSX_RED_MARKS(4)
59 #define CVMX_IPD_QOS5_RED_MARKS			CVMX_IPD_QOSX_RED_MARKS(5)
60 #define CVMX_IPD_QOS6_RED_MARKS			CVMX_IPD_QOSX_RED_MARKS(6)
61 #define CVMX_IPD_QOS7_RED_MARKS			CVMX_IPD_QOSX_RED_MARKS(7)
62 #define CVMX_IPD_QOSX_RED_MARKS(offset)		(0x00014F0000000178ull + ((offset) & 7) * 8)
63 #define CVMX_IPD_QUE0_FREE_PAGE_CNT		(0x00014F0000000330ull)
64 #define CVMX_IPD_RED_BPID_ENABLEX(offset)	(0x00014F0000004200ull)
65 #define CVMX_IPD_RED_DELAY			(0x00014F0000004300ull)
66 #define CVMX_IPD_RED_PORT_ENABLE		(0x00014F00000002D8ull)
67 #define CVMX_IPD_RED_PORT_ENABLE2		(0x00014F00000003A8ull)
68 #define CVMX_IPD_RED_QUE0_PARAM			CVMX_IPD_RED_QUEX_PARAM(0)
69 #define CVMX_IPD_RED_QUE1_PARAM			CVMX_IPD_RED_QUEX_PARAM(1)
70 #define CVMX_IPD_RED_QUE2_PARAM			CVMX_IPD_RED_QUEX_PARAM(2)
71 #define CVMX_IPD_RED_QUE3_PARAM			CVMX_IPD_RED_QUEX_PARAM(3)
72 #define CVMX_IPD_RED_QUE4_PARAM			CVMX_IPD_RED_QUEX_PARAM(4)
73 #define CVMX_IPD_RED_QUE5_PARAM			CVMX_IPD_RED_QUEX_PARAM(5)
74 #define CVMX_IPD_RED_QUE6_PARAM			CVMX_IPD_RED_QUEX_PARAM(6)
75 #define CVMX_IPD_RED_QUE7_PARAM			CVMX_IPD_RED_QUEX_PARAM(7)
76 #define CVMX_IPD_RED_QUEX_PARAM(offset)		(0x00014F00000002E0ull + ((offset) & 7) * 8)
77 #define CVMX_IPD_REQ_WGT			(0x00014F0000004418ull)
78 #define CVMX_IPD_SUB_PORT_BP_PAGE_CNT		(0x00014F0000000148ull)
79 #define CVMX_IPD_SUB_PORT_FCS			(0x00014F0000000170ull)
80 #define CVMX_IPD_SUB_PORT_QOS_CNT		(0x00014F0000000800ull)
81 #define CVMX_IPD_WQE_FPA_QUEUE			(0x00014F0000000020ull)
82 #define CVMX_IPD_WQE_PTR_VALID			(0x00014F0000000360ull)
83 
84 /**
85  * cvmx_ipd_1st_mbuff_skip
86  *
87  * The number of words that the IPD will skip when writing the first MBUFF.
88  *
89  */
90 union cvmx_ipd_1st_mbuff_skip {
91 	u64 u64;
92 	struct cvmx_ipd_1st_mbuff_skip_s {
93 		u64 reserved_6_63 : 58;
94 		u64 skip_sz : 6;
95 	} s;
96 	struct cvmx_ipd_1st_mbuff_skip_s cn30xx;
97 	struct cvmx_ipd_1st_mbuff_skip_s cn31xx;
98 	struct cvmx_ipd_1st_mbuff_skip_s cn38xx;
99 	struct cvmx_ipd_1st_mbuff_skip_s cn38xxp2;
100 	struct cvmx_ipd_1st_mbuff_skip_s cn50xx;
101 	struct cvmx_ipd_1st_mbuff_skip_s cn52xx;
102 	struct cvmx_ipd_1st_mbuff_skip_s cn52xxp1;
103 	struct cvmx_ipd_1st_mbuff_skip_s cn56xx;
104 	struct cvmx_ipd_1st_mbuff_skip_s cn56xxp1;
105 	struct cvmx_ipd_1st_mbuff_skip_s cn58xx;
106 	struct cvmx_ipd_1st_mbuff_skip_s cn58xxp1;
107 	struct cvmx_ipd_1st_mbuff_skip_s cn61xx;
108 	struct cvmx_ipd_1st_mbuff_skip_s cn63xx;
109 	struct cvmx_ipd_1st_mbuff_skip_s cn63xxp1;
110 	struct cvmx_ipd_1st_mbuff_skip_s cn66xx;
111 	struct cvmx_ipd_1st_mbuff_skip_s cn68xx;
112 	struct cvmx_ipd_1st_mbuff_skip_s cn68xxp1;
113 	struct cvmx_ipd_1st_mbuff_skip_s cn70xx;
114 	struct cvmx_ipd_1st_mbuff_skip_s cn70xxp1;
115 	struct cvmx_ipd_1st_mbuff_skip_s cnf71xx;
116 };
117 
118 typedef union cvmx_ipd_1st_mbuff_skip cvmx_ipd_1st_mbuff_skip_t;
119 
120 /**
121  * cvmx_ipd_1st_next_ptr_back
122  *
123  * IPD_1st_NEXT_PTR_BACK = IPD First Next Pointer Back Values
124  * Contains the Back Field for use in creating the Next Pointer Header for the First MBUF
125  */
126 union cvmx_ipd_1st_next_ptr_back {
127 	u64 u64;
128 	struct cvmx_ipd_1st_next_ptr_back_s {
129 		u64 reserved_4_63 : 60;
130 		u64 back : 4;
131 	} s;
132 	struct cvmx_ipd_1st_next_ptr_back_s cn30xx;
133 	struct cvmx_ipd_1st_next_ptr_back_s cn31xx;
134 	struct cvmx_ipd_1st_next_ptr_back_s cn38xx;
135 	struct cvmx_ipd_1st_next_ptr_back_s cn38xxp2;
136 	struct cvmx_ipd_1st_next_ptr_back_s cn50xx;
137 	struct cvmx_ipd_1st_next_ptr_back_s cn52xx;
138 	struct cvmx_ipd_1st_next_ptr_back_s cn52xxp1;
139 	struct cvmx_ipd_1st_next_ptr_back_s cn56xx;
140 	struct cvmx_ipd_1st_next_ptr_back_s cn56xxp1;
141 	struct cvmx_ipd_1st_next_ptr_back_s cn58xx;
142 	struct cvmx_ipd_1st_next_ptr_back_s cn58xxp1;
143 	struct cvmx_ipd_1st_next_ptr_back_s cn61xx;
144 	struct cvmx_ipd_1st_next_ptr_back_s cn63xx;
145 	struct cvmx_ipd_1st_next_ptr_back_s cn63xxp1;
146 	struct cvmx_ipd_1st_next_ptr_back_s cn66xx;
147 	struct cvmx_ipd_1st_next_ptr_back_s cn68xx;
148 	struct cvmx_ipd_1st_next_ptr_back_s cn68xxp1;
149 	struct cvmx_ipd_1st_next_ptr_back_s cn70xx;
150 	struct cvmx_ipd_1st_next_ptr_back_s cn70xxp1;
151 	struct cvmx_ipd_1st_next_ptr_back_s cnf71xx;
152 };
153 
154 typedef union cvmx_ipd_1st_next_ptr_back cvmx_ipd_1st_next_ptr_back_t;
155 
156 /**
157  * cvmx_ipd_2nd_next_ptr_back
158  *
159  * Contains the Back Field for use in creating the Next Pointer Header for the First MBUF
160  *
161  */
162 union cvmx_ipd_2nd_next_ptr_back {
163 	u64 u64;
164 	struct cvmx_ipd_2nd_next_ptr_back_s {
165 		u64 reserved_4_63 : 60;
166 		u64 back : 4;
167 	} s;
168 	struct cvmx_ipd_2nd_next_ptr_back_s cn30xx;
169 	struct cvmx_ipd_2nd_next_ptr_back_s cn31xx;
170 	struct cvmx_ipd_2nd_next_ptr_back_s cn38xx;
171 	struct cvmx_ipd_2nd_next_ptr_back_s cn38xxp2;
172 	struct cvmx_ipd_2nd_next_ptr_back_s cn50xx;
173 	struct cvmx_ipd_2nd_next_ptr_back_s cn52xx;
174 	struct cvmx_ipd_2nd_next_ptr_back_s cn52xxp1;
175 	struct cvmx_ipd_2nd_next_ptr_back_s cn56xx;
176 	struct cvmx_ipd_2nd_next_ptr_back_s cn56xxp1;
177 	struct cvmx_ipd_2nd_next_ptr_back_s cn58xx;
178 	struct cvmx_ipd_2nd_next_ptr_back_s cn58xxp1;
179 	struct cvmx_ipd_2nd_next_ptr_back_s cn61xx;
180 	struct cvmx_ipd_2nd_next_ptr_back_s cn63xx;
181 	struct cvmx_ipd_2nd_next_ptr_back_s cn63xxp1;
182 	struct cvmx_ipd_2nd_next_ptr_back_s cn66xx;
183 	struct cvmx_ipd_2nd_next_ptr_back_s cn68xx;
184 	struct cvmx_ipd_2nd_next_ptr_back_s cn68xxp1;
185 	struct cvmx_ipd_2nd_next_ptr_back_s cn70xx;
186 	struct cvmx_ipd_2nd_next_ptr_back_s cn70xxp1;
187 	struct cvmx_ipd_2nd_next_ptr_back_s cnf71xx;
188 };
189 
190 typedef union cvmx_ipd_2nd_next_ptr_back cvmx_ipd_2nd_next_ptr_back_t;
191 
192 /**
193  * cvmx_ipd_bist_status
194  *
195  * BIST Status for IPD's Memories.
196  *
197  */
198 union cvmx_ipd_bist_status {
199 	u64 u64;
200 	struct cvmx_ipd_bist_status_s {
201 		u64 reserved_23_63 : 41;
202 		u64 iiwo1 : 1;
203 		u64 iiwo0 : 1;
204 		u64 iio1 : 1;
205 		u64 iio0 : 1;
206 		u64 pbm4 : 1;
207 		u64 csr_mem : 1;
208 		u64 csr_ncmd : 1;
209 		u64 pwq_wqed : 1;
210 		u64 pwq_wp1 : 1;
211 		u64 pwq_pow : 1;
212 		u64 ipq_pbe1 : 1;
213 		u64 ipq_pbe0 : 1;
214 		u64 pbm3 : 1;
215 		u64 pbm2 : 1;
216 		u64 pbm1 : 1;
217 		u64 pbm0 : 1;
218 		u64 pbm_word : 1;
219 		u64 pwq1 : 1;
220 		u64 pwq0 : 1;
221 		u64 prc_off : 1;
222 		u64 ipd_old : 1;
223 		u64 ipd_new : 1;
224 		u64 pwp : 1;
225 	} s;
226 	struct cvmx_ipd_bist_status_cn30xx {
227 		u64 reserved_16_63 : 48;
228 		u64 pwq_wqed : 1;
229 		u64 pwq_wp1 : 1;
230 		u64 pwq_pow : 1;
231 		u64 ipq_pbe1 : 1;
232 		u64 ipq_pbe0 : 1;
233 		u64 pbm3 : 1;
234 		u64 pbm2 : 1;
235 		u64 pbm1 : 1;
236 		u64 pbm0 : 1;
237 		u64 pbm_word : 1;
238 		u64 pwq1 : 1;
239 		u64 pwq0 : 1;
240 		u64 prc_off : 1;
241 		u64 ipd_old : 1;
242 		u64 ipd_new : 1;
243 		u64 pwp : 1;
244 	} cn30xx;
245 	struct cvmx_ipd_bist_status_cn30xx cn31xx;
246 	struct cvmx_ipd_bist_status_cn30xx cn38xx;
247 	struct cvmx_ipd_bist_status_cn30xx cn38xxp2;
248 	struct cvmx_ipd_bist_status_cn30xx cn50xx;
249 	struct cvmx_ipd_bist_status_cn52xx {
250 		u64 reserved_18_63 : 46;
251 		u64 csr_mem : 1;
252 		u64 csr_ncmd : 1;
253 		u64 pwq_wqed : 1;
254 		u64 pwq_wp1 : 1;
255 		u64 pwq_pow : 1;
256 		u64 ipq_pbe1 : 1;
257 		u64 ipq_pbe0 : 1;
258 		u64 pbm3 : 1;
259 		u64 pbm2 : 1;
260 		u64 pbm1 : 1;
261 		u64 pbm0 : 1;
262 		u64 pbm_word : 1;
263 		u64 pwq1 : 1;
264 		u64 pwq0 : 1;
265 		u64 prc_off : 1;
266 		u64 ipd_old : 1;
267 		u64 ipd_new : 1;
268 		u64 pwp : 1;
269 	} cn52xx;
270 	struct cvmx_ipd_bist_status_cn52xx cn52xxp1;
271 	struct cvmx_ipd_bist_status_cn52xx cn56xx;
272 	struct cvmx_ipd_bist_status_cn52xx cn56xxp1;
273 	struct cvmx_ipd_bist_status_cn30xx cn58xx;
274 	struct cvmx_ipd_bist_status_cn30xx cn58xxp1;
275 	struct cvmx_ipd_bist_status_cn52xx cn61xx;
276 	struct cvmx_ipd_bist_status_cn52xx cn63xx;
277 	struct cvmx_ipd_bist_status_cn52xx cn63xxp1;
278 	struct cvmx_ipd_bist_status_cn52xx cn66xx;
279 	struct cvmx_ipd_bist_status_s cn68xx;
280 	struct cvmx_ipd_bist_status_s cn68xxp1;
281 	struct cvmx_ipd_bist_status_cn52xx cn70xx;
282 	struct cvmx_ipd_bist_status_cn52xx cn70xxp1;
283 	struct cvmx_ipd_bist_status_cn52xx cnf71xx;
284 };
285 
286 typedef union cvmx_ipd_bist_status cvmx_ipd_bist_status_t;
287 
288 /**
289  * cvmx_ipd_bp_prt_red_end
290  *
291  * When IPD applies backpressure to a PORT and the corresponding bit in this register is set,
292  * the RED Unit will drop packets for that port.
293  */
294 union cvmx_ipd_bp_prt_red_end {
295 	u64 u64;
296 	struct cvmx_ipd_bp_prt_red_end_s {
297 		u64 reserved_48_63 : 16;
298 		u64 prt_enb : 48;
299 	} s;
300 	struct cvmx_ipd_bp_prt_red_end_cn30xx {
301 		u64 reserved_36_63 : 28;
302 		u64 prt_enb : 36;
303 	} cn30xx;
304 	struct cvmx_ipd_bp_prt_red_end_cn30xx cn31xx;
305 	struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xx;
306 	struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xxp2;
307 	struct cvmx_ipd_bp_prt_red_end_cn30xx cn50xx;
308 	struct cvmx_ipd_bp_prt_red_end_cn52xx {
309 		u64 reserved_40_63 : 24;
310 		u64 prt_enb : 40;
311 	} cn52xx;
312 	struct cvmx_ipd_bp_prt_red_end_cn52xx cn52xxp1;
313 	struct cvmx_ipd_bp_prt_red_end_cn52xx cn56xx;
314 	struct cvmx_ipd_bp_prt_red_end_cn52xx cn56xxp1;
315 	struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xx;
316 	struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xxp1;
317 	struct cvmx_ipd_bp_prt_red_end_s cn61xx;
318 	struct cvmx_ipd_bp_prt_red_end_cn63xx {
319 		u64 reserved_44_63 : 20;
320 		u64 prt_enb : 44;
321 	} cn63xx;
322 	struct cvmx_ipd_bp_prt_red_end_cn63xx cn63xxp1;
323 	struct cvmx_ipd_bp_prt_red_end_s cn66xx;
324 	struct cvmx_ipd_bp_prt_red_end_s cn70xx;
325 	struct cvmx_ipd_bp_prt_red_end_s cn70xxp1;
326 	struct cvmx_ipd_bp_prt_red_end_s cnf71xx;
327 };
328 
329 typedef union cvmx_ipd_bp_prt_red_end cvmx_ipd_bp_prt_red_end_t;
330 
331 /**
332  * cvmx_ipd_bpid#_mbuf_th
333  *
334  * 0x2000 2FFF
335  *
336  *                  IPD_BPIDX_MBUF_TH = IPD BPID  MBUFF Threshold
337  *
338  * The number of MBUFFs in use by the BPID, that when exceeded, backpressure will be applied to the BPID.
339  */
340 union cvmx_ipd_bpidx_mbuf_th {
341 	u64 u64;
342 	struct cvmx_ipd_bpidx_mbuf_th_s {
343 		u64 reserved_18_63 : 46;
344 		u64 bp_enb : 1;
345 		u64 page_cnt : 17;
346 	} s;
347 	struct cvmx_ipd_bpidx_mbuf_th_s cn68xx;
348 	struct cvmx_ipd_bpidx_mbuf_th_s cn68xxp1;
349 };
350 
351 typedef union cvmx_ipd_bpidx_mbuf_th cvmx_ipd_bpidx_mbuf_th_t;
352 
353 /**
354  * cvmx_ipd_bpid_bp_counter#
355  *
356  * RESERVE SPACE UPTO 0x2FFF
357  *
358  * 0x3000 0x3ffff
359  *
360  * IPD_BPID_BP_COUNTERX = MBUF BPID Counters used to generate Back Pressure Per BPID.
361  */
362 union cvmx_ipd_bpid_bp_counterx {
363 	u64 u64;
364 	struct cvmx_ipd_bpid_bp_counterx_s {
365 		u64 reserved_25_63 : 39;
366 		u64 cnt_val : 25;
367 	} s;
368 	struct cvmx_ipd_bpid_bp_counterx_s cn68xx;
369 	struct cvmx_ipd_bpid_bp_counterx_s cn68xxp1;
370 };
371 
372 typedef union cvmx_ipd_bpid_bp_counterx cvmx_ipd_bpid_bp_counterx_t;
373 
374 /**
375  * cvmx_ipd_clk_count
376  *
377  * Counts the number of core clocks periods since the de-asserition of reset.
378  *
379  */
380 union cvmx_ipd_clk_count {
381 	u64 u64;
382 	struct cvmx_ipd_clk_count_s {
383 		u64 clk_cnt : 64;
384 	} s;
385 	struct cvmx_ipd_clk_count_s cn30xx;
386 	struct cvmx_ipd_clk_count_s cn31xx;
387 	struct cvmx_ipd_clk_count_s cn38xx;
388 	struct cvmx_ipd_clk_count_s cn38xxp2;
389 	struct cvmx_ipd_clk_count_s cn50xx;
390 	struct cvmx_ipd_clk_count_s cn52xx;
391 	struct cvmx_ipd_clk_count_s cn52xxp1;
392 	struct cvmx_ipd_clk_count_s cn56xx;
393 	struct cvmx_ipd_clk_count_s cn56xxp1;
394 	struct cvmx_ipd_clk_count_s cn58xx;
395 	struct cvmx_ipd_clk_count_s cn58xxp1;
396 	struct cvmx_ipd_clk_count_s cn61xx;
397 	struct cvmx_ipd_clk_count_s cn63xx;
398 	struct cvmx_ipd_clk_count_s cn63xxp1;
399 	struct cvmx_ipd_clk_count_s cn66xx;
400 	struct cvmx_ipd_clk_count_s cn68xx;
401 	struct cvmx_ipd_clk_count_s cn68xxp1;
402 	struct cvmx_ipd_clk_count_s cn70xx;
403 	struct cvmx_ipd_clk_count_s cn70xxp1;
404 	struct cvmx_ipd_clk_count_s cnf71xx;
405 };
406 
407 typedef union cvmx_ipd_clk_count cvmx_ipd_clk_count_t;
408 
409 /**
410  * cvmx_ipd_credits
411  *
412  * IPD_CREDITS = IPD Credits
413  *
414  * The credits allowed for IPD.
415  */
416 union cvmx_ipd_credits {
417 	u64 u64;
418 	struct cvmx_ipd_credits_s {
419 		u64 reserved_16_63 : 48;
420 		u64 iob_wrc : 8;
421 		u64 iob_wr : 8;
422 	} s;
423 	struct cvmx_ipd_credits_s cn68xx;
424 	struct cvmx_ipd_credits_s cn68xxp1;
425 };
426 
427 typedef union cvmx_ipd_credits cvmx_ipd_credits_t;
428 
429 /**
430  * cvmx_ipd_ctl_status
431  *
432  * The number of words in a MBUFF used for packet data store.
433  *
434  */
435 union cvmx_ipd_ctl_status {
436 	u64 u64;
437 	struct cvmx_ipd_ctl_status_s {
438 		u64 reserved_18_63 : 46;
439 		u64 use_sop : 1;
440 		u64 rst_done : 1;
441 		u64 clken : 1;
442 		u64 no_wptr : 1;
443 		u64 pq_apkt : 1;
444 		u64 pq_nabuf : 1;
445 		u64 ipd_full : 1;
446 		u64 pkt_off : 1;
447 		u64 len_m8 : 1;
448 		u64 reset : 1;
449 		u64 addpkt : 1;
450 		u64 naddbuf : 1;
451 		u64 pkt_lend : 1;
452 		u64 wqe_lend : 1;
453 		u64 pbp_en : 1;
454 		cvmx_ipd_mode_t opc_mode : 2;
455 		u64 ipd_en : 1;
456 	} s;
457 	struct cvmx_ipd_ctl_status_cn30xx {
458 		u64 reserved_10_63 : 54;
459 		u64 len_m8 : 1;
460 		u64 reset : 1;
461 		u64 addpkt : 1;
462 		u64 naddbuf : 1;
463 		u64 pkt_lend : 1;
464 		u64 wqe_lend : 1;
465 		u64 pbp_en : 1;
466 		cvmx_ipd_mode_t opc_mode : 2;
467 		u64 ipd_en : 1;
468 	} cn30xx;
469 	struct cvmx_ipd_ctl_status_cn30xx cn31xx;
470 	struct cvmx_ipd_ctl_status_cn30xx cn38xx;
471 	struct cvmx_ipd_ctl_status_cn38xxp2 {
472 		u64 reserved_9_63 : 55;
473 		u64 reset : 1;
474 		u64 addpkt : 1;
475 		u64 naddbuf : 1;
476 		u64 pkt_lend : 1;
477 		u64 wqe_lend : 1;
478 		u64 pbp_en : 1;
479 		cvmx_ipd_mode_t opc_mode : 2;
480 		u64 ipd_en : 1;
481 	} cn38xxp2;
482 	struct cvmx_ipd_ctl_status_cn50xx {
483 		u64 reserved_15_63 : 49;
484 		u64 no_wptr : 1;
485 		u64 pq_apkt : 1;
486 		u64 pq_nabuf : 1;
487 		u64 ipd_full : 1;
488 		u64 pkt_off : 1;
489 		u64 len_m8 : 1;
490 		u64 reset : 1;
491 		u64 addpkt : 1;
492 		u64 naddbuf : 1;
493 		u64 pkt_lend : 1;
494 		u64 wqe_lend : 1;
495 		u64 pbp_en : 1;
496 		cvmx_ipd_mode_t opc_mode : 2;
497 		u64 ipd_en : 1;
498 	} cn50xx;
499 	struct cvmx_ipd_ctl_status_cn50xx cn52xx;
500 	struct cvmx_ipd_ctl_status_cn50xx cn52xxp1;
501 	struct cvmx_ipd_ctl_status_cn50xx cn56xx;
502 	struct cvmx_ipd_ctl_status_cn50xx cn56xxp1;
503 	struct cvmx_ipd_ctl_status_cn58xx {
504 		u64 reserved_12_63 : 52;
505 		u64 ipd_full : 1;
506 		u64 pkt_off : 1;
507 		u64 len_m8 : 1;
508 		u64 reset : 1;
509 		u64 addpkt : 1;
510 		u64 naddbuf : 1;
511 		u64 pkt_lend : 1;
512 		u64 wqe_lend : 1;
513 		u64 pbp_en : 1;
514 		cvmx_ipd_mode_t opc_mode : 2;
515 		u64 ipd_en : 1;
516 	} cn58xx;
517 	struct cvmx_ipd_ctl_status_cn58xx cn58xxp1;
518 	struct cvmx_ipd_ctl_status_s cn61xx;
519 	struct cvmx_ipd_ctl_status_s cn63xx;
520 	struct cvmx_ipd_ctl_status_cn63xxp1 {
521 		u64 reserved_16_63 : 48;
522 		u64 clken : 1;
523 		u64 no_wptr : 1;
524 		u64 pq_apkt : 1;
525 		u64 pq_nabuf : 1;
526 		u64 ipd_full : 1;
527 		u64 pkt_off : 1;
528 		u64 len_m8 : 1;
529 		u64 reset : 1;
530 		u64 addpkt : 1;
531 		u64 naddbuf : 1;
532 		u64 pkt_lend : 1;
533 		u64 wqe_lend : 1;
534 		u64 pbp_en : 1;
535 		cvmx_ipd_mode_t opc_mode : 2;
536 		u64 ipd_en : 1;
537 	} cn63xxp1;
538 	struct cvmx_ipd_ctl_status_s cn66xx;
539 	struct cvmx_ipd_ctl_status_s cn68xx;
540 	struct cvmx_ipd_ctl_status_s cn68xxp1;
541 	struct cvmx_ipd_ctl_status_s cn70xx;
542 	struct cvmx_ipd_ctl_status_s cn70xxp1;
543 	struct cvmx_ipd_ctl_status_s cnf71xx;
544 };
545 
546 typedef union cvmx_ipd_ctl_status cvmx_ipd_ctl_status_t;
547 
548 /**
549  * cvmx_ipd_ecc_ctl
550  *
551  * IPD_ECC_CTL = IPD ECC Control
552  *
553  * Allows inserting ECC errors for testing.
554  */
555 union cvmx_ipd_ecc_ctl {
556 	u64 u64;
557 	struct cvmx_ipd_ecc_ctl_s {
558 		u64 reserved_8_63 : 56;
559 		u64 pm3_syn : 2;
560 		u64 pm2_syn : 2;
561 		u64 pm1_syn : 2;
562 		u64 pm0_syn : 2;
563 	} s;
564 	struct cvmx_ipd_ecc_ctl_s cn68xx;
565 	struct cvmx_ipd_ecc_ctl_s cn68xxp1;
566 };
567 
568 typedef union cvmx_ipd_ecc_ctl cvmx_ipd_ecc_ctl_t;
569 
570 /**
571  * cvmx_ipd_free_ptr_fifo_ctl
572  *
573  * IPD_FREE_PTR_FIFO_CTL = IPD's FREE Pointer FIFO Control
574  *
575  * Allows reading of the Page-Pointers stored in the IPD's FREE Fifo.
576  * See also the IPD_FREE_PTR_VALUE
577  */
578 union cvmx_ipd_free_ptr_fifo_ctl {
579 	u64 u64;
580 	struct cvmx_ipd_free_ptr_fifo_ctl_s {
581 		u64 reserved_32_63 : 32;
582 		u64 max_cnts : 7;
583 		u64 wraddr : 8;
584 		u64 praddr : 8;
585 		u64 cena : 1;
586 		u64 raddr : 8;
587 	} s;
588 	struct cvmx_ipd_free_ptr_fifo_ctl_s cn68xx;
589 	struct cvmx_ipd_free_ptr_fifo_ctl_s cn68xxp1;
590 };
591 
592 typedef union cvmx_ipd_free_ptr_fifo_ctl cvmx_ipd_free_ptr_fifo_ctl_t;
593 
594 /**
595  * cvmx_ipd_free_ptr_value
596  *
597  * IPD_FREE_PTR_VALUE = IPD's FREE Pointer Value
598  *
599  * The value of the pointer selected through the IPD_FREE_PTR_FIFO_CTL
600  */
601 union cvmx_ipd_free_ptr_value {
602 	u64 u64;
603 	struct cvmx_ipd_free_ptr_value_s {
604 		u64 reserved_33_63 : 31;
605 		u64 ptr : 33;
606 	} s;
607 	struct cvmx_ipd_free_ptr_value_s cn68xx;
608 	struct cvmx_ipd_free_ptr_value_s cn68xxp1;
609 };
610 
611 typedef union cvmx_ipd_free_ptr_value cvmx_ipd_free_ptr_value_t;
612 
613 /**
614  * cvmx_ipd_hold_ptr_fifo_ctl
615  *
616  * IPD_HOLD_PTR_FIFO_CTL = IPD's Holding Pointer FIFO Control
617  *
618  * Allows reading of the Page-Pointers stored in the IPD's Holding Fifo.
619  */
620 union cvmx_ipd_hold_ptr_fifo_ctl {
621 	u64 u64;
622 	struct cvmx_ipd_hold_ptr_fifo_ctl_s {
623 		u64 reserved_43_63 : 21;
624 		u64 ptr : 33;
625 		u64 max_pkt : 3;
626 		u64 praddr : 3;
627 		u64 cena : 1;
628 		u64 raddr : 3;
629 	} s;
630 	struct cvmx_ipd_hold_ptr_fifo_ctl_s cn68xx;
631 	struct cvmx_ipd_hold_ptr_fifo_ctl_s cn68xxp1;
632 };
633 
634 typedef union cvmx_ipd_hold_ptr_fifo_ctl cvmx_ipd_hold_ptr_fifo_ctl_t;
635 
636 /**
637  * cvmx_ipd_int_enb
638  *
639  * IPD_INTERRUPT_ENB = IPD Interrupt Enable Register
640  * Used to enable the various interrupting conditions of IPD
641  */
642 union cvmx_ipd_int_enb {
643 	u64 u64;
644 	struct cvmx_ipd_int_enb_s {
645 		u64 reserved_23_63 : 41;
646 		u64 pw3_dbe : 1;
647 		u64 pw3_sbe : 1;
648 		u64 pw2_dbe : 1;
649 		u64 pw2_sbe : 1;
650 		u64 pw1_dbe : 1;
651 		u64 pw1_sbe : 1;
652 		u64 pw0_dbe : 1;
653 		u64 pw0_sbe : 1;
654 		u64 dat : 1;
655 		u64 eop : 1;
656 		u64 sop : 1;
657 		u64 pq_sub : 1;
658 		u64 pq_add : 1;
659 		u64 bc_ovr : 1;
660 		u64 d_coll : 1;
661 		u64 c_coll : 1;
662 		u64 cc_ovr : 1;
663 		u64 dc_ovr : 1;
664 		u64 bp_sub : 1;
665 		u64 prc_par3 : 1;
666 		u64 prc_par2 : 1;
667 		u64 prc_par1 : 1;
668 		u64 prc_par0 : 1;
669 	} s;
670 	struct cvmx_ipd_int_enb_cn30xx {
671 		u64 reserved_5_63 : 59;
672 		u64 bp_sub : 1;
673 		u64 prc_par3 : 1;
674 		u64 prc_par2 : 1;
675 		u64 prc_par1 : 1;
676 		u64 prc_par0 : 1;
677 	} cn30xx;
678 	struct cvmx_ipd_int_enb_cn30xx cn31xx;
679 	struct cvmx_ipd_int_enb_cn38xx {
680 		u64 reserved_10_63 : 54;
681 		u64 bc_ovr : 1;
682 		u64 d_coll : 1;
683 		u64 c_coll : 1;
684 		u64 cc_ovr : 1;
685 		u64 dc_ovr : 1;
686 		u64 bp_sub : 1;
687 		u64 prc_par3 : 1;
688 		u64 prc_par2 : 1;
689 		u64 prc_par1 : 1;
690 		u64 prc_par0 : 1;
691 	} cn38xx;
692 	struct cvmx_ipd_int_enb_cn30xx cn38xxp2;
693 	struct cvmx_ipd_int_enb_cn38xx cn50xx;
694 	struct cvmx_ipd_int_enb_cn52xx {
695 		u64 reserved_12_63 : 52;
696 		u64 pq_sub : 1;
697 		u64 pq_add : 1;
698 		u64 bc_ovr : 1;
699 		u64 d_coll : 1;
700 		u64 c_coll : 1;
701 		u64 cc_ovr : 1;
702 		u64 dc_ovr : 1;
703 		u64 bp_sub : 1;
704 		u64 prc_par3 : 1;
705 		u64 prc_par2 : 1;
706 		u64 prc_par1 : 1;
707 		u64 prc_par0 : 1;
708 	} cn52xx;
709 	struct cvmx_ipd_int_enb_cn52xx cn52xxp1;
710 	struct cvmx_ipd_int_enb_cn52xx cn56xx;
711 	struct cvmx_ipd_int_enb_cn52xx cn56xxp1;
712 	struct cvmx_ipd_int_enb_cn38xx cn58xx;
713 	struct cvmx_ipd_int_enb_cn38xx cn58xxp1;
714 	struct cvmx_ipd_int_enb_cn52xx cn61xx;
715 	struct cvmx_ipd_int_enb_cn52xx cn63xx;
716 	struct cvmx_ipd_int_enb_cn52xx cn63xxp1;
717 	struct cvmx_ipd_int_enb_cn52xx cn66xx;
718 	struct cvmx_ipd_int_enb_s cn68xx;
719 	struct cvmx_ipd_int_enb_s cn68xxp1;
720 	struct cvmx_ipd_int_enb_cn52xx cn70xx;
721 	struct cvmx_ipd_int_enb_cn52xx cn70xxp1;
722 	struct cvmx_ipd_int_enb_cn52xx cnf71xx;
723 };
724 
725 typedef union cvmx_ipd_int_enb cvmx_ipd_int_enb_t;
726 
727 /**
728  * cvmx_ipd_int_sum
729  *
730  * IPD_INTERRUPT_SUM = IPD Interrupt Summary Register
731  * Set when an interrupt condition occurs, write '1' to clear.
732  */
733 union cvmx_ipd_int_sum {
734 	u64 u64;
735 	struct cvmx_ipd_int_sum_s {
736 		u64 reserved_23_63 : 41;
737 		u64 pw3_dbe : 1;
738 		u64 pw3_sbe : 1;
739 		u64 pw2_dbe : 1;
740 		u64 pw2_sbe : 1;
741 		u64 pw1_dbe : 1;
742 		u64 pw1_sbe : 1;
743 		u64 pw0_dbe : 1;
744 		u64 pw0_sbe : 1;
745 		u64 dat : 1;
746 		u64 eop : 1;
747 		u64 sop : 1;
748 		u64 pq_sub : 1;
749 		u64 pq_add : 1;
750 		u64 bc_ovr : 1;
751 		u64 d_coll : 1;
752 		u64 c_coll : 1;
753 		u64 cc_ovr : 1;
754 		u64 dc_ovr : 1;
755 		u64 bp_sub : 1;
756 		u64 prc_par3 : 1;
757 		u64 prc_par2 : 1;
758 		u64 prc_par1 : 1;
759 		u64 prc_par0 : 1;
760 	} s;
761 	struct cvmx_ipd_int_sum_cn30xx {
762 		u64 reserved_5_63 : 59;
763 		u64 bp_sub : 1;
764 		u64 prc_par3 : 1;
765 		u64 prc_par2 : 1;
766 		u64 prc_par1 : 1;
767 		u64 prc_par0 : 1;
768 	} cn30xx;
769 	struct cvmx_ipd_int_sum_cn30xx cn31xx;
770 	struct cvmx_ipd_int_sum_cn38xx {
771 		u64 reserved_10_63 : 54;
772 		u64 bc_ovr : 1;
773 		u64 d_coll : 1;
774 		u64 c_coll : 1;
775 		u64 cc_ovr : 1;
776 		u64 dc_ovr : 1;
777 		u64 bp_sub : 1;
778 		u64 prc_par3 : 1;
779 		u64 prc_par2 : 1;
780 		u64 prc_par1 : 1;
781 		u64 prc_par0 : 1;
782 	} cn38xx;
783 	struct cvmx_ipd_int_sum_cn30xx cn38xxp2;
784 	struct cvmx_ipd_int_sum_cn38xx cn50xx;
785 	struct cvmx_ipd_int_sum_cn52xx {
786 		u64 reserved_12_63 : 52;
787 		u64 pq_sub : 1;
788 		u64 pq_add : 1;
789 		u64 bc_ovr : 1;
790 		u64 d_coll : 1;
791 		u64 c_coll : 1;
792 		u64 cc_ovr : 1;
793 		u64 dc_ovr : 1;
794 		u64 bp_sub : 1;
795 		u64 prc_par3 : 1;
796 		u64 prc_par2 : 1;
797 		u64 prc_par1 : 1;
798 		u64 prc_par0 : 1;
799 	} cn52xx;
800 	struct cvmx_ipd_int_sum_cn52xx cn52xxp1;
801 	struct cvmx_ipd_int_sum_cn52xx cn56xx;
802 	struct cvmx_ipd_int_sum_cn52xx cn56xxp1;
803 	struct cvmx_ipd_int_sum_cn38xx cn58xx;
804 	struct cvmx_ipd_int_sum_cn38xx cn58xxp1;
805 	struct cvmx_ipd_int_sum_cn52xx cn61xx;
806 	struct cvmx_ipd_int_sum_cn52xx cn63xx;
807 	struct cvmx_ipd_int_sum_cn52xx cn63xxp1;
808 	struct cvmx_ipd_int_sum_cn52xx cn66xx;
809 	struct cvmx_ipd_int_sum_s cn68xx;
810 	struct cvmx_ipd_int_sum_s cn68xxp1;
811 	struct cvmx_ipd_int_sum_cn52xx cn70xx;
812 	struct cvmx_ipd_int_sum_cn52xx cn70xxp1;
813 	struct cvmx_ipd_int_sum_cn52xx cnf71xx;
814 };
815 
816 typedef union cvmx_ipd_int_sum cvmx_ipd_int_sum_t;
817 
818 /**
819  * cvmx_ipd_next_pkt_ptr
820  *
821  * IPD_NEXT_PKT_PTR = IPD's Next Packet Pointer
822  *
823  * The value of the packet-pointer fetched and in the valid register.
824  */
825 union cvmx_ipd_next_pkt_ptr {
826 	u64 u64;
827 	struct cvmx_ipd_next_pkt_ptr_s {
828 		u64 reserved_33_63 : 31;
829 		u64 ptr : 33;
830 	} s;
831 	struct cvmx_ipd_next_pkt_ptr_s cn68xx;
832 	struct cvmx_ipd_next_pkt_ptr_s cn68xxp1;
833 };
834 
835 typedef union cvmx_ipd_next_pkt_ptr cvmx_ipd_next_pkt_ptr_t;
836 
837 /**
838  * cvmx_ipd_next_wqe_ptr
839  *
840  * IPD_NEXT_WQE_PTR = IPD's NEXT_WQE Pointer
841  *
842  * The value of the WQE-pointer fetched and in the valid register.
843  */
844 union cvmx_ipd_next_wqe_ptr {
845 	u64 u64;
846 	struct cvmx_ipd_next_wqe_ptr_s {
847 		u64 reserved_33_63 : 31;
848 		u64 ptr : 33;
849 	} s;
850 	struct cvmx_ipd_next_wqe_ptr_s cn68xx;
851 	struct cvmx_ipd_next_wqe_ptr_s cn68xxp1;
852 };
853 
854 typedef union cvmx_ipd_next_wqe_ptr cvmx_ipd_next_wqe_ptr_t;
855 
856 /**
857  * cvmx_ipd_not_1st_mbuff_skip
858  *
859  * The number of words that the IPD will skip when writing any MBUFF that is not the first.
860  *
861  */
862 union cvmx_ipd_not_1st_mbuff_skip {
863 	u64 u64;
864 	struct cvmx_ipd_not_1st_mbuff_skip_s {
865 		u64 reserved_6_63 : 58;
866 		u64 skip_sz : 6;
867 	} s;
868 	struct cvmx_ipd_not_1st_mbuff_skip_s cn30xx;
869 	struct cvmx_ipd_not_1st_mbuff_skip_s cn31xx;
870 	struct cvmx_ipd_not_1st_mbuff_skip_s cn38xx;
871 	struct cvmx_ipd_not_1st_mbuff_skip_s cn38xxp2;
872 	struct cvmx_ipd_not_1st_mbuff_skip_s cn50xx;
873 	struct cvmx_ipd_not_1st_mbuff_skip_s cn52xx;
874 	struct cvmx_ipd_not_1st_mbuff_skip_s cn52xxp1;
875 	struct cvmx_ipd_not_1st_mbuff_skip_s cn56xx;
876 	struct cvmx_ipd_not_1st_mbuff_skip_s cn56xxp1;
877 	struct cvmx_ipd_not_1st_mbuff_skip_s cn58xx;
878 	struct cvmx_ipd_not_1st_mbuff_skip_s cn58xxp1;
879 	struct cvmx_ipd_not_1st_mbuff_skip_s cn61xx;
880 	struct cvmx_ipd_not_1st_mbuff_skip_s cn63xx;
881 	struct cvmx_ipd_not_1st_mbuff_skip_s cn63xxp1;
882 	struct cvmx_ipd_not_1st_mbuff_skip_s cn66xx;
883 	struct cvmx_ipd_not_1st_mbuff_skip_s cn68xx;
884 	struct cvmx_ipd_not_1st_mbuff_skip_s cn68xxp1;
885 	struct cvmx_ipd_not_1st_mbuff_skip_s cn70xx;
886 	struct cvmx_ipd_not_1st_mbuff_skip_s cn70xxp1;
887 	struct cvmx_ipd_not_1st_mbuff_skip_s cnf71xx;
888 };
889 
890 typedef union cvmx_ipd_not_1st_mbuff_skip cvmx_ipd_not_1st_mbuff_skip_t;
891 
892 /**
893  * cvmx_ipd_on_bp_drop_pkt#
894  *
895  * RESERVE SPACE UPTO 0x3FFF
896  *
897  *
898  * RESERVED FOR FORMER IPD_SUB_PKIND_FCS - MOVED TO PIP
899  *
900  * RESERVE 4008 - 40FF
901  *
902  *
903  *                  IPD_ON_BP_DROP_PKT = IPD On Backpressure Drop Packet
904  *
905  * When IPD applies backpressure to a BPID and the corresponding bit in this register is set,
906  * then previously received packets will be dropped when processed.
907  */
908 union cvmx_ipd_on_bp_drop_pktx {
909 	u64 u64;
910 	struct cvmx_ipd_on_bp_drop_pktx_s {
911 		u64 prt_enb : 64;
912 	} s;
913 	struct cvmx_ipd_on_bp_drop_pktx_s cn68xx;
914 	struct cvmx_ipd_on_bp_drop_pktx_s cn68xxp1;
915 };
916 
917 typedef union cvmx_ipd_on_bp_drop_pktx cvmx_ipd_on_bp_drop_pktx_t;
918 
919 /**
920  * cvmx_ipd_packet_mbuff_size
921  *
922  * The number of words in a MBUFF used for packet data store.
923  *
924  */
925 union cvmx_ipd_packet_mbuff_size {
926 	u64 u64;
927 	struct cvmx_ipd_packet_mbuff_size_s {
928 		u64 reserved_12_63 : 52;
929 		u64 mb_size : 12;
930 	} s;
931 	struct cvmx_ipd_packet_mbuff_size_s cn30xx;
932 	struct cvmx_ipd_packet_mbuff_size_s cn31xx;
933 	struct cvmx_ipd_packet_mbuff_size_s cn38xx;
934 	struct cvmx_ipd_packet_mbuff_size_s cn38xxp2;
935 	struct cvmx_ipd_packet_mbuff_size_s cn50xx;
936 	struct cvmx_ipd_packet_mbuff_size_s cn52xx;
937 	struct cvmx_ipd_packet_mbuff_size_s cn52xxp1;
938 	struct cvmx_ipd_packet_mbuff_size_s cn56xx;
939 	struct cvmx_ipd_packet_mbuff_size_s cn56xxp1;
940 	struct cvmx_ipd_packet_mbuff_size_s cn58xx;
941 	struct cvmx_ipd_packet_mbuff_size_s cn58xxp1;
942 	struct cvmx_ipd_packet_mbuff_size_s cn61xx;
943 	struct cvmx_ipd_packet_mbuff_size_s cn63xx;
944 	struct cvmx_ipd_packet_mbuff_size_s cn63xxp1;
945 	struct cvmx_ipd_packet_mbuff_size_s cn66xx;
946 	struct cvmx_ipd_packet_mbuff_size_s cn68xx;
947 	struct cvmx_ipd_packet_mbuff_size_s cn68xxp1;
948 	struct cvmx_ipd_packet_mbuff_size_s cn70xx;
949 	struct cvmx_ipd_packet_mbuff_size_s cn70xxp1;
950 	struct cvmx_ipd_packet_mbuff_size_s cnf71xx;
951 };
952 
953 typedef union cvmx_ipd_packet_mbuff_size cvmx_ipd_packet_mbuff_size_t;
954 
955 /**
956  * cvmx_ipd_pkt_err
957  *
958  * IPD_PKT_ERR = IPD Packet Error Register
959  *
960  * Provides status about the failing packet recevie error.
961  */
962 union cvmx_ipd_pkt_err {
963 	u64 u64;
964 	struct cvmx_ipd_pkt_err_s {
965 		u64 reserved_6_63 : 58;
966 		u64 reasm : 6;
967 	} s;
968 	struct cvmx_ipd_pkt_err_s cn68xx;
969 	struct cvmx_ipd_pkt_err_s cn68xxp1;
970 };
971 
972 typedef union cvmx_ipd_pkt_err cvmx_ipd_pkt_err_t;
973 
974 /**
975  * cvmx_ipd_pkt_ptr_valid
976  *
977  * The value of the packet-pointer fetched and in the valid register.
978  *
979  */
980 union cvmx_ipd_pkt_ptr_valid {
981 	u64 u64;
982 	struct cvmx_ipd_pkt_ptr_valid_s {
983 		u64 reserved_29_63 : 35;
984 		u64 ptr : 29;
985 	} s;
986 	struct cvmx_ipd_pkt_ptr_valid_s cn30xx;
987 	struct cvmx_ipd_pkt_ptr_valid_s cn31xx;
988 	struct cvmx_ipd_pkt_ptr_valid_s cn38xx;
989 	struct cvmx_ipd_pkt_ptr_valid_s cn50xx;
990 	struct cvmx_ipd_pkt_ptr_valid_s cn52xx;
991 	struct cvmx_ipd_pkt_ptr_valid_s cn52xxp1;
992 	struct cvmx_ipd_pkt_ptr_valid_s cn56xx;
993 	struct cvmx_ipd_pkt_ptr_valid_s cn56xxp1;
994 	struct cvmx_ipd_pkt_ptr_valid_s cn58xx;
995 	struct cvmx_ipd_pkt_ptr_valid_s cn58xxp1;
996 	struct cvmx_ipd_pkt_ptr_valid_s cn61xx;
997 	struct cvmx_ipd_pkt_ptr_valid_s cn63xx;
998 	struct cvmx_ipd_pkt_ptr_valid_s cn63xxp1;
999 	struct cvmx_ipd_pkt_ptr_valid_s cn66xx;
1000 	struct cvmx_ipd_pkt_ptr_valid_s cn70xx;
1001 	struct cvmx_ipd_pkt_ptr_valid_s cn70xxp1;
1002 	struct cvmx_ipd_pkt_ptr_valid_s cnf71xx;
1003 };
1004 
1005 typedef union cvmx_ipd_pkt_ptr_valid cvmx_ipd_pkt_ptr_valid_t;
1006 
1007 /**
1008  * cvmx_ipd_port#_bp_page_cnt
1009  *
1010  * IPD_PORTX_BP_PAGE_CNT = IPD Port Backpressure Page Count
1011  * The number of pages in use by the port that when exceeded, backpressure will be applied to the
1012  * port.
1013  * See also IPD_PORTX_BP_PAGE_CNT2
1014  * See also IPD_PORTX_BP_PAGE_CNT3
1015  */
1016 union cvmx_ipd_portx_bp_page_cnt {
1017 	u64 u64;
1018 	struct cvmx_ipd_portx_bp_page_cnt_s {
1019 		u64 reserved_18_63 : 46;
1020 		u64 bp_enb : 1;
1021 		u64 page_cnt : 17;
1022 	} s;
1023 	struct cvmx_ipd_portx_bp_page_cnt_s cn30xx;
1024 	struct cvmx_ipd_portx_bp_page_cnt_s cn31xx;
1025 	struct cvmx_ipd_portx_bp_page_cnt_s cn38xx;
1026 	struct cvmx_ipd_portx_bp_page_cnt_s cn38xxp2;
1027 	struct cvmx_ipd_portx_bp_page_cnt_s cn50xx;
1028 	struct cvmx_ipd_portx_bp_page_cnt_s cn52xx;
1029 	struct cvmx_ipd_portx_bp_page_cnt_s cn52xxp1;
1030 	struct cvmx_ipd_portx_bp_page_cnt_s cn56xx;
1031 	struct cvmx_ipd_portx_bp_page_cnt_s cn56xxp1;
1032 	struct cvmx_ipd_portx_bp_page_cnt_s cn58xx;
1033 	struct cvmx_ipd_portx_bp_page_cnt_s cn58xxp1;
1034 	struct cvmx_ipd_portx_bp_page_cnt_s cn61xx;
1035 	struct cvmx_ipd_portx_bp_page_cnt_s cn63xx;
1036 	struct cvmx_ipd_portx_bp_page_cnt_s cn63xxp1;
1037 	struct cvmx_ipd_portx_bp_page_cnt_s cn66xx;
1038 	struct cvmx_ipd_portx_bp_page_cnt_s cn70xx;
1039 	struct cvmx_ipd_portx_bp_page_cnt_s cn70xxp1;
1040 	struct cvmx_ipd_portx_bp_page_cnt_s cnf71xx;
1041 };
1042 
1043 typedef union cvmx_ipd_portx_bp_page_cnt cvmx_ipd_portx_bp_page_cnt_t;
1044 
1045 /**
1046  * cvmx_ipd_port#_bp_page_cnt2
1047  *
1048  * IPD_PORTX_BP_PAGE_CNT2 = IPD Port Backpressure Page Count
1049  * The number of pages in use by the port that when exceeded, backpressure will be applied to the
1050  * port.
1051  * See also IPD_PORTX_BP_PAGE_CNT
1052  * See also IPD_PORTX_BP_PAGE_CNT3
1053  * 0x368-0x380
1054  */
1055 union cvmx_ipd_portx_bp_page_cnt2 {
1056 	u64 u64;
1057 	struct cvmx_ipd_portx_bp_page_cnt2_s {
1058 		u64 reserved_18_63 : 46;
1059 		u64 bp_enb : 1;
1060 		u64 page_cnt : 17;
1061 	} s;
1062 	struct cvmx_ipd_portx_bp_page_cnt2_s cn52xx;
1063 	struct cvmx_ipd_portx_bp_page_cnt2_s cn52xxp1;
1064 	struct cvmx_ipd_portx_bp_page_cnt2_s cn56xx;
1065 	struct cvmx_ipd_portx_bp_page_cnt2_s cn56xxp1;
1066 	struct cvmx_ipd_portx_bp_page_cnt2_s cn61xx;
1067 	struct cvmx_ipd_portx_bp_page_cnt2_s cn63xx;
1068 	struct cvmx_ipd_portx_bp_page_cnt2_s cn63xxp1;
1069 	struct cvmx_ipd_portx_bp_page_cnt2_s cn66xx;
1070 	struct cvmx_ipd_portx_bp_page_cnt2_s cn70xx;
1071 	struct cvmx_ipd_portx_bp_page_cnt2_s cn70xxp1;
1072 	struct cvmx_ipd_portx_bp_page_cnt2_s cnf71xx;
1073 };
1074 
1075 typedef union cvmx_ipd_portx_bp_page_cnt2 cvmx_ipd_portx_bp_page_cnt2_t;
1076 
1077 /**
1078  * cvmx_ipd_port#_bp_page_cnt3
1079  *
1080  * IPD_PORTX_BP_PAGE_CNT3 = IPD Port Backpressure Page Count
1081  * The number of pages in use by the port that when exceeded, backpressure will be applied to the
1082  * port.
1083  * See also IPD_PORTX_BP_PAGE_CNT
1084  * See also IPD_PORTX_BP_PAGE_CNT2
1085  * 0x3d0-408
1086  */
1087 union cvmx_ipd_portx_bp_page_cnt3 {
1088 	u64 u64;
1089 	struct cvmx_ipd_portx_bp_page_cnt3_s {
1090 		u64 reserved_18_63 : 46;
1091 		u64 bp_enb : 1;
1092 		u64 page_cnt : 17;
1093 	} s;
1094 	struct cvmx_ipd_portx_bp_page_cnt3_s cn61xx;
1095 	struct cvmx_ipd_portx_bp_page_cnt3_s cn63xx;
1096 	struct cvmx_ipd_portx_bp_page_cnt3_s cn63xxp1;
1097 	struct cvmx_ipd_portx_bp_page_cnt3_s cn66xx;
1098 	struct cvmx_ipd_portx_bp_page_cnt3_s cn70xx;
1099 	struct cvmx_ipd_portx_bp_page_cnt3_s cn70xxp1;
1100 	struct cvmx_ipd_portx_bp_page_cnt3_s cnf71xx;
1101 };
1102 
1103 typedef union cvmx_ipd_portx_bp_page_cnt3 cvmx_ipd_portx_bp_page_cnt3_t;
1104 
1105 /**
1106  * cvmx_ipd_port_bp_counters2_pair#
1107  *
1108  * See also IPD_PORT_BP_COUNTERS_PAIRX
1109  * See also IPD_PORT_BP_COUNTERS3_PAIRX
1110  * 0x388-0x3a0
1111  */
1112 union cvmx_ipd_port_bp_counters2_pairx {
1113 	u64 u64;
1114 	struct cvmx_ipd_port_bp_counters2_pairx_s {
1115 		u64 reserved_25_63 : 39;
1116 		u64 cnt_val : 25;
1117 	} s;
1118 	struct cvmx_ipd_port_bp_counters2_pairx_s cn52xx;
1119 	struct cvmx_ipd_port_bp_counters2_pairx_s cn52xxp1;
1120 	struct cvmx_ipd_port_bp_counters2_pairx_s cn56xx;
1121 	struct cvmx_ipd_port_bp_counters2_pairx_s cn56xxp1;
1122 	struct cvmx_ipd_port_bp_counters2_pairx_s cn61xx;
1123 	struct cvmx_ipd_port_bp_counters2_pairx_s cn63xx;
1124 	struct cvmx_ipd_port_bp_counters2_pairx_s cn63xxp1;
1125 	struct cvmx_ipd_port_bp_counters2_pairx_s cn66xx;
1126 	struct cvmx_ipd_port_bp_counters2_pairx_s cn70xx;
1127 	struct cvmx_ipd_port_bp_counters2_pairx_s cn70xxp1;
1128 	struct cvmx_ipd_port_bp_counters2_pairx_s cnf71xx;
1129 };
1130 
1131 typedef union cvmx_ipd_port_bp_counters2_pairx cvmx_ipd_port_bp_counters2_pairx_t;
1132 
1133 /**
1134  * cvmx_ipd_port_bp_counters3_pair#
1135  *
1136  * See also IPD_PORT_BP_COUNTERS_PAIRX
1137  * See also IPD_PORT_BP_COUNTERS2_PAIRX
1138  * 0x3b0-0x3c8
1139  */
1140 union cvmx_ipd_port_bp_counters3_pairx {
1141 	u64 u64;
1142 	struct cvmx_ipd_port_bp_counters3_pairx_s {
1143 		u64 reserved_25_63 : 39;
1144 		u64 cnt_val : 25;
1145 	} s;
1146 	struct cvmx_ipd_port_bp_counters3_pairx_s cn61xx;
1147 	struct cvmx_ipd_port_bp_counters3_pairx_s cn63xx;
1148 	struct cvmx_ipd_port_bp_counters3_pairx_s cn63xxp1;
1149 	struct cvmx_ipd_port_bp_counters3_pairx_s cn66xx;
1150 	struct cvmx_ipd_port_bp_counters3_pairx_s cn70xx;
1151 	struct cvmx_ipd_port_bp_counters3_pairx_s cn70xxp1;
1152 	struct cvmx_ipd_port_bp_counters3_pairx_s cnf71xx;
1153 };
1154 
1155 typedef union cvmx_ipd_port_bp_counters3_pairx cvmx_ipd_port_bp_counters3_pairx_t;
1156 
1157 /**
1158  * cvmx_ipd_port_bp_counters4_pair#
1159  *
1160  * See also IPD_PORT_BP_COUNTERS_PAIRX
1161  * See also IPD_PORT_BP_COUNTERS2_PAIRX
1162  * 0x410-0x3c8
1163  */
1164 union cvmx_ipd_port_bp_counters4_pairx {
1165 	u64 u64;
1166 	struct cvmx_ipd_port_bp_counters4_pairx_s {
1167 		u64 reserved_25_63 : 39;
1168 		u64 cnt_val : 25;
1169 	} s;
1170 	struct cvmx_ipd_port_bp_counters4_pairx_s cn61xx;
1171 	struct cvmx_ipd_port_bp_counters4_pairx_s cn66xx;
1172 	struct cvmx_ipd_port_bp_counters4_pairx_s cn70xx;
1173 	struct cvmx_ipd_port_bp_counters4_pairx_s cn70xxp1;
1174 	struct cvmx_ipd_port_bp_counters4_pairx_s cnf71xx;
1175 };
1176 
1177 typedef union cvmx_ipd_port_bp_counters4_pairx cvmx_ipd_port_bp_counters4_pairx_t;
1178 
1179 /**
1180  * cvmx_ipd_port_bp_counters_pair#
1181  *
1182  * See also IPD_PORT_BP_COUNTERS2_PAIRX
1183  * See also IPD_PORT_BP_COUNTERS3_PAIRX
1184  * 0x1b8-0x2d0
1185  */
1186 union cvmx_ipd_port_bp_counters_pairx {
1187 	u64 u64;
1188 	struct cvmx_ipd_port_bp_counters_pairx_s {
1189 		u64 reserved_25_63 : 39;
1190 		u64 cnt_val : 25;
1191 	} s;
1192 	struct cvmx_ipd_port_bp_counters_pairx_s cn30xx;
1193 	struct cvmx_ipd_port_bp_counters_pairx_s cn31xx;
1194 	struct cvmx_ipd_port_bp_counters_pairx_s cn38xx;
1195 	struct cvmx_ipd_port_bp_counters_pairx_s cn38xxp2;
1196 	struct cvmx_ipd_port_bp_counters_pairx_s cn50xx;
1197 	struct cvmx_ipd_port_bp_counters_pairx_s cn52xx;
1198 	struct cvmx_ipd_port_bp_counters_pairx_s cn52xxp1;
1199 	struct cvmx_ipd_port_bp_counters_pairx_s cn56xx;
1200 	struct cvmx_ipd_port_bp_counters_pairx_s cn56xxp1;
1201 	struct cvmx_ipd_port_bp_counters_pairx_s cn58xx;
1202 	struct cvmx_ipd_port_bp_counters_pairx_s cn58xxp1;
1203 	struct cvmx_ipd_port_bp_counters_pairx_s cn61xx;
1204 	struct cvmx_ipd_port_bp_counters_pairx_s cn63xx;
1205 	struct cvmx_ipd_port_bp_counters_pairx_s cn63xxp1;
1206 	struct cvmx_ipd_port_bp_counters_pairx_s cn66xx;
1207 	struct cvmx_ipd_port_bp_counters_pairx_s cn70xx;
1208 	struct cvmx_ipd_port_bp_counters_pairx_s cn70xxp1;
1209 	struct cvmx_ipd_port_bp_counters_pairx_s cnf71xx;
1210 };
1211 
1212 typedef union cvmx_ipd_port_bp_counters_pairx cvmx_ipd_port_bp_counters_pairx_t;
1213 
1214 /**
1215  * cvmx_ipd_port_ptr_fifo_ctl
1216  *
1217  * IPD_PORT_PTR_FIFO_CTL = IPD's Reasm-Id Pointer FIFO Control
1218  *
1219  * Allows reading of the Page-Pointers stored in the IPD's Reasm-Id Fifo.
1220  */
1221 union cvmx_ipd_port_ptr_fifo_ctl {
1222 	u64 u64;
1223 	struct cvmx_ipd_port_ptr_fifo_ctl_s {
1224 		u64 reserved_48_63 : 16;
1225 		u64 ptr : 33;
1226 		u64 max_pkt : 7;
1227 		u64 cena : 1;
1228 		u64 raddr : 7;
1229 	} s;
1230 	struct cvmx_ipd_port_ptr_fifo_ctl_s cn68xx;
1231 	struct cvmx_ipd_port_ptr_fifo_ctl_s cn68xxp1;
1232 };
1233 
1234 typedef union cvmx_ipd_port_ptr_fifo_ctl cvmx_ipd_port_ptr_fifo_ctl_t;
1235 
1236 /**
1237  * cvmx_ipd_port_qos_#_cnt
1238  *
1239  * IPD_PORT_QOS_X_CNT = IPD PortX QOS-0 Count
1240  * A counter per port/qos. Counter are originzed in sequence where the first 8 counter (0-7)
1241  * belong to Port-0
1242  * QOS 0-7 respectively followed by port 1 at (8-15), etc
1243  * Ports 0-3, 32-43
1244  */
1245 union cvmx_ipd_port_qos_x_cnt {
1246 	u64 u64;
1247 	struct cvmx_ipd_port_qos_x_cnt_s {
1248 		u64 wmark : 32;
1249 		u64 cnt : 32;
1250 	} s;
1251 	struct cvmx_ipd_port_qos_x_cnt_s cn52xx;
1252 	struct cvmx_ipd_port_qos_x_cnt_s cn52xxp1;
1253 	struct cvmx_ipd_port_qos_x_cnt_s cn56xx;
1254 	struct cvmx_ipd_port_qos_x_cnt_s cn56xxp1;
1255 	struct cvmx_ipd_port_qos_x_cnt_s cn61xx;
1256 	struct cvmx_ipd_port_qos_x_cnt_s cn63xx;
1257 	struct cvmx_ipd_port_qos_x_cnt_s cn63xxp1;
1258 	struct cvmx_ipd_port_qos_x_cnt_s cn66xx;
1259 	struct cvmx_ipd_port_qos_x_cnt_s cn68xx;
1260 	struct cvmx_ipd_port_qos_x_cnt_s cn68xxp1;
1261 	struct cvmx_ipd_port_qos_x_cnt_s cn70xx;
1262 	struct cvmx_ipd_port_qos_x_cnt_s cn70xxp1;
1263 	struct cvmx_ipd_port_qos_x_cnt_s cnf71xx;
1264 };
1265 
1266 typedef union cvmx_ipd_port_qos_x_cnt cvmx_ipd_port_qos_x_cnt_t;
1267 
1268 /**
1269  * cvmx_ipd_port_qos_int#
1270  *
1271  * See the description for IPD_PORT_QOS_X_CNT
1272  * 0=P0-7; 1=P8-15; 2=P16-23; 3=P24-31; 4=P32-39; 5=P40-47; 6=P48-55; 7=P56-63
1273  * Only ports used are: P0-3, p16-19, P24, P32-39. Therefore only IPD_PORT_QOS_INT0 ([63:32] ==
1274  * Reserved), IPD_PORT_QOS_INT2 ([63:32] == Reserved), IPD_PORT_QOS_INT3 ([63:8] == Reserved),
1275  * IPD_PORT_QOS_INT4
1276  */
1277 union cvmx_ipd_port_qos_intx {
1278 	u64 u64;
1279 	struct cvmx_ipd_port_qos_intx_s {
1280 		u64 intr : 64;
1281 	} s;
1282 	struct cvmx_ipd_port_qos_intx_s cn52xx;
1283 	struct cvmx_ipd_port_qos_intx_s cn52xxp1;
1284 	struct cvmx_ipd_port_qos_intx_s cn56xx;
1285 	struct cvmx_ipd_port_qos_intx_s cn56xxp1;
1286 	struct cvmx_ipd_port_qos_intx_s cn61xx;
1287 	struct cvmx_ipd_port_qos_intx_s cn63xx;
1288 	struct cvmx_ipd_port_qos_intx_s cn63xxp1;
1289 	struct cvmx_ipd_port_qos_intx_s cn66xx;
1290 	struct cvmx_ipd_port_qos_intx_s cn68xx;
1291 	struct cvmx_ipd_port_qos_intx_s cn68xxp1;
1292 	struct cvmx_ipd_port_qos_intx_s cn70xx;
1293 	struct cvmx_ipd_port_qos_intx_s cn70xxp1;
1294 	struct cvmx_ipd_port_qos_intx_s cnf71xx;
1295 };
1296 
1297 typedef union cvmx_ipd_port_qos_intx cvmx_ipd_port_qos_intx_t;
1298 
1299 /**
1300  * cvmx_ipd_port_qos_int_enb#
1301  *
1302  * "When the IPD_PORT_QOS_INTX[\#] is '1' and IPD_PORT_QOS_INT_ENBX[\#] is '1' a interrupt will be
1303  * generated."
1304  */
1305 union cvmx_ipd_port_qos_int_enbx {
1306 	u64 u64;
1307 	struct cvmx_ipd_port_qos_int_enbx_s {
1308 		u64 enb : 64;
1309 	} s;
1310 	struct cvmx_ipd_port_qos_int_enbx_s cn52xx;
1311 	struct cvmx_ipd_port_qos_int_enbx_s cn52xxp1;
1312 	struct cvmx_ipd_port_qos_int_enbx_s cn56xx;
1313 	struct cvmx_ipd_port_qos_int_enbx_s cn56xxp1;
1314 	struct cvmx_ipd_port_qos_int_enbx_s cn61xx;
1315 	struct cvmx_ipd_port_qos_int_enbx_s cn63xx;
1316 	struct cvmx_ipd_port_qos_int_enbx_s cn63xxp1;
1317 	struct cvmx_ipd_port_qos_int_enbx_s cn66xx;
1318 	struct cvmx_ipd_port_qos_int_enbx_s cn68xx;
1319 	struct cvmx_ipd_port_qos_int_enbx_s cn68xxp1;
1320 	struct cvmx_ipd_port_qos_int_enbx_s cn70xx;
1321 	struct cvmx_ipd_port_qos_int_enbx_s cn70xxp1;
1322 	struct cvmx_ipd_port_qos_int_enbx_s cnf71xx;
1323 };
1324 
1325 typedef union cvmx_ipd_port_qos_int_enbx cvmx_ipd_port_qos_int_enbx_t;
1326 
1327 /**
1328  * cvmx_ipd_port_sop#
1329  *
1330  * IPD_PORT_SOP = IPD Reasm-Id SOP
1331  *
1332  * Set when a SOP is detected on a reasm-num. Where the reasm-num value set the bit vector of this register.
1333  */
1334 union cvmx_ipd_port_sopx {
1335 	u64 u64;
1336 	struct cvmx_ipd_port_sopx_s {
1337 		u64 sop : 64;
1338 	} s;
1339 	struct cvmx_ipd_port_sopx_s cn68xx;
1340 	struct cvmx_ipd_port_sopx_s cn68xxp1;
1341 };
1342 
1343 typedef union cvmx_ipd_port_sopx cvmx_ipd_port_sopx_t;
1344 
1345 /**
1346  * cvmx_ipd_prc_hold_ptr_fifo_ctl
1347  *
1348  * Allows reading of the Page-Pointers stored in the IPD's PRC Holding Fifo.
1349  *
1350  */
1351 union cvmx_ipd_prc_hold_ptr_fifo_ctl {
1352 	u64 u64;
1353 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s {
1354 		u64 reserved_39_63 : 25;
1355 		u64 max_pkt : 3;
1356 		u64 praddr : 3;
1357 		u64 ptr : 29;
1358 		u64 cena : 1;
1359 		u64 raddr : 3;
1360 	} s;
1361 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn30xx;
1362 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn31xx;
1363 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn38xx;
1364 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn50xx;
1365 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn52xx;
1366 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn52xxp1;
1367 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn56xx;
1368 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn56xxp1;
1369 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xx;
1370 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xxp1;
1371 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn61xx;
1372 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn63xx;
1373 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn63xxp1;
1374 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn66xx;
1375 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn70xx;
1376 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn70xxp1;
1377 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cnf71xx;
1378 };
1379 
1380 typedef union cvmx_ipd_prc_hold_ptr_fifo_ctl cvmx_ipd_prc_hold_ptr_fifo_ctl_t;
1381 
1382 /**
1383  * cvmx_ipd_prc_port_ptr_fifo_ctl
1384  *
1385  * Allows reading of the Page-Pointers stored in the IPD's PRC PORT Fifo.
1386  *
1387  */
1388 union cvmx_ipd_prc_port_ptr_fifo_ctl {
1389 	u64 u64;
1390 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s {
1391 		u64 reserved_44_63 : 20;
1392 		u64 max_pkt : 7;
1393 		u64 ptr : 29;
1394 		u64 cena : 1;
1395 		u64 raddr : 7;
1396 	} s;
1397 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn30xx;
1398 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn31xx;
1399 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn38xx;
1400 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn50xx;
1401 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn52xx;
1402 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn52xxp1;
1403 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn56xx;
1404 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn56xxp1;
1405 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xx;
1406 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xxp1;
1407 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn61xx;
1408 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn63xx;
1409 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn63xxp1;
1410 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn66xx;
1411 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn70xx;
1412 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn70xxp1;
1413 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cnf71xx;
1414 };
1415 
1416 typedef union cvmx_ipd_prc_port_ptr_fifo_ctl cvmx_ipd_prc_port_ptr_fifo_ctl_t;
1417 
1418 /**
1419  * cvmx_ipd_ptr_count
1420  *
1421  * Shows the number of WQE and Packet Page Pointers stored in the IPD.
1422  *
1423  */
1424 union cvmx_ipd_ptr_count {
1425 	u64 u64;
1426 	struct cvmx_ipd_ptr_count_s {
1427 		u64 reserved_19_63 : 45;
1428 		u64 pktv_cnt : 1;
1429 		u64 wqev_cnt : 1;
1430 		u64 pfif_cnt : 3;
1431 		u64 pkt_pcnt : 7;
1432 		u64 wqe_pcnt : 7;
1433 	} s;
1434 	struct cvmx_ipd_ptr_count_s cn30xx;
1435 	struct cvmx_ipd_ptr_count_s cn31xx;
1436 	struct cvmx_ipd_ptr_count_s cn38xx;
1437 	struct cvmx_ipd_ptr_count_s cn38xxp2;
1438 	struct cvmx_ipd_ptr_count_s cn50xx;
1439 	struct cvmx_ipd_ptr_count_s cn52xx;
1440 	struct cvmx_ipd_ptr_count_s cn52xxp1;
1441 	struct cvmx_ipd_ptr_count_s cn56xx;
1442 	struct cvmx_ipd_ptr_count_s cn56xxp1;
1443 	struct cvmx_ipd_ptr_count_s cn58xx;
1444 	struct cvmx_ipd_ptr_count_s cn58xxp1;
1445 	struct cvmx_ipd_ptr_count_s cn61xx;
1446 	struct cvmx_ipd_ptr_count_s cn63xx;
1447 	struct cvmx_ipd_ptr_count_s cn63xxp1;
1448 	struct cvmx_ipd_ptr_count_s cn66xx;
1449 	struct cvmx_ipd_ptr_count_s cn68xx;
1450 	struct cvmx_ipd_ptr_count_s cn68xxp1;
1451 	struct cvmx_ipd_ptr_count_s cn70xx;
1452 	struct cvmx_ipd_ptr_count_s cn70xxp1;
1453 	struct cvmx_ipd_ptr_count_s cnf71xx;
1454 };
1455 
1456 typedef union cvmx_ipd_ptr_count cvmx_ipd_ptr_count_t;
1457 
1458 /**
1459  * cvmx_ipd_pwp_ptr_fifo_ctl
1460  *
1461  * Allows reading of the Page-Pointers stored in the IPD's PWP Fifo.
1462  *
1463  */
1464 union cvmx_ipd_pwp_ptr_fifo_ctl {
1465 	u64 u64;
1466 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s {
1467 		u64 reserved_61_63 : 3;
1468 		u64 max_cnts : 7;
1469 		u64 wraddr : 8;
1470 		u64 praddr : 8;
1471 		u64 ptr : 29;
1472 		u64 cena : 1;
1473 		u64 raddr : 8;
1474 	} s;
1475 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn30xx;
1476 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn31xx;
1477 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn38xx;
1478 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn50xx;
1479 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn52xx;
1480 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn52xxp1;
1481 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn56xx;
1482 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn56xxp1;
1483 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xx;
1484 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xxp1;
1485 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn61xx;
1486 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn63xx;
1487 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn63xxp1;
1488 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn66xx;
1489 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn70xx;
1490 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn70xxp1;
1491 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cnf71xx;
1492 };
1493 
1494 typedef union cvmx_ipd_pwp_ptr_fifo_ctl cvmx_ipd_pwp_ptr_fifo_ctl_t;
1495 
1496 /**
1497  * cvmx_ipd_qos#_red_marks
1498  *
1499  * Set the pass-drop marks for qos level.
1500  *
1501  */
1502 union cvmx_ipd_qosx_red_marks {
1503 	u64 u64;
1504 	struct cvmx_ipd_qosx_red_marks_s {
1505 		u64 drop : 32;
1506 		u64 pass : 32;
1507 	} s;
1508 	struct cvmx_ipd_qosx_red_marks_s cn30xx;
1509 	struct cvmx_ipd_qosx_red_marks_s cn31xx;
1510 	struct cvmx_ipd_qosx_red_marks_s cn38xx;
1511 	struct cvmx_ipd_qosx_red_marks_s cn38xxp2;
1512 	struct cvmx_ipd_qosx_red_marks_s cn50xx;
1513 	struct cvmx_ipd_qosx_red_marks_s cn52xx;
1514 	struct cvmx_ipd_qosx_red_marks_s cn52xxp1;
1515 	struct cvmx_ipd_qosx_red_marks_s cn56xx;
1516 	struct cvmx_ipd_qosx_red_marks_s cn56xxp1;
1517 	struct cvmx_ipd_qosx_red_marks_s cn58xx;
1518 	struct cvmx_ipd_qosx_red_marks_s cn58xxp1;
1519 	struct cvmx_ipd_qosx_red_marks_s cn61xx;
1520 	struct cvmx_ipd_qosx_red_marks_s cn63xx;
1521 	struct cvmx_ipd_qosx_red_marks_s cn63xxp1;
1522 	struct cvmx_ipd_qosx_red_marks_s cn66xx;
1523 	struct cvmx_ipd_qosx_red_marks_s cn68xx;
1524 	struct cvmx_ipd_qosx_red_marks_s cn68xxp1;
1525 	struct cvmx_ipd_qosx_red_marks_s cn70xx;
1526 	struct cvmx_ipd_qosx_red_marks_s cn70xxp1;
1527 	struct cvmx_ipd_qosx_red_marks_s cnf71xx;
1528 };
1529 
1530 typedef union cvmx_ipd_qosx_red_marks cvmx_ipd_qosx_red_marks_t;
1531 
1532 /**
1533  * cvmx_ipd_que0_free_page_cnt
1534  *
1535  * Number of Free-Page Pointer that are available for use in the FPA for Queue-0.
1536  *
1537  */
1538 union cvmx_ipd_que0_free_page_cnt {
1539 	u64 u64;
1540 	struct cvmx_ipd_que0_free_page_cnt_s {
1541 		u64 reserved_32_63 : 32;
1542 		u64 q0_pcnt : 32;
1543 	} s;
1544 	struct cvmx_ipd_que0_free_page_cnt_s cn30xx;
1545 	struct cvmx_ipd_que0_free_page_cnt_s cn31xx;
1546 	struct cvmx_ipd_que0_free_page_cnt_s cn38xx;
1547 	struct cvmx_ipd_que0_free_page_cnt_s cn38xxp2;
1548 	struct cvmx_ipd_que0_free_page_cnt_s cn50xx;
1549 	struct cvmx_ipd_que0_free_page_cnt_s cn52xx;
1550 	struct cvmx_ipd_que0_free_page_cnt_s cn52xxp1;
1551 	struct cvmx_ipd_que0_free_page_cnt_s cn56xx;
1552 	struct cvmx_ipd_que0_free_page_cnt_s cn56xxp1;
1553 	struct cvmx_ipd_que0_free_page_cnt_s cn58xx;
1554 	struct cvmx_ipd_que0_free_page_cnt_s cn58xxp1;
1555 	struct cvmx_ipd_que0_free_page_cnt_s cn61xx;
1556 	struct cvmx_ipd_que0_free_page_cnt_s cn63xx;
1557 	struct cvmx_ipd_que0_free_page_cnt_s cn63xxp1;
1558 	struct cvmx_ipd_que0_free_page_cnt_s cn66xx;
1559 	struct cvmx_ipd_que0_free_page_cnt_s cn68xx;
1560 	struct cvmx_ipd_que0_free_page_cnt_s cn68xxp1;
1561 	struct cvmx_ipd_que0_free_page_cnt_s cn70xx;
1562 	struct cvmx_ipd_que0_free_page_cnt_s cn70xxp1;
1563 	struct cvmx_ipd_que0_free_page_cnt_s cnf71xx;
1564 };
1565 
1566 typedef union cvmx_ipd_que0_free_page_cnt cvmx_ipd_que0_free_page_cnt_t;
1567 
1568 /**
1569  * cvmx_ipd_red_bpid_enable#
1570  *
1571  * IPD_RED_BPID_ENABLE = IPD RED BPID Enable
1572  *
1573  * Set the pass-drop marks for qos level.
1574  */
1575 union cvmx_ipd_red_bpid_enablex {
1576 	u64 u64;
1577 	struct cvmx_ipd_red_bpid_enablex_s {
1578 		u64 prt_enb : 64;
1579 	} s;
1580 	struct cvmx_ipd_red_bpid_enablex_s cn68xx;
1581 	struct cvmx_ipd_red_bpid_enablex_s cn68xxp1;
1582 };
1583 
1584 typedef union cvmx_ipd_red_bpid_enablex cvmx_ipd_red_bpid_enablex_t;
1585 
1586 /**
1587  * cvmx_ipd_red_delay
1588  *
1589  * IPD_RED_DELAY = IPD RED BPID Enable
1590  *
1591  * Set the pass-drop marks for qos level.
1592  */
1593 union cvmx_ipd_red_delay {
1594 	u64 u64;
1595 	struct cvmx_ipd_red_delay_s {
1596 		u64 reserved_28_63 : 36;
1597 		u64 prb_dly : 14;
1598 		u64 avg_dly : 14;
1599 	} s;
1600 	struct cvmx_ipd_red_delay_s cn68xx;
1601 	struct cvmx_ipd_red_delay_s cn68xxp1;
1602 };
1603 
1604 typedef union cvmx_ipd_red_delay cvmx_ipd_red_delay_t;
1605 
1606 /**
1607  * cvmx_ipd_red_port_enable
1608  *
1609  * Set the pass-drop marks for qos level.
1610  *
1611  */
1612 union cvmx_ipd_red_port_enable {
1613 	u64 u64;
1614 	struct cvmx_ipd_red_port_enable_s {
1615 		u64 prb_dly : 14;
1616 		u64 avg_dly : 14;
1617 		u64 prt_enb : 36;
1618 	} s;
1619 	struct cvmx_ipd_red_port_enable_s cn30xx;
1620 	struct cvmx_ipd_red_port_enable_s cn31xx;
1621 	struct cvmx_ipd_red_port_enable_s cn38xx;
1622 	struct cvmx_ipd_red_port_enable_s cn38xxp2;
1623 	struct cvmx_ipd_red_port_enable_s cn50xx;
1624 	struct cvmx_ipd_red_port_enable_s cn52xx;
1625 	struct cvmx_ipd_red_port_enable_s cn52xxp1;
1626 	struct cvmx_ipd_red_port_enable_s cn56xx;
1627 	struct cvmx_ipd_red_port_enable_s cn56xxp1;
1628 	struct cvmx_ipd_red_port_enable_s cn58xx;
1629 	struct cvmx_ipd_red_port_enable_s cn58xxp1;
1630 	struct cvmx_ipd_red_port_enable_s cn61xx;
1631 	struct cvmx_ipd_red_port_enable_s cn63xx;
1632 	struct cvmx_ipd_red_port_enable_s cn63xxp1;
1633 	struct cvmx_ipd_red_port_enable_s cn66xx;
1634 	struct cvmx_ipd_red_port_enable_s cn70xx;
1635 	struct cvmx_ipd_red_port_enable_s cn70xxp1;
1636 	struct cvmx_ipd_red_port_enable_s cnf71xx;
1637 };
1638 
1639 typedef union cvmx_ipd_red_port_enable cvmx_ipd_red_port_enable_t;
1640 
1641 /**
1642  * cvmx_ipd_red_port_enable2
1643  *
1644  * Set the pass-drop marks for qos level.
1645  *
1646  */
1647 union cvmx_ipd_red_port_enable2 {
1648 	u64 u64;
1649 	struct cvmx_ipd_red_port_enable2_s {
1650 		u64 reserved_12_63 : 52;
1651 		u64 prt_enb : 12;
1652 	} s;
1653 	struct cvmx_ipd_red_port_enable2_cn52xx {
1654 		u64 reserved_4_63 : 60;
1655 		u64 prt_enb : 4;
1656 	} cn52xx;
1657 	struct cvmx_ipd_red_port_enable2_cn52xx cn52xxp1;
1658 	struct cvmx_ipd_red_port_enable2_cn52xx cn56xx;
1659 	struct cvmx_ipd_red_port_enable2_cn52xx cn56xxp1;
1660 	struct cvmx_ipd_red_port_enable2_s cn61xx;
1661 	struct cvmx_ipd_red_port_enable2_cn63xx {
1662 		u64 reserved_8_63 : 56;
1663 		u64 prt_enb : 8;
1664 	} cn63xx;
1665 	struct cvmx_ipd_red_port_enable2_cn63xx cn63xxp1;
1666 	struct cvmx_ipd_red_port_enable2_s cn66xx;
1667 	struct cvmx_ipd_red_port_enable2_s cn70xx;
1668 	struct cvmx_ipd_red_port_enable2_s cn70xxp1;
1669 	struct cvmx_ipd_red_port_enable2_s cnf71xx;
1670 };
1671 
1672 typedef union cvmx_ipd_red_port_enable2 cvmx_ipd_red_port_enable2_t;
1673 
1674 /**
1675  * cvmx_ipd_red_que#_param
1676  *
1677  * Value control the Passing and Dropping of packets by the red engine for QOS Level-0.
1678  *
1679  */
1680 union cvmx_ipd_red_quex_param {
1681 	u64 u64;
1682 	struct cvmx_ipd_red_quex_param_s {
1683 		u64 reserved_49_63 : 15;
1684 		u64 use_pcnt : 1;
1685 		u64 new_con : 8;
1686 		u64 avg_con : 8;
1687 		u64 prb_con : 32;
1688 	} s;
1689 	struct cvmx_ipd_red_quex_param_s cn30xx;
1690 	struct cvmx_ipd_red_quex_param_s cn31xx;
1691 	struct cvmx_ipd_red_quex_param_s cn38xx;
1692 	struct cvmx_ipd_red_quex_param_s cn38xxp2;
1693 	struct cvmx_ipd_red_quex_param_s cn50xx;
1694 	struct cvmx_ipd_red_quex_param_s cn52xx;
1695 	struct cvmx_ipd_red_quex_param_s cn52xxp1;
1696 	struct cvmx_ipd_red_quex_param_s cn56xx;
1697 	struct cvmx_ipd_red_quex_param_s cn56xxp1;
1698 	struct cvmx_ipd_red_quex_param_s cn58xx;
1699 	struct cvmx_ipd_red_quex_param_s cn58xxp1;
1700 	struct cvmx_ipd_red_quex_param_s cn61xx;
1701 	struct cvmx_ipd_red_quex_param_s cn63xx;
1702 	struct cvmx_ipd_red_quex_param_s cn63xxp1;
1703 	struct cvmx_ipd_red_quex_param_s cn66xx;
1704 	struct cvmx_ipd_red_quex_param_s cn68xx;
1705 	struct cvmx_ipd_red_quex_param_s cn68xxp1;
1706 	struct cvmx_ipd_red_quex_param_s cn70xx;
1707 	struct cvmx_ipd_red_quex_param_s cn70xxp1;
1708 	struct cvmx_ipd_red_quex_param_s cnf71xx;
1709 };
1710 
1711 typedef union cvmx_ipd_red_quex_param cvmx_ipd_red_quex_param_t;
1712 
1713 /**
1714  * cvmx_ipd_req_wgt
1715  *
1716  * IPD_REQ_WGT = IPD REQ weights
1717  *
1718  * There are 8 devices that can request to send packet traffic to the IPD. These weights are used for the Weighted Round Robin
1719  * grant generated by the IPD to requestors.
1720  */
1721 union cvmx_ipd_req_wgt {
1722 	u64 u64;
1723 	struct cvmx_ipd_req_wgt_s {
1724 		u64 wgt7 : 8;
1725 		u64 wgt6 : 8;
1726 		u64 wgt5 : 8;
1727 		u64 wgt4 : 8;
1728 		u64 wgt3 : 8;
1729 		u64 wgt2 : 8;
1730 		u64 wgt1 : 8;
1731 		u64 wgt0 : 8;
1732 	} s;
1733 	struct cvmx_ipd_req_wgt_s cn68xx;
1734 };
1735 
1736 typedef union cvmx_ipd_req_wgt cvmx_ipd_req_wgt_t;
1737 
1738 /**
1739  * cvmx_ipd_sub_port_bp_page_cnt
1740  *
1741  * Will add the value to the indicated port count register, the number of pages supplied. The
1742  * value added should
1743  * be the 2's complement of the value that needs to be subtracted. Users add 2's complement
1744  * values to the
1745  * port-mbuf-count register to return (lower the count) mbufs to the counter in order to avoid
1746  * port-level
1747  * backpressure being applied to the port. Backpressure is applied when the MBUF used count of a
1748  * port exceeds the
1749  * value in the IPD_PORTX_BP_PAGE_CNT, IPD_PORTX_BP_PAGE_CNT2, and IPD_PORTX_BP_PAGE_CNT3.
1750  * This register can't be written from the PCI via a window write.
1751  */
1752 union cvmx_ipd_sub_port_bp_page_cnt {
1753 	u64 u64;
1754 	struct cvmx_ipd_sub_port_bp_page_cnt_s {
1755 		u64 reserved_31_63 : 33;
1756 		u64 port : 6;
1757 		u64 page_cnt : 25;
1758 	} s;
1759 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn30xx;
1760 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn31xx;
1761 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn38xx;
1762 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn38xxp2;
1763 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn50xx;
1764 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn52xx;
1765 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn52xxp1;
1766 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn56xx;
1767 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn56xxp1;
1768 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xx;
1769 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xxp1;
1770 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn61xx;
1771 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn63xx;
1772 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn63xxp1;
1773 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn66xx;
1774 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn68xx;
1775 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn68xxp1;
1776 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn70xx;
1777 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn70xxp1;
1778 	struct cvmx_ipd_sub_port_bp_page_cnt_s cnf71xx;
1779 };
1780 
1781 typedef union cvmx_ipd_sub_port_bp_page_cnt cvmx_ipd_sub_port_bp_page_cnt_t;
1782 
1783 /**
1784  * cvmx_ipd_sub_port_fcs
1785  *
1786  * When set '1' the port corresponding to the bit set will subtract 4 bytes from the end of
1787  * the packet.
1788  */
1789 union cvmx_ipd_sub_port_fcs {
1790 	u64 u64;
1791 	struct cvmx_ipd_sub_port_fcs_s {
1792 		u64 reserved_40_63 : 24;
1793 		u64 port_bit2 : 4;
1794 		u64 reserved_32_35 : 4;
1795 		u64 port_bit : 32;
1796 	} s;
1797 	struct cvmx_ipd_sub_port_fcs_cn30xx {
1798 		u64 reserved_3_63 : 61;
1799 		u64 port_bit : 3;
1800 	} cn30xx;
1801 	struct cvmx_ipd_sub_port_fcs_cn30xx cn31xx;
1802 	struct cvmx_ipd_sub_port_fcs_cn38xx {
1803 		u64 reserved_32_63 : 32;
1804 		u64 port_bit : 32;
1805 	} cn38xx;
1806 	struct cvmx_ipd_sub_port_fcs_cn38xx cn38xxp2;
1807 	struct cvmx_ipd_sub_port_fcs_cn30xx cn50xx;
1808 	struct cvmx_ipd_sub_port_fcs_s cn52xx;
1809 	struct cvmx_ipd_sub_port_fcs_s cn52xxp1;
1810 	struct cvmx_ipd_sub_port_fcs_s cn56xx;
1811 	struct cvmx_ipd_sub_port_fcs_s cn56xxp1;
1812 	struct cvmx_ipd_sub_port_fcs_cn38xx cn58xx;
1813 	struct cvmx_ipd_sub_port_fcs_cn38xx cn58xxp1;
1814 	struct cvmx_ipd_sub_port_fcs_s cn61xx;
1815 	struct cvmx_ipd_sub_port_fcs_s cn63xx;
1816 	struct cvmx_ipd_sub_port_fcs_s cn63xxp1;
1817 	struct cvmx_ipd_sub_port_fcs_s cn66xx;
1818 	struct cvmx_ipd_sub_port_fcs_s cn70xx;
1819 	struct cvmx_ipd_sub_port_fcs_s cn70xxp1;
1820 	struct cvmx_ipd_sub_port_fcs_s cnf71xx;
1821 };
1822 
1823 typedef union cvmx_ipd_sub_port_fcs cvmx_ipd_sub_port_fcs_t;
1824 
1825 /**
1826  * cvmx_ipd_sub_port_qos_cnt
1827  *
1828  * Will add the value (CNT) to the indicated Port-QOS register (PORT_QOS). The value added must
1829  * be
1830  * be the 2's complement of the value that needs to be subtracted.
1831  */
1832 union cvmx_ipd_sub_port_qos_cnt {
1833 	u64 u64;
1834 	struct cvmx_ipd_sub_port_qos_cnt_s {
1835 		u64 reserved_41_63 : 23;
1836 		u64 port_qos : 9;
1837 		u64 cnt : 32;
1838 	} s;
1839 	struct cvmx_ipd_sub_port_qos_cnt_s cn52xx;
1840 	struct cvmx_ipd_sub_port_qos_cnt_s cn52xxp1;
1841 	struct cvmx_ipd_sub_port_qos_cnt_s cn56xx;
1842 	struct cvmx_ipd_sub_port_qos_cnt_s cn56xxp1;
1843 	struct cvmx_ipd_sub_port_qos_cnt_s cn61xx;
1844 	struct cvmx_ipd_sub_port_qos_cnt_s cn63xx;
1845 	struct cvmx_ipd_sub_port_qos_cnt_s cn63xxp1;
1846 	struct cvmx_ipd_sub_port_qos_cnt_s cn66xx;
1847 	struct cvmx_ipd_sub_port_qos_cnt_s cn68xx;
1848 	struct cvmx_ipd_sub_port_qos_cnt_s cn68xxp1;
1849 	struct cvmx_ipd_sub_port_qos_cnt_s cn70xx;
1850 	struct cvmx_ipd_sub_port_qos_cnt_s cn70xxp1;
1851 	struct cvmx_ipd_sub_port_qos_cnt_s cnf71xx;
1852 };
1853 
1854 typedef union cvmx_ipd_sub_port_qos_cnt cvmx_ipd_sub_port_qos_cnt_t;
1855 
1856 /**
1857  * cvmx_ipd_wqe_fpa_queue
1858  *
1859  * Which FPA Queue (0-7) to fetch page-pointers from for WQE's
1860  *
1861  */
1862 union cvmx_ipd_wqe_fpa_queue {
1863 	u64 u64;
1864 	struct cvmx_ipd_wqe_fpa_queue_s {
1865 		u64 reserved_3_63 : 61;
1866 		u64 wqe_pool : 3;
1867 	} s;
1868 	struct cvmx_ipd_wqe_fpa_queue_s cn30xx;
1869 	struct cvmx_ipd_wqe_fpa_queue_s cn31xx;
1870 	struct cvmx_ipd_wqe_fpa_queue_s cn38xx;
1871 	struct cvmx_ipd_wqe_fpa_queue_s cn38xxp2;
1872 	struct cvmx_ipd_wqe_fpa_queue_s cn50xx;
1873 	struct cvmx_ipd_wqe_fpa_queue_s cn52xx;
1874 	struct cvmx_ipd_wqe_fpa_queue_s cn52xxp1;
1875 	struct cvmx_ipd_wqe_fpa_queue_s cn56xx;
1876 	struct cvmx_ipd_wqe_fpa_queue_s cn56xxp1;
1877 	struct cvmx_ipd_wqe_fpa_queue_s cn58xx;
1878 	struct cvmx_ipd_wqe_fpa_queue_s cn58xxp1;
1879 	struct cvmx_ipd_wqe_fpa_queue_s cn61xx;
1880 	struct cvmx_ipd_wqe_fpa_queue_s cn63xx;
1881 	struct cvmx_ipd_wqe_fpa_queue_s cn63xxp1;
1882 	struct cvmx_ipd_wqe_fpa_queue_s cn66xx;
1883 	struct cvmx_ipd_wqe_fpa_queue_s cn68xx;
1884 	struct cvmx_ipd_wqe_fpa_queue_s cn68xxp1;
1885 	struct cvmx_ipd_wqe_fpa_queue_s cn70xx;
1886 	struct cvmx_ipd_wqe_fpa_queue_s cn70xxp1;
1887 	struct cvmx_ipd_wqe_fpa_queue_s cnf71xx;
1888 };
1889 
1890 typedef union cvmx_ipd_wqe_fpa_queue cvmx_ipd_wqe_fpa_queue_t;
1891 
1892 /**
1893  * cvmx_ipd_wqe_ptr_valid
1894  *
1895  * The value of the WQE-pointer fetched and in the valid register.
1896  *
1897  */
1898 union cvmx_ipd_wqe_ptr_valid {
1899 	u64 u64;
1900 	struct cvmx_ipd_wqe_ptr_valid_s {
1901 		u64 reserved_29_63 : 35;
1902 		u64 ptr : 29;
1903 	} s;
1904 	struct cvmx_ipd_wqe_ptr_valid_s cn30xx;
1905 	struct cvmx_ipd_wqe_ptr_valid_s cn31xx;
1906 	struct cvmx_ipd_wqe_ptr_valid_s cn38xx;
1907 	struct cvmx_ipd_wqe_ptr_valid_s cn50xx;
1908 	struct cvmx_ipd_wqe_ptr_valid_s cn52xx;
1909 	struct cvmx_ipd_wqe_ptr_valid_s cn52xxp1;
1910 	struct cvmx_ipd_wqe_ptr_valid_s cn56xx;
1911 	struct cvmx_ipd_wqe_ptr_valid_s cn56xxp1;
1912 	struct cvmx_ipd_wqe_ptr_valid_s cn58xx;
1913 	struct cvmx_ipd_wqe_ptr_valid_s cn58xxp1;
1914 	struct cvmx_ipd_wqe_ptr_valid_s cn61xx;
1915 	struct cvmx_ipd_wqe_ptr_valid_s cn63xx;
1916 	struct cvmx_ipd_wqe_ptr_valid_s cn63xxp1;
1917 	struct cvmx_ipd_wqe_ptr_valid_s cn66xx;
1918 	struct cvmx_ipd_wqe_ptr_valid_s cn70xx;
1919 	struct cvmx_ipd_wqe_ptr_valid_s cn70xxp1;
1920 	struct cvmx_ipd_wqe_ptr_valid_s cnf71xx;
1921 };
1922 
1923 typedef union cvmx_ipd_wqe_ptr_valid cvmx_ipd_wqe_ptr_valid_t;
1924 
1925 #endif
1926