1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2019 Intel Corporation <www.intel.com> 4 */ 5 6 #ifndef __CACHE_H 7 #define __CACHE_H 8 9 struct udevice; 10 11 /* 12 * Structure for the cache controller 13 */ 14 struct cache_info { 15 phys_addr_t base; /* Base physical address of cache device. */ 16 }; 17 18 struct cache_ops { 19 /** 20 * get_info() - Get basic cache info 21 * 22 * @dev: Device to check (UCLASS_CACHE) 23 * @info: Place to put info 24 * @return 0 if OK, -ve on error 25 */ 26 int (*get_info)(struct udevice *dev, struct cache_info *info); 27 28 /** 29 * enable() - Enable cache 30 * 31 * @dev: Device to check (UCLASS_CACHE) 32 * @return 0 if OK, -ve on error 33 */ 34 int (*enable)(struct udevice *dev); 35 36 /** 37 * disable() - Flush and disable cache 38 * 39 * @dev: Device to check (UCLASS_CACHE) 40 * @return 0 if OK, -ve on error 41 */ 42 int (*disable)(struct udevice *dev); 43 }; 44 45 #define cache_get_ops(dev) ((struct cache_ops *)(dev)->driver->ops) 46 47 /** 48 * cache_get_info() - Get information about a cache controller 49 * 50 * @dev: Device to check (UCLASS_CACHE) 51 * @info: Returns cache info 52 * @return 0 if OK, -ve on error 53 */ 54 int cache_get_info(struct udevice *dev, struct cache_info *info); 55 56 /** 57 * cache_enable() - Enable cache 58 * 59 * @dev: Device to check (UCLASS_CACHE) 60 * @return 0 if OK, -ve on error 61 */ 62 int cache_enable(struct udevice *dev); 63 64 /** 65 * cache_disable() - Flush and disable cache 66 * 67 * @dev: Device to check (UCLASS_CACHE) 68 * @return 0 if OK, -ve on error 69 */ 70 int cache_disable(struct udevice *dev); 71 #endif 72