1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2019 - 2020 Xilinx, Inc. 4 */ 5 6 #ifndef _DT_BINDINGS_VERSAL_POWER_H 7 #define _DT_BINDINGS_VERSAL_POWER_H 8 9 #define PM_DEV_USB_0 (0x18224018U) 10 #define PM_DEV_GEM_0 (0x18224019U) 11 #define PM_DEV_GEM_1 (0x1822401aU) 12 #define PM_DEV_SPI_0 (0x1822401bU) 13 #define PM_DEV_SPI_1 (0x1822401cU) 14 #define PM_DEV_I2C_0 (0x1822401dU) 15 #define PM_DEV_I2C_1 (0x1822401eU) 16 #define PM_DEV_CAN_FD_0 (0x1822401fU) 17 #define PM_DEV_CAN_FD_1 (0x18224020U) 18 #define PM_DEV_UART_0 (0x18224021U) 19 #define PM_DEV_UART_1 (0x18224022U) 20 #define PM_DEV_GPIO (0x18224023U) 21 #define PM_DEV_TTC_0 (0x18224024U) 22 #define PM_DEV_TTC_1 (0x18224025U) 23 #define PM_DEV_TTC_2 (0x18224026U) 24 #define PM_DEV_TTC_3 (0x18224027U) 25 #define PM_DEV_SWDT_FPD (0x18224029U) 26 #define PM_DEV_OSPI (0x1822402aU) 27 #define PM_DEV_QSPI (0x1822402bU) 28 #define PM_DEV_GPIO_PMC (0x1822402cU) 29 #define PM_DEV_SDIO_0 (0x1822402eU) 30 #define PM_DEV_SDIO_1 (0x1822402fU) 31 #define PM_DEV_RTC (0x18224034U) 32 #define PM_DEV_ADMA_0 (0x18224035U) 33 #define PM_DEV_ADMA_1 (0x18224036U) 34 #define PM_DEV_ADMA_2 (0x18224037U) 35 #define PM_DEV_ADMA_3 (0x18224038U) 36 #define PM_DEV_ADMA_4 (0x18224039U) 37 #define PM_DEV_ADMA_5 (0x1822403aU) 38 #define PM_DEV_ADMA_6 (0x1822403bU) 39 #define PM_DEV_ADMA_7 (0x1822403cU) 40 #define PM_DEV_AI (0x18224072U) 41 42 #endif 43