1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2002
4  * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
5  */
6 
7 #include <linux/types.h>	       /* for ulong typedef */
8 
9 #ifndef _FPGA_H_
10 #define _FPGA_H_
11 
12 #ifndef CONFIG_MAX_FPGA_DEVICES
13 #define CONFIG_MAX_FPGA_DEVICES		5
14 #endif
15 
16 /* fpga_xxxx function return value definitions */
17 #define FPGA_SUCCESS		0
18 #define FPGA_FAIL		1
19 
20 /* device numbers must be non-negative */
21 #define FPGA_INVALID_DEVICE	-1
22 
23 #define FPGA_ENC_USR_KEY	1
24 #define FPGA_NO_ENC_OR_NO_AUTH	2
25 
26 /* root data type defintions */
27 typedef enum {			/* typedef fpga_type */
28 	fpga_min_type,		/* range check value */
29 	fpga_xilinx,		/* Xilinx Family) */
30 	fpga_altera,		/* unimplemented */
31 	fpga_lattice,		/* Lattice family */
32 	fpga_undefined		/* invalid range check value */
33 } fpga_type;			/* end, typedef fpga_type */
34 
35 typedef struct {		/* typedef fpga_desc */
36 	fpga_type devtype;	/* switch value to select sub-functions */
37 	void *devdesc;		/* real device descriptor */
38 } fpga_desc;			/* end, typedef fpga_desc */
39 
40 typedef struct {                /* typedef fpga_desc */
41 	unsigned int blocksize;
42 	char *interface;
43 	char *dev_part;
44 	const char *filename;
45 	int fstype;
46 } fpga_fs_info;
47 
48 struct fpga_secure_info {
49 	u8 *userkey_addr;
50 	u8 authflag;
51 	u8 encflag;
52 };
53 
54 typedef enum {
55 	BIT_FULL = 0,
56 	BIT_PARTIAL,
57 	BIT_NONE = 0xFF,
58 } bitstream_type;
59 
60 /* root function definitions */
61 void fpga_init(void);
62 int fpga_add(fpga_type devtype, void *desc);
63 int fpga_count(void);
64 const fpga_desc *const fpga_get_desc(int devnum);
65 int fpga_is_partial_data(int devnum, size_t img_len);
66 int fpga_load(int devnum, const void *buf, size_t bsize,
67 	      bitstream_type bstype);
68 int fpga_fsload(int devnum, const void *buf, size_t size,
69 		fpga_fs_info *fpga_fsinfo);
70 int fpga_loads(int devnum, const void *buf, size_t size,
71 	       struct fpga_secure_info *fpga_sec_info);
72 int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
73 		       bitstream_type bstype);
74 int fpga_dump(int devnum, const void *buf, size_t bsize);
75 int fpga_info(int devnum);
76 const fpga_desc *const fpga_validate(int devnum, const void *buf,
77 				     size_t bsize, char *fn);
78 
79 #endif	/* _FPGA_H_ */
80