1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2010
4 * Texas Instruments Incorporated, <www.ti.com>
5 * Steve Sakoman <steve@sakoman.com>
6 */
7 #include <common.h>
8 #include <init.h>
9 #include <log.h>
10 #include <net.h>
11 #include <serial.h>
12 #include <asm/global_data.h>
13 #include <asm/mach-types.h>
14 #include <asm/arch/sys_proto.h>
15 #include <asm/arch/mmc_host_def.h>
16 #include <asm/arch/clock.h>
17 #include <asm/arch/gpio.h>
18 #include <asm/gpio.h>
19 #include <env.h>
20 #include <twl6030.h>
21
22 #include "panda_mux_data.h"
23
24 #define PANDA_ULPI_PHY_TYPE_GPIO 182
25 #define PANDA_BOARD_ID_1_GPIO 101
26 #define PANDA_ES_BOARD_ID_1_GPIO 48
27 #define PANDA_BOARD_ID_2_GPIO 171
28 #define PANDA_ES_BOARD_ID_3_GPIO 3
29 #define PANDA_ES_BOARD_ID_4_GPIO 2
30
31 DECLARE_GLOBAL_DATA_PTR;
32
33 const struct omap_sysinfo sysinfo = {
34 "Board: OMAP4 Panda\n"
35 };
36
37 struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000;
38
39 /**
40 * @brief board_init
41 *
42 * @return 0
43 */
board_init(void)44 int board_init(void)
45 {
46 gpmc_init();
47
48 gd->bd->bi_arch_number = MACH_TYPE_OMAP4_PANDA;
49 gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
50
51 return 0;
52 }
53
54 #if defined(CONFIG_SPL_OS_BOOT)
spl_start_uboot(void)55 int spl_start_uboot(void)
56 {
57 /* break into full u-boot on 'c' */
58 if (serial_tstc() && serial_getc() == 'c')
59 return 1;
60
61 return 0;
62 }
63 #endif /* CONFIG_SPL_OS_BOOT */
64
board_eth_init(struct bd_info * bis)65 int board_eth_init(struct bd_info *bis)
66 {
67 return 0;
68 }
69
70 /*
71 * Routine: get_board_revision
72 * Description: Detect if we are running on a panda revision A1-A6,
73 * or an ES panda board. This can be done by reading
74 * the level of GPIOs and checking the processor revisions.
75 * This should result in:
76 * Panda 4430:
77 * GPIO171, GPIO101, GPIO182: 0 1 1 => A1-A5
78 * GPIO171, GPIO101, GPIO182: 1 0 1 => A6
79 * Panda ES:
80 * GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 0 1 1 => B1/B2
81 * GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 1 1 1 => B3
82 */
get_board_revision(void)83 int get_board_revision(void)
84 {
85 int board_id0, board_id1, board_id2;
86 int board_id3, board_id4;
87 int board_id;
88
89 int processor_rev = omap_revision();
90
91 /* Setup the mux for the common board ID pins (gpio 171 and 182) */
92 writew((IEN | M3), (*ctrl)->control_padconf_core_base + UNIPRO_TX0);
93 writew((IEN | M3), (*ctrl)->control_padconf_core_base + FREF_CLK2_OUT);
94
95 board_id0 = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO);
96 board_id2 = gpio_get_value(PANDA_BOARD_ID_2_GPIO);
97
98 if ((processor_rev >= OMAP4460_ES1_0 &&
99 processor_rev <= OMAP4460_ES1_1)) {
100 /*
101 * Setup the mux for the ES specific board ID pins (gpio 101,
102 * 2 and 3.
103 */
104 writew((IEN | M3), (*ctrl)->control_padconf_core_base +
105 GPMC_A24);
106 writew((IEN | M3), (*ctrl)->control_padconf_core_base +
107 UNIPRO_RY0);
108 writew((IEN | M3), (*ctrl)->control_padconf_core_base +
109 UNIPRO_RX1);
110
111 board_id1 = gpio_get_value(PANDA_ES_BOARD_ID_1_GPIO);
112 board_id3 = gpio_get_value(PANDA_ES_BOARD_ID_3_GPIO);
113 board_id4 = gpio_get_value(PANDA_ES_BOARD_ID_4_GPIO);
114
115 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
116 env_set("board_name", "panda-es");
117 #endif
118 board_id = ((board_id4 << 4) | (board_id3 << 3) |
119 (board_id2 << 2) | (board_id1 << 1) | (board_id0));
120 } else {
121 /* Setup the mux for the Ax specific board ID pins (gpio 101) */
122 writew((IEN | M3), (*ctrl)->control_padconf_core_base +
123 FREF_CLK2_OUT);
124
125 board_id1 = gpio_get_value(PANDA_BOARD_ID_1_GPIO);
126 board_id = ((board_id2 << 2) | (board_id1 << 1) | (board_id0));
127
128 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
129 if ((board_id >= 0x3) && (processor_rev == OMAP4430_ES2_3))
130 env_set("board_name", "panda-a4");
131 #endif
132 }
133
134 return board_id;
135 }
136
137 /**
138 * is_panda_es_rev_b3() - Detect if we are running on rev B3 of panda board ES
139 *
140 *
141 * Detect if we are running on B3 version of ES panda board,
142 * This can be done by reading the level of GPIO 171 and checking the
143 * processor revisions.
144 * GPIO171: 1 => Panda ES Rev B3
145 *
146 * Return : return 1 if Panda ES Rev B3 , else return 0
147 */
is_panda_es_rev_b3(void)148 u8 is_panda_es_rev_b3(void)
149 {
150 int processor_rev = omap_revision();
151 int ret = 0;
152
153 if ((processor_rev >= OMAP4460_ES1_0 &&
154 processor_rev <= OMAP4460_ES1_1)) {
155
156 /* Setup the mux for the common board ID pins (gpio 171) */
157 writew((IEN | M3),
158 (*ctrl)->control_padconf_core_base + UNIPRO_TX0);
159
160 /* if processor_rev is panda ES and GPIO171 is 1,it is rev b3 */
161 ret = gpio_get_value(PANDA_BOARD_ID_2_GPIO);
162 }
163 return ret;
164 }
165
166 #ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
167 /*
168 * emif_get_reg_dump() - emif_get_reg_dump strong function
169 *
170 * @emif_nr - emif base
171 * @regs - reg dump of timing values
172 *
173 * Strong function to override emif_get_reg_dump weak function in sdram_elpida.c
174 */
emif_get_reg_dump(u32 emif_nr,const struct emif_regs ** regs)175 void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
176 {
177 u32 omap4_rev = omap_revision();
178
179 /* Same devices and geometry on both EMIFs */
180 if (omap4_rev == OMAP4430_ES1_0)
181 *regs = &emif_regs_elpida_380_mhz_1cs;
182 else if (omap4_rev == OMAP4430_ES2_0)
183 *regs = &emif_regs_elpida_200_mhz_2cs;
184 else if (omap4_rev == OMAP4430_ES2_3)
185 *regs = &emif_regs_elpida_400_mhz_1cs;
186 else if (omap4_rev < OMAP4470_ES1_0) {
187 if(is_panda_es_rev_b3())
188 *regs = &emif_regs_elpida_400_mhz_1cs;
189 else
190 *regs = &emif_regs_elpida_400_mhz_2cs;
191 }
192 else
193 *regs = &emif_regs_elpida_400_mhz_1cs;
194 }
195
emif_get_dmm_regs(const struct dmm_lisa_map_regs ** dmm_lisa_regs)196 void emif_get_dmm_regs(const struct dmm_lisa_map_regs
197 **dmm_lisa_regs)
198 {
199 u32 omap_rev = omap_revision();
200
201 if (omap_rev == OMAP4430_ES1_0)
202 *dmm_lisa_regs = &lisa_map_2G_x_1_x_2;
203 else if (omap_rev == OMAP4430_ES2_3)
204 *dmm_lisa_regs = &lisa_map_2G_x_2_x_2;
205 else if (omap_rev < OMAP4460_ES1_0)
206 *dmm_lisa_regs = &lisa_map_2G_x_2_x_2;
207 else
208 *dmm_lisa_regs = &ma_lisa_map_2G_x_2_x_2;
209 }
210
211 #endif
212
213 /**
214 * @brief misc_init_r - Configure Panda board specific configurations
215 * such as power configurations, ethernet initialization as phase2 of
216 * boot sequence
217 *
218 * @return 0
219 */
misc_init_r(void)220 int misc_init_r(void)
221 {
222 int phy_type;
223 u32 auxclk, altclksrc;
224
225 /* EHCI is not supported on ES1.0 */
226 if (omap_revision() == OMAP4430_ES1_0)
227 return 0;
228
229 get_board_revision();
230
231 gpio_direction_input(PANDA_ULPI_PHY_TYPE_GPIO);
232 phy_type = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO);
233
234 if (phy_type == 1) {
235 /* ULPI PHY supplied by auxclk3 derived from sys_clk */
236 debug("ULPI PHY supplied by auxclk3\n");
237
238 auxclk = readl(&scrm->auxclk3);
239 /* Select sys_clk */
240 auxclk &= ~AUXCLK_SRCSELECT_MASK;
241 auxclk |= AUXCLK_SRCSELECT_SYS_CLK << AUXCLK_SRCSELECT_SHIFT;
242 /* Set the divisor to 2 */
243 auxclk &= ~AUXCLK_CLKDIV_MASK;
244 auxclk |= AUXCLK_CLKDIV_2 << AUXCLK_CLKDIV_SHIFT;
245 /* Request auxilary clock #3 */
246 auxclk |= AUXCLK_ENABLE_MASK;
247
248 writel(auxclk, &scrm->auxclk3);
249 } else {
250 /* ULPI PHY supplied by auxclk1 derived from PER dpll */
251 debug("ULPI PHY supplied by auxclk1\n");
252
253 auxclk = readl(&scrm->auxclk1);
254 /* Select per DPLL */
255 auxclk &= ~AUXCLK_SRCSELECT_MASK;
256 auxclk |= AUXCLK_SRCSELECT_PER_DPLL << AUXCLK_SRCSELECT_SHIFT;
257 /* Set the divisor to 16 */
258 auxclk &= ~AUXCLK_CLKDIV_MASK;
259 auxclk |= AUXCLK_CLKDIV_16 << AUXCLK_CLKDIV_SHIFT;
260 /* Request auxilary clock #3 */
261 auxclk |= AUXCLK_ENABLE_MASK;
262
263 writel(auxclk, &scrm->auxclk1);
264 }
265
266 altclksrc = readl(&scrm->altclksrc);
267
268 /* Activate alternate system clock supplier */
269 altclksrc &= ~ALTCLKSRC_MODE_MASK;
270 altclksrc |= ALTCLKSRC_MODE_ACTIVE;
271
272 /* enable clocks */
273 altclksrc |= ALTCLKSRC_ENABLE_INT_MASK | ALTCLKSRC_ENABLE_EXT_MASK;
274
275 writel(altclksrc, &scrm->altclksrc);
276
277 omap_die_id_usbethaddr();
278
279 return 0;
280 }
281
set_muxconf_regs(void)282 void set_muxconf_regs(void)
283 {
284 do_set_mux((*ctrl)->control_padconf_core_base,
285 core_padconf_array_essential,
286 sizeof(core_padconf_array_essential) /
287 sizeof(struct pad_conf_entry));
288
289 do_set_mux((*ctrl)->control_padconf_wkup_base,
290 wkup_padconf_array_essential,
291 sizeof(wkup_padconf_array_essential) /
292 sizeof(struct pad_conf_entry));
293
294 if (omap_revision() >= OMAP4460_ES1_0)
295 do_set_mux((*ctrl)->control_padconf_wkup_base,
296 wkup_padconf_array_essential_4460,
297 sizeof(wkup_padconf_array_essential_4460) /
298 sizeof(struct pad_conf_entry));
299 }
300
301 #if defined(CONFIG_MMC)
board_mmc_init(struct bd_info * bis)302 int board_mmc_init(struct bd_info *bis)
303 {
304 return omap_mmc_init(0, 0, 0, -1, -1);
305 }
306
307 #if !defined(CONFIG_SPL_BUILD)
board_mmc_power_init(void)308 void board_mmc_power_init(void)
309 {
310 twl6030_power_mmc_init(0);
311 }
312 #endif
313 #endif
314
315 /*
316 * get_board_rev() - get board revision
317 */
get_board_rev(void)318 u32 get_board_rev(void)
319 {
320 return 0x20;
321 }
322