1 /* SPDX-License-Identifier: GPL-2.0+
2  *
3  * Copyright (C) 2016  Nexell Co., Ltd.
4  *
5  * Author: junghyun, kim <jhkim@nexell.co.kr>
6  */
7 
8 #ifndef _S5PXX18_SOC_MLC_H_
9 #define _S5PXX18_SOC_MLC_H_
10 
11 #include "s5pxx18_soc_disptype.h"
12 
13 #define NUMBER_OF_MLC_MODULE 2
14 #define PHY_BASEADDR_MLC0	0xC0102000
15 #define PHY_BASEADDR_MLC1	0xC0102400
16 
17 #define	PHY_BASEADDR_MLC_LIST	\
18 		{ PHY_BASEADDR_MLC0, PHY_BASEADDR_MLC1 }
19 
20 struct nx_mlc_register_set {
21 	u32 mlccontrolt;
22 	u32 mlcscreensize;
23 	u32 mlcbgcolor;
24 	struct {
25 		u32 mlcleftright;
26 		u32 mlctopbottom;
27 		u32 mlcinvalidleftright0;
28 		u32 mlcinvalidtopbottom0;
29 		u32 mlcinvalidleftright1;
30 		u32 mlcinvalidtopbottom1;
31 		u32 mlccontrol;
32 		s32 mlchstride;
33 		s32 mlcvstride;
34 		u32 mlctpcolor;
35 		u32 mlcinvcolor;
36 		u32 mlcaddress;
37 		u32 __reserved0;
38 	} mlcrgblayer[2];
39 	struct {
40 		u32 mlcleftright;
41 		u32 mlctopbottom;
42 		u32 mlccontrol;
43 		u32 mlcvstride;
44 		u32 mlctpcolor;
45 
46 		u32 mlcinvcolor;
47 		u32 mlcaddress;
48 		u32 mlcaddresscb;
49 		u32 mlcaddresscr;
50 		s32 mlcvstridecb;
51 		s32 mlcvstridecr;
52 		u32 mlchscale;
53 		u32 mlcvscale;
54 		u32 mlcluenh;
55 		u32 mlcchenh[4];
56 	} mlcvideolayer;
57 	struct {
58 		u32 mlcleftright;
59 		u32 mlctopbottom;
60 		u32 mlcinvalidleftright0;
61 		u32 mlcinvalidtopbottom0;
62 		u32 mlcinvalidleftright1;
63 		u32 mlcinvalidtopbottom1;
64 		u32 mlccontrol;
65 		s32 mlchstride;
66 		s32 mlcvstride;
67 		u32 mlctpcolor;
68 		u32 mlcinvcolor;
69 		u32 mlcaddress;
70 	} mlcrgblayer2;
71 	u32 mlcpaletetable2;
72 	u32 mlcgammacont;
73 	u32 mlcrgammatablewrite;
74 	u32 mlcggammatablewrite;
75 	u32 mlcbgammatablewrite;
76 	u32 yuvlayergammatable_red;
77 	u32 yuvlayergammatable_green;
78 	u32 yuvlayergammatable_blue;
79 
80 	u32 dimctrl;
81 	u32 dimlut0;
82 	u32 dimlut1;
83 	u32 dimbusyflag;
84 	u32 dimprdarrr0;
85 	u32 dimprdarrr1;
86 	u32 dimram0rddata;
87 	u32 dimram1rddata;
88 	u32 __reserved2[(0x3c0 - 0x12c) / 4];
89 	u32 mlcclkenb;
90 };
91 
92 enum nx_mlc_priority {
93 	nx_mlc_priority_videofirst = 0ul,
94 	nx_mlc_priority_videosecond = 1ul,
95 	nx_mlc_priority_videothird = 2ul,
96 	nx_mlc_priority_videofourth = 3ul
97 };
98 
99 enum nx_mlc_rgbfmt {
100 	nx_mlc_rgbfmt_r5g6b5 = 0x44320000ul,
101 	nx_mlc_rgbfmt_b5g6r5 = 0xc4320000ul,
102 	nx_mlc_rgbfmt_x1r5g5b5 = 0x43420000ul,
103 	nx_mlc_rgbfmt_x1b5g5r5 = 0xc3420000ul,
104 	nx_mlc_rgbfmt_x4r4g4b4 = 0x42110000ul,
105 	nx_mlc_rgbfmt_x4b4g4r4 = 0xc2110000ul,
106 	nx_mlc_rgbfmt_x8r3g3b2 = 0x41200000ul,
107 	nx_mlc_rgbfmt_x8b3g3r2 = 0xc1200000ul,
108 	nx_mlc_rgbfmt_a1r5g5b5 = 0x33420000ul,
109 	nx_mlc_rgbfmt_a1b5g5r5 = 0xb3420000ul,
110 	nx_mlc_rgbfmt_a4r4g4b4 = 0x22110000ul,
111 	nx_mlc_rgbfmt_a4b4g4r4 = 0xa2110000ul,
112 	nx_mlc_rgbfmt_a8r3g3b2 = 0x11200000ul,
113 	nx_mlc_rgbfmt_a8b3g3r2 = 0x91200000ul,
114 	nx_mlc_rgbfmt_r8g8b8 = 0x46530000ul,
115 	nx_mlc_rgbfmt_b8g8r8 = 0xc6530000ul,
116 	nx_mlc_rgbfmt_x8r8g8b8 = 0x46530000ul,
117 	nx_mlc_rgbfmt_x8b8g8r8 = 0xc6530000ul,
118 	nx_mlc_rgbfmt_a8r8g8b8 = 0x06530000ul,
119 	nx_mlc_rgbfmt_a8b8g8r8 = 0x86530000ul
120 };
121 
122 enum nx_mlc_yuvfmt {
123 	nx_mlc_yuvfmt_420 = 0ul << 16,
124 	nx_mlc_yuvfmt_422 = 1ul << 16,
125 	nx_mlc_yuvfmt_444 = 3ul << 16,
126 	nx_mlc_yuvfmt_yuyv = 2ul << 16,
127 	nx_mlc_yuvfmt_422_cbcr = 4ul << 16,
128 	nx_mlc_yuvfmt_420_cbcr = 5ul << 16,
129 };
130 
131 #ifdef __arm
132 #pragma diag_default 66
133 #endif
134 
135 int nx_mlc_initialize(void);
136 u32 nx_mlc_get_number_of_module(void);
137 u32 nx_mlc_get_physical_address(u32 module_index);
138 u32 nx_mlc_get_size_of_register_set(void);
139 void nx_mlc_set_base_address(u32 module_index, void *base_address);
140 void *nx_mlc_get_base_address(u32 module_index);
141 int nx_mlc_open_module(u32 module_index);
142 int nx_mlc_close_module(u32 module_index);
143 int nx_mlc_check_busy(u32 module_index);
144 int nx_mlc_can_power_down(u32 module_index);
145 void nx_mlc_set_clock_pclk_mode(u32 module_index, enum nx_pclkmode mode);
146 enum nx_pclkmode nx_mlc_get_clock_pclk_mode(u32 module_index);
147 void nx_mlc_set_clock_bclk_mode(u32 module_index, enum nx_bclkmode mode);
148 enum nx_bclkmode nx_mlc_get_clock_bclk_mode(u32 module_index);
149 
150 void nx_mlc_set_top_power_mode(u32 module_index, int bpower);
151 int nx_mlc_get_top_power_mode(u32 module_index);
152 void nx_mlc_set_top_sleep_mode(u32 module_index, int bsleep);
153 int nx_mlc_get_top_sleep_mode(u32 module_index);
154 void nx_mlc_set_top_dirty_flag(u32 module_index);
155 int nx_mlc_get_top_dirty_flag(u32 module_index);
156 void nx_mlc_set_mlc_enable(u32 module_index, int benb);
157 int nx_mlc_get_mlc_enable(u32 module_index);
158 void nx_mlc_set_field_enable(u32 module_index, int benb);
159 int nx_mlc_get_field_enable(u32 module_index);
160 void nx_mlc_set_layer_priority(u32 module_index,
161 			       enum nx_mlc_priority priority);
162 void nx_mlc_set_screen_size(u32 module_index, u32 width, u32 height);
163 void nx_mlc_get_screen_size(u32 module_index, u32 *pwidth,
164 			    u32 *pheight);
165 void nx_mlc_set_background(u32 module_index, u32 color);
166 
167 void nx_mlc_set_dirty_flag(u32 module_index, u32 layer);
168 int nx_mlc_get_dirty_flag(u32 module_index, u32 layer);
169 void nx_mlc_set_layer_enable(u32 module_index, u32 layer, int benb);
170 int nx_mlc_get_layer_enable(u32 module_index, u32 layer);
171 void nx_mlc_set_lock_size(u32 module_index, u32 layer, u32 locksize);
172 void nx_mlc_set_alpha_blending(u32 module_index, u32 layer, int benb,
173 			       u32 alpha);
174 void nx_mlc_set_transparency(u32 module_index, u32 layer, int benb,
175 			     u32 color);
176 void nx_mlc_set_color_inversion(u32 module_index, u32 layer, int benb,
177 				u32 color);
178 u32 nx_mlc_get_extended_color(u32 module_index, u32 color,
179 			      enum nx_mlc_rgbfmt format);
180 void nx_mlc_set_format_rgb(u32 module_index, u32 layer,
181 			   enum nx_mlc_rgbfmt format);
182 void nx_mlc_set_format_yuv(u32 module_index, enum nx_mlc_yuvfmt format);
183 void nx_mlc_set_position(u32 module_index, u32 layer, s32 sx,
184 			 s32 sy, s32 ex, s32 ey);
185 void nx_mlc_set_dither_enable_when_using_gamma(u32 module_index,
186 					       int benable);
187 int nx_mlc_get_dither_enable_when_using_gamma(u32 module_index);
188 void nx_mlc_set_gamma_priority(u32 module_index, int bvideolayer);
189 int nx_mlc_get_gamma_priority(u32 module_index);
190 
191 void nx_mlc_set_rgblayer_invalid_position(u32 module_index, u32 layer,
192 					  u32 region, s32 sx,
193 					  s32 sy, s32 ex,
194 					  s32 ey, int benb);
195 void nx_mlc_set_rgblayer_stride(u32 module_index, u32 layer,
196 				s32 hstride, s32 vstride);
197 void nx_mlc_set_rgblayer_address(u32 module_index, u32 layer, u32 addr);
198 void nx_mlc_set_rgblayer_gama_table_power_mode(u32 module_index,
199 					       int bred, int bgreen,
200 					       int bblue);
201 void nx_mlc_get_rgblayer_gama_table_power_mode(u32 module_index,
202 					       int *pbred, int *pbgreen,
203 					       int *pbblue);
204 void nx_mlc_set_rgblayer_gama_table_sleep_mode(u32 module_index,
205 					       int bred, int bgreen,
206 					       int bblue);
207 void nx_mlc_get_rgblayer_gama_table_sleep_mode(u32 module_index,
208 					       int *pbred, int *pbgreen,
209 					       int *pbblue);
210 void nx_mlc_set_rgblayer_rgamma_table(u32 module_index, u32 dwaddress,
211 				      u32 dwdata);
212 void nx_mlc_set_rgblayer_ggamma_table(u32 module_index, u32 dwaddress,
213 				      u32 dwdata);
214 void nx_mlc_set_rgblayer_bgamma_table(u32 module_index, u32 dwaddress,
215 				      u32 dwdata);
216 void nx_mlc_set_rgblayer_gamma_enable(u32 module_index, int benable);
217 int nx_mlc_get_rgblayer_gamma_enable(u32 module_index);
218 
219 void nx_mlc_set_video_layer_stride(u32 module_index, s32 lu_stride,
220 				   s32 cb_stride, s32 cr_stride);
221 void nx_mlc_set_video_layer_address(u32 module_index, u32 lu_addr,
222 				    u32 cb_addr, u32 cr_addr);
223 void nx_mlc_set_video_layer_address_yuyv(u32 module_index, u32 addr,
224 					 s32 stride);
225 void nx_mlc_set_video_layer_scale_factor(u32 module_index, u32 hscale,
226 					 u32 vscale, int bhlumaenb,
227 					 int bhchromaenb, int bvlumaenb,
228 					 int bvchromaenb);
229 void nx_mlc_set_video_layer_scale_filter(u32 module_index, int bhlumaenb,
230 					 int bhchromaenb, int bvlumaenb,
231 					 int bvchromaenb);
232 void nx_mlc_get_video_layer_scale_filter(u32 module_index,
233 					 int *bhlumaenb,
234 					 int *bhchromaenb,
235 					 int *bvlumaenb,
236 					 int *bvchromaenb);
237 void nx_mlc_set_video_layer_scale(u32 module_index, u32 sw, u32 sh,
238 				  u32 dw, u32 dh, int bhlumaenb,
239 				  int bhchromaenb, int bvlumaenb,
240 				  int bvchromaenb);
241 void nx_mlc_set_video_layer_luma_enhance(u32 module_index, u32 contrast,
242 					 s32 brightness);
243 void nx_mlc_set_video_layer_chroma_enhance(u32 module_index,
244 					   u32 quadrant, s32 cb_a,
245 					   s32 cb_b, s32 cr_a,
246 					   s32 cr_b);
247 void nx_mlc_set_video_layer_line_buffer_power_mode(u32 module_index,
248 						   int benable);
249 int nx_mlc_get_video_layer_line_buffer_power_mode(u32 module_index);
250 void nx_mlc_set_video_layer_line_buffer_sleep_mode(u32 module_index,
251 						   int benable);
252 int nx_mlc_get_video_layer_line_buffer_sleep_mode(u32 module_index);
253 void nx_mlc_set_video_layer_gamma_enable(u32 module_index, int benable);
254 int nx_mlc_get_video_layer_gamma_enable(u32 module_index);
255 
256 void nx_mlc_set_gamma_table_poweroff(u32 module_index, int enb);
257 
258 enum mlc_rgbfmt {
259 	rgbfmt_r5g6b5 = 0,
260 	rgbfmt_x1r5g5b5 = 1,
261 	rgbfmt_x4r4g4b4 = 2,
262 	rgbfmt_x8r3g3b2 = 3,
263 	rgbfmt_x8l8 = 4,
264 	rgbfmt_l16 = 5,
265 	rgbfmt_a1r5g5b5 = 6,
266 	rgbfmt_a4r4g4b4 = 7,
267 	rgbfmt_a8r3g3b2 = 8,
268 	rgbfmt_a8l8 = 9,
269 	rgbfmt_r8g8b8 = 10,
270 	rgbfmt_x8r8g8b8 = 11,
271 	rgbfmt_a8r8g8b8 = 12,
272 	rgbfmt_g8r8_g8b8 = 13,
273 	rgbfmt_r8g8_b8g8 = 14,
274 	rgbfmt_b5g6r5 = 15,
275 	rgbfmt_x1b5g5r5 = 16,
276 	rgbfmt_x4b4g4r4 = 17,
277 	rgbfmt_x8b3g3r2 = 18,
278 	rgbfmt_a1b5g5r5 = 19,
279 	rgbfmt_a4b4g4r4 = 20,
280 	rgbfmt_a8b3g3r2 = 21,
281 	rgbfmt_b8g8r8 = 22,
282 	rgbfmt_x8b8g8r8 = 23,
283 	rgbfmt_a8b8g8r8 = 24,
284 	rgbfmt_g8b8_g8r8 = 25,
285 	rgbfmt_b8g8_r8g8 = 26,
286 	rgbfmt_pataletb = 27
287 };
288 
289 enum latyername {
290 	topmlc = 0,
291 	rgb0 = 1,
292 	rgb1 = 2,
293 	rgb2 = 3,
294 	video = 4
295 };
296 
297 enum srammode {
298 	poweroff = 0,
299 	sleepmode = 2,
300 	run = 3
301 };
302 
303 enum locksizesel {
304 	locksize_4 = 0,
305 	locksize_8 = 1,
306 	locksize_16 = 2
307 };
308 
309 enum g3daddrchangeallowed {
310 	prim = 0,
311 	secon = 1,
312 	primorsecon = 2,
313 	primandsecon = 3
314 };
315 
316 void nx_mlc_set_mlctop_control_parameter(u32 module_index,
317 					 int field_enable, int mlcenable,
318 					 u8 priority,
319 					 enum g3daddrchangeallowed
320 					 g3daddr_change_allowed);
321 void nx_mlc_set_rgb0layer_control_parameter(u32 module_index,
322 					    int layer_enable,
323 					    int grp3denable,
324 					    int tp_enable,
325 					    u32 transparency_color,
326 					    int inv_enable,
327 					    u32 inverse_color,
328 					    int blend_enable,
329 					    u8 alpha_value,
330 					    enum mlc_rgbfmt rbgformat,
331 					    enum locksizesel
332 					    lock_size_select);
333 
334 u32 nx_mlc_get_rgbformat(enum mlc_rgbfmt rbgformat);
335 void nx_mlc_set_rgb1layer_control_parameter(u32 module_index,
336 					    int layer_enable,
337 					    int grp3denable,
338 					    int tp_enable,
339 					    u32 transparency_color,
340 					    int inv_enable,
341 					    u32 inverse_color,
342 					    int blend_enable,
343 					    u8 alpha_value,
344 					    enum mlc_rgbfmt rbgformat,
345 					    enum locksizesel
346 					    lock_size_select);
347 
348 void nx_mlc_set_rgb2layer_control_parameter(u32 module_index,
349 					    int layer_enable,
350 					    int grp3denable,
351 					    int tp_enable,
352 					    u32 transparency_color,
353 					    int inv_enable,
354 					    u32 inverse_color,
355 					    int blend_enable,
356 					    u8 alpha_value,
357 					    enum mlc_rgbfmt rbgformat,
358 					    enum locksizesel
359 					    lock_size_select);
360 
361 void nx_mlc_set_video_layer_control_parameter(u32 module_index,
362 					      int layer_enable,
363 					      int tp_enable,
364 					      u32 transparency_color,
365 					      int inv_enable,
366 					      u32 inverse_color,
367 					      int blend_enable,
368 					      u8 alpha_value,
369 					      enum nx_mlc_yuvfmt
370 					      yuvformat);
371 
372 void nx_mlc_set_srammode(u32 module_index, enum latyername layer_name,
373 			 enum srammode sram_mode);
374 
375 void nx_mlc_set_layer_reg_finish(u32 module_index,
376 				 enum latyername layer_name);
377 
378 void nx_mlc_set_video_layer_coordinate(u32 module_index,
379 				       int vfilterenable,
380 				       int hfilterenable,
381 				       int vfilterenable_c,
382 				       int hfilterenable_c,
383 				       u16 video_layer_with,
384 				       u16 video_layer_height,
385 				       s16 left, s16 right,
386 				       s16 top, s16 bottom);
387 
388 void nx_mlc_set_video_layer_filter_scale(u32 module_index, u32 hscale,
389 					 u32 vscale);
390 void nx_mlcsetgammasrammode(u32 module_index, enum srammode sram_mode);
391 void nx_mlc_set_gamma_control_parameter(u32 module_index,
392 					int rgbgammaenb, int yuvgammaenb,
393 					int yuvalphaarray,
394 					int dither_enb);
395 
396 void nx_mlc_set_layer_alpha256(u32 module_index, u32 layer, u32 alpha);
397 int nx_mlc_is_under_flow(u32 module_index);
398 
399 struct nx_mlc_gamma_table_parameter {
400 	u32 r_table[256];
401 	u32 g_table[256];
402 	u32 b_table[256];
403 	u32 ditherenb;
404 	u32 alphaselect;
405 	u32 yuvgammaenb;
406 	u32 rgbgammaenb;
407 	u32 allgammaenb;
408 };
409 
410 void nx_mlc_set_gamma_table(u32 module_index, int enb,
411 			    struct nx_mlc_gamma_table_parameter *p_gammatable);
412 void nx_mlc_get_rgblayer_stride(u32 module_index, u32 layer,
413 				s32 *hstride, s32 *vstride);
414 void nx_mlc_get_rgblayer_address(u32 module_index, u32 layer,
415 				 u32 *phys_address);
416 void nx_mlc_get_position(u32 module_index, u32 layer, int *left,
417 			 int *top, int *right, int *bottom);
418 void nx_mlc_get_video_layer_address_yuyv(u32 module_index, u32 *address,
419 					 u32 *stride);
420 void nx_mlc_get_video_layer_address(u32 module_index, u32 *lu_address,
421 				    u32 *cb_address, u32 *cr_address);
422 void nx_mlc_get_video_layer_stride(u32 module_index, u32 *lu_stride,
423 				   u32 *cb_stride, u32 *cr_stride);
424 void nx_mlc_get_video_layer_stride(u32 module_index, u32 *lu_stride,
425 				   u32 *cb_stride, u32 *cr_stride);
426 void nx_mlc_get_video_position(u32 module_index, int *left, int *top,
427 			       int *right, int *bottom);
428 
429 #endif
430