1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Configuration settings for the SAMA5D3 Xplained board. 4 * 5 * Copyright (C) 2014 Atmel Corporation 6 * Bo Shen <voice.shen@atmel.com> 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include <linux/sizes.h> 13 #include "at91-sama5_common.h" 14 15 /* 16 * This needs to be defined for the OHCI code to work but it is defined as 17 * ATMEL_ID_UHPHS in the CPU specific header files. 18 */ 19 #define ATMEL_ID_UHP 32 20 21 /* 22 * Specify the clock enable bit in the PMC_SCER register. 23 */ 24 #define ATMEL_PMC_UHP (1 << 6) 25 26 /* SDRAM */ 27 #define CONFIG_SYS_SDRAM_BASE 0x20000000 28 #define CONFIG_SYS_SDRAM_SIZE 0x10000000 29 30 #ifdef CONFIG_SPL_BUILD 31 #define CONFIG_SYS_INIT_SP_ADDR 0x318000 32 #else 33 #define CONFIG_SYS_INIT_SP_ADDR \ 34 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) 35 #endif 36 37 /* NAND flash */ 38 #ifdef CONFIG_CMD_NAND 39 #define CONFIG_SYS_MAX_NAND_DEVICE 1 40 #define CONFIG_SYS_NAND_BASE 0x60000000 41 /* our ALE is AD21 */ 42 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 43 /* our CLE is AD22 */ 44 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 45 #define CONFIG_SYS_NAND_ONFI_DETECTION 46 #endif 47 48 /* USB */ 49 #ifdef CONFIG_CMD_USB 50 #define CONFIG_USB_ATMEL 51 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL 52 #define CONFIG_USB_OHCI_NEW 53 #define CONFIG_SYS_USB_OHCI_CPU_INIT 54 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00600000 55 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "SAMA5D3 Xplained" 56 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 57 #endif 58 59 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 60 61 /* SPL */ 62 #define CONFIG_SPL_MAX_SIZE 0x18000 63 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 64 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 65 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 66 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 67 68 /* size of u-boot.bin to load */ 69 #define CONFIG_SYS_MONITOR_LEN (2 * SZ_512K) 70 71 #ifdef CONFIG_SD_BOOT 72 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 73 #endif 74 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 75 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 76 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 77 #define CONFIG_SYS_NAND_PAGE_COUNT 64 78 #define CONFIG_SYS_NAND_OOBSIZE 64 79 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 80 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 81 82 #endif 83