1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2006
4 * Markus Klotzbuecher, mk@denx.de
5 *
6 * (C) Copyright 2019 NXP
7 * Chuanhua Han <chuanhua.han@nxp.com>
8 */
9
10 /*
11 * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
12 * Extremly Accurate DS3231 Real Time Clock (RTC).
13 *
14 * copied from ds1337.c
15 */
16
17 #include <common.h>
18 #include <command.h>
19 #include <dm.h>
20 #include <log.h>
21 #include <rtc.h>
22 #include <i2c.h>
23
24 /*
25 * RTC register addresses
26 */
27 #define RTC_SEC_REG_ADDR 0x0
28 #define RTC_MIN_REG_ADDR 0x1
29 #define RTC_HR_REG_ADDR 0x2
30 #define RTC_DAY_REG_ADDR 0x3
31 #define RTC_DATE_REG_ADDR 0x4
32 #define RTC_MON_REG_ADDR 0x5
33 #define RTC_YR_REG_ADDR 0x6
34 #define RTC_CTL_REG_ADDR 0x0e
35 #define RTC_STAT_REG_ADDR 0x0f
36
37
38 /*
39 * RTC control register bits
40 */
41 #define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */
42 #define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */
43 #define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */
44 #define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */
45 #define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */
46 #define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */
47
48 /*
49 * RTC status register bits
50 */
51 #define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */
52 #define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */
53 #define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */
54 #define RTC_STAT_BIT_BB32KHZ 0x40 /* Battery backed 32KHz Output */
55 #define RTC_STAT_BIT_EN32KHZ 0x8 /* Enable 32KHz Output */
56
57
58 #if !CONFIG_IS_ENABLED(DM_RTC)
59 static uchar rtc_read (uchar reg);
60 static void rtc_write (uchar reg, uchar val);
61
62
63 /*
64 * Get the current time from the RTC
65 */
rtc_get(struct rtc_time * tmp)66 int rtc_get (struct rtc_time *tmp)
67 {
68 int rel = 0;
69 uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
70
71 control = rtc_read (RTC_CTL_REG_ADDR);
72 status = rtc_read (RTC_STAT_REG_ADDR);
73 sec = rtc_read (RTC_SEC_REG_ADDR);
74 min = rtc_read (RTC_MIN_REG_ADDR);
75 hour = rtc_read (RTC_HR_REG_ADDR);
76 wday = rtc_read (RTC_DAY_REG_ADDR);
77 mday = rtc_read (RTC_DATE_REG_ADDR);
78 mon_cent = rtc_read (RTC_MON_REG_ADDR);
79 year = rtc_read (RTC_YR_REG_ADDR);
80
81 debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
82 "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
83 year, mon_cent, mday, wday, hour, min, sec, control, status);
84
85 if (status & RTC_STAT_BIT_OSF) {
86 printf ("### Warning: RTC oscillator has stopped\n");
87 /* clear the OSF flag */
88 rtc_write (RTC_STAT_REG_ADDR,
89 rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
90 rel = -1;
91 }
92
93 tmp->tm_sec = bcd2bin (sec & 0x7F);
94 tmp->tm_min = bcd2bin (min & 0x7F);
95 tmp->tm_hour = bcd2bin (hour & 0x3F);
96 tmp->tm_mday = bcd2bin (mday & 0x3F);
97 tmp->tm_mon = bcd2bin (mon_cent & 0x1F);
98 tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900);
99 tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
100 tmp->tm_yday = 0;
101 tmp->tm_isdst= 0;
102
103 debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
104 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
105 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
106
107 return rel;
108 }
109
110
111 /*
112 * Set the RTC
113 */
rtc_set(struct rtc_time * tmp)114 int rtc_set (struct rtc_time *tmp)
115 {
116 uchar century;
117
118 debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
119 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
120 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
121
122 rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
123
124 century = (tmp->tm_year >= 2000) ? 0x80 : 0;
125 rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century);
126
127 rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
128 rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
129 rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
130 rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
131 rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
132
133 return 0;
134 }
135
136
137 /*
138 * Reset the RTC. We also enable the oscillator output on the
139 * SQW/INTB* pin and program it for 32,768 Hz output. Note that
140 * according to the datasheet, turning on the square wave output
141 * increases the current drain on the backup battery from about
142 * 600 nA to 2uA.
143 */
rtc_reset(void)144 void rtc_reset (void)
145 {
146 rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
147 }
148
149 /*
150 * Enable 32KHz output
151 */
152 #ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT
rtc_enable_32khz_output(void)153 void rtc_enable_32khz_output(void)
154 {
155 rtc_write(RTC_STAT_REG_ADDR,
156 RTC_STAT_BIT_BB32KHZ | RTC_STAT_BIT_EN32KHZ);
157 }
158 #endif
159
160 /*
161 * Helper functions
162 */
163
164 static
rtc_read(uchar reg)165 uchar rtc_read (uchar reg)
166 {
167 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
168 }
169
170
rtc_write(uchar reg,uchar val)171 static void rtc_write (uchar reg, uchar val)
172 {
173 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
174 }
175 #else
ds3231_rtc_get(struct udevice * dev,struct rtc_time * tmp)176 static int ds3231_rtc_get(struct udevice *dev, struct rtc_time *tmp)
177 {
178 uchar sec, min, hour, mday, wday, mon_cent, year, status;
179
180 status = dm_i2c_reg_read(dev, RTC_STAT_REG_ADDR);
181 sec = dm_i2c_reg_read(dev, RTC_SEC_REG_ADDR);
182 min = dm_i2c_reg_read(dev, RTC_MIN_REG_ADDR);
183 hour = dm_i2c_reg_read(dev, RTC_HR_REG_ADDR);
184 wday = dm_i2c_reg_read(dev, RTC_DAY_REG_ADDR);
185 mday = dm_i2c_reg_read(dev, RTC_DATE_REG_ADDR);
186 mon_cent = dm_i2c_reg_read(dev, RTC_MON_REG_ADDR);
187 year = dm_i2c_reg_read(dev, RTC_YR_REG_ADDR);
188
189 if (status & RTC_STAT_BIT_OSF) {
190 printf("### Warning: RTC oscillator has stopped\n");
191 /* clear the OSF flag */
192 dm_i2c_reg_write(dev, RTC_STAT_REG_ADDR,
193 dm_i2c_reg_read(dev, RTC_STAT_REG_ADDR)
194 & ~RTC_STAT_BIT_OSF);
195 return -EINVAL;
196 }
197
198 tmp->tm_sec = bcd2bin(sec & 0x7F);
199 tmp->tm_min = bcd2bin(min & 0x7F);
200 tmp->tm_hour = bcd2bin(hour & 0x3F);
201 tmp->tm_mday = bcd2bin(mday & 0x3F);
202 tmp->tm_mon = bcd2bin(mon_cent & 0x1F);
203 tmp->tm_year = bcd2bin(year) + ((mon_cent & 0x80) ? 2000 : 1900);
204 tmp->tm_wday = bcd2bin((wday - 1) & 0x07);
205 tmp->tm_yday = 0;
206 tmp->tm_isdst = 0;
207
208 debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
209 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
210 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
211
212 return 0;
213 }
214
ds3231_rtc_set(struct udevice * dev,const struct rtc_time * tmp)215 static int ds3231_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
216 {
217 uchar century;
218
219 debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
220 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
221 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
222
223 dm_i2c_reg_write(dev, RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100));
224
225 century = (tmp->tm_year >= 2000) ? 0x80 : 0;
226 dm_i2c_reg_write(dev, RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon) | century);
227
228 dm_i2c_reg_write(dev, RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1));
229 dm_i2c_reg_write(dev, RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday));
230 dm_i2c_reg_write(dev, RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour));
231 dm_i2c_reg_write(dev, RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min));
232 dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec));
233
234 return 0;
235 }
236
ds3231_rtc_reset(struct udevice * dev)237 static int ds3231_rtc_reset(struct udevice *dev)
238 {
239 int ret;
240
241 ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR,
242 RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
243 if (ret < 0)
244 return ret;
245
246 return 0;
247 }
248
ds3231_probe(struct udevice * dev)249 static int ds3231_probe(struct udevice *dev)
250 {
251 i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS |
252 DM_I2C_CHIP_WR_ADDRESS);
253
254 return 0;
255 }
256
257 #ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT
rtc_enable_32khz_output(int busnum,int chip_addr)258 int rtc_enable_32khz_output(int busnum, int chip_addr)
259 {
260 int ret;
261 struct udevice *dev;
262
263 ret = i2c_get_chip_for_busnum(busnum, chip_addr, 1, &dev);
264 if (!ret) {
265 ret = dm_i2c_reg_write(dev, RTC_STAT_REG_ADDR,
266 RTC_STAT_BIT_BB32KHZ |
267 RTC_STAT_BIT_EN32KHZ);
268 }
269 return ret;
270 }
271 #endif
272
273 static const struct rtc_ops ds3231_rtc_ops = {
274 .get = ds3231_rtc_get,
275 .set = ds3231_rtc_set,
276 .reset = ds3231_rtc_reset,
277 };
278
279 static const struct udevice_id ds3231_rtc_ids[] = {
280 { .compatible = "dallas,ds3231" },
281 { .compatible = "dallas,ds3232" },
282 { }
283 };
284
285 U_BOOT_DRIVER(rtc_ds3231) = {
286 .name = "rtc-ds3231",
287 .id = UCLASS_RTC,
288 .probe = ds3231_probe,
289 .of_match = ds3231_rtc_ids,
290 .ops = &ds3231_rtc_ops,
291 };
292 #endif
293