1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC 4 * 5 * Copyright (C) 2013-2015 Renesas Electronics Corporation 6 * Copyright (C) 2013-2014 Renesas Solutions Corp. 7 * Copyright (C) 2014 Cogent Embedded Inc. 8 */ 9 10#include <dt-bindings/clock/r8a7791-cpg-mssr.h> 11#include <dt-bindings/interrupt-controller/arm-gic.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13#include <dt-bindings/power/r8a7791-sysc.h> 14 15/ { 16 compatible = "renesas,r8a7791"; 17 #address-cells = <2>; 18 #size-cells = <2>; 19 20 aliases { 21 i2c0 = &i2c0; 22 i2c1 = &i2c1; 23 i2c2 = &i2c2; 24 i2c3 = &i2c3; 25 i2c4 = &i2c4; 26 i2c5 = &i2c5; 27 i2c6 = &i2c6; 28 i2c7 = &i2c7; 29 i2c8 = &i2c8; 30 spi0 = &qspi; 31 spi1 = &msiof0; 32 spi2 = &msiof1; 33 spi3 = &msiof2; 34 vin0 = &vin0; 35 vin1 = &vin1; 36 vin2 = &vin2; 37 }; 38 39 /* 40 * The external audio clocks are configured as 0 Hz fixed frequency 41 * clocks by default. 42 * Boards that provide audio clocks should override them. 43 */ 44 audio_clk_a: audio_clk_a { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 audio_clk_b: audio_clk_b { 50 compatible = "fixed-clock"; 51 #clock-cells = <0>; 52 clock-frequency = <0>; 53 }; 54 audio_clk_c: audio_clk_c { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 58 }; 59 60 /* External CAN clock */ 61 can_clk: can { 62 compatible = "fixed-clock"; 63 #clock-cells = <0>; 64 /* This value must be overridden by the board. */ 65 clock-frequency = <0>; 66 }; 67 68 cpus { 69 #address-cells = <1>; 70 #size-cells = <0>; 71 enable-method = "renesas,apmu"; 72 73 cpu0: cpu@0 { 74 device_type = "cpu"; 75 compatible = "arm,cortex-a15"; 76 reg = <0>; 77 clock-frequency = <1500000000>; 78 clocks = <&cpg CPG_CORE R8A7791_CLK_Z>; 79 power-domains = <&sysc R8A7791_PD_CA15_CPU0>; 80 next-level-cache = <&L2_CA15>; 81 voltage-tolerance = <1>; /* 1% */ 82 clock-latency = <300000>; /* 300 us */ 83 84 /* kHz - uV - OPPs unknown yet */ 85 operating-points = <1500000 1000000>, 86 <1312500 1000000>, 87 <1125000 1000000>, 88 < 937500 1000000>, 89 < 750000 1000000>, 90 < 375000 1000000>; 91 }; 92 93 cpu1: cpu@1 { 94 device_type = "cpu"; 95 compatible = "arm,cortex-a15"; 96 reg = <1>; 97 clock-frequency = <1500000000>; 98 clocks = <&cpg CPG_CORE R8A7791_CLK_Z>; 99 power-domains = <&sysc R8A7791_PD_CA15_CPU1>; 100 next-level-cache = <&L2_CA15>; 101 voltage-tolerance = <1>; /* 1% */ 102 clock-latency = <300000>; /* 300 us */ 103 104 /* kHz - uV - OPPs unknown yet */ 105 operating-points = <1500000 1000000>, 106 <1312500 1000000>, 107 <1125000 1000000>, 108 < 937500 1000000>, 109 < 750000 1000000>, 110 < 375000 1000000>; 111 }; 112 113 L2_CA15: cache-controller-0 { 114 compatible = "cache"; 115 power-domains = <&sysc R8A7791_PD_CA15_SCU>; 116 cache-unified; 117 cache-level = <2>; 118 }; 119 }; 120 121 /* External root clock */ 122 extal_clk: extal { 123 compatible = "fixed-clock"; 124 #clock-cells = <0>; 125 /* This value must be overridden by the board. */ 126 clock-frequency = <0>; 127 }; 128 129 /* External PCIe clock - can be overridden by the board */ 130 pcie_bus_clk: pcie_bus { 131 compatible = "fixed-clock"; 132 #clock-cells = <0>; 133 clock-frequency = <0>; 134 }; 135 136 pmu { 137 compatible = "arm,cortex-a15-pmu"; 138 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 139 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 140 interrupt-affinity = <&cpu0>, <&cpu1>; 141 }; 142 143 /* External SCIF clock */ 144 scif_clk: scif { 145 compatible = "fixed-clock"; 146 #clock-cells = <0>; 147 /* This value must be overridden by the board. */ 148 clock-frequency = <0>; 149 }; 150 151 soc { 152 compatible = "simple-bus"; 153 interrupt-parent = <&gic>; 154 155 #address-cells = <2>; 156 #size-cells = <2>; 157 ranges; 158 159 rwdt: watchdog@e6020000 { 160 compatible = "renesas,r8a7791-wdt", 161 "renesas,rcar-gen2-wdt"; 162 reg = <0 0xe6020000 0 0x0c>; 163 clocks = <&cpg CPG_MOD 402>; 164 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 165 resets = <&cpg 402>; 166 status = "disabled"; 167 }; 168 169 gpio0: gpio@e6050000 { 170 compatible = "renesas,gpio-r8a7791", 171 "renesas,rcar-gen2-gpio"; 172 reg = <0 0xe6050000 0 0x50>; 173 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 174 #gpio-cells = <2>; 175 gpio-controller; 176 gpio-ranges = <&pfc 0 0 32>; 177 #interrupt-cells = <2>; 178 interrupt-controller; 179 clocks = <&cpg CPG_MOD 912>; 180 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 181 resets = <&cpg 912>; 182 }; 183 184 gpio1: gpio@e6051000 { 185 compatible = "renesas,gpio-r8a7791", 186 "renesas,rcar-gen2-gpio"; 187 reg = <0 0xe6051000 0 0x50>; 188 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 189 #gpio-cells = <2>; 190 gpio-controller; 191 gpio-ranges = <&pfc 0 32 26>; 192 #interrupt-cells = <2>; 193 interrupt-controller; 194 clocks = <&cpg CPG_MOD 911>; 195 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 196 resets = <&cpg 911>; 197 }; 198 199 gpio2: gpio@e6052000 { 200 compatible = "renesas,gpio-r8a7791", 201 "renesas,rcar-gen2-gpio"; 202 reg = <0 0xe6052000 0 0x50>; 203 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 204 #gpio-cells = <2>; 205 gpio-controller; 206 gpio-ranges = <&pfc 0 64 32>; 207 #interrupt-cells = <2>; 208 interrupt-controller; 209 clocks = <&cpg CPG_MOD 910>; 210 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 211 resets = <&cpg 910>; 212 }; 213 214 gpio3: gpio@e6053000 { 215 compatible = "renesas,gpio-r8a7791", 216 "renesas,rcar-gen2-gpio"; 217 reg = <0 0xe6053000 0 0x50>; 218 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 219 #gpio-cells = <2>; 220 gpio-controller; 221 gpio-ranges = <&pfc 0 96 32>; 222 #interrupt-cells = <2>; 223 interrupt-controller; 224 clocks = <&cpg CPG_MOD 909>; 225 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 226 resets = <&cpg 909>; 227 }; 228 229 gpio4: gpio@e6054000 { 230 compatible = "renesas,gpio-r8a7791", 231 "renesas,rcar-gen2-gpio"; 232 reg = <0 0xe6054000 0 0x50>; 233 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 234 #gpio-cells = <2>; 235 gpio-controller; 236 gpio-ranges = <&pfc 0 128 32>; 237 #interrupt-cells = <2>; 238 interrupt-controller; 239 clocks = <&cpg CPG_MOD 908>; 240 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 241 resets = <&cpg 908>; 242 }; 243 244 gpio5: gpio@e6055000 { 245 compatible = "renesas,gpio-r8a7791", 246 "renesas,rcar-gen2-gpio"; 247 reg = <0 0xe6055000 0 0x50>; 248 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 249 #gpio-cells = <2>; 250 gpio-controller; 251 gpio-ranges = <&pfc 0 160 32>; 252 #interrupt-cells = <2>; 253 interrupt-controller; 254 clocks = <&cpg CPG_MOD 907>; 255 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 256 resets = <&cpg 907>; 257 }; 258 259 gpio6: gpio@e6055400 { 260 compatible = "renesas,gpio-r8a7791", 261 "renesas,rcar-gen2-gpio"; 262 reg = <0 0xe6055400 0 0x50>; 263 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 264 #gpio-cells = <2>; 265 gpio-controller; 266 gpio-ranges = <&pfc 0 192 32>; 267 #interrupt-cells = <2>; 268 interrupt-controller; 269 clocks = <&cpg CPG_MOD 905>; 270 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 271 resets = <&cpg 905>; 272 }; 273 274 gpio7: gpio@e6055800 { 275 compatible = "renesas,gpio-r8a7791", 276 "renesas,rcar-gen2-gpio"; 277 reg = <0 0xe6055800 0 0x50>; 278 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 279 #gpio-cells = <2>; 280 gpio-controller; 281 gpio-ranges = <&pfc 0 224 26>; 282 #interrupt-cells = <2>; 283 interrupt-controller; 284 clocks = <&cpg CPG_MOD 904>; 285 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 286 resets = <&cpg 904>; 287 }; 288 289 pfc: pin-controller@e6060000 { 290 compatible = "renesas,pfc-r8a7791"; 291 reg = <0 0xe6060000 0 0x250>; 292 }; 293 294 cpg: clock-controller@e6150000 { 295 compatible = "renesas,r8a7791-cpg-mssr"; 296 reg = <0 0xe6150000 0 0x1000>; 297 clocks = <&extal_clk>, <&usb_extal_clk>; 298 clock-names = "extal", "usb_extal"; 299 #clock-cells = <2>; 300 #power-domain-cells = <0>; 301 #reset-cells = <1>; 302 }; 303 304 apmu@e6152000 { 305 compatible = "renesas,r8a7791-apmu", "renesas,apmu"; 306 reg = <0 0xe6152000 0 0x188>; 307 cpus = <&cpu0 &cpu1>; 308 }; 309 310 rst: reset-controller@e6160000 { 311 compatible = "renesas,r8a7791-rst"; 312 reg = <0 0xe6160000 0 0x0100>; 313 }; 314 315 sysc: system-controller@e6180000 { 316 compatible = "renesas,r8a7791-sysc"; 317 reg = <0 0xe6180000 0 0x0200>; 318 #power-domain-cells = <1>; 319 }; 320 321 irqc0: interrupt-controller@e61c0000 { 322 compatible = "renesas,irqc-r8a7791", "renesas,irqc"; 323 #interrupt-cells = <2>; 324 interrupt-controller; 325 reg = <0 0xe61c0000 0 0x200>; 326 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 327 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 328 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 331 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 332 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 333 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 334 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 335 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 336 clocks = <&cpg CPG_MOD 407>; 337 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 338 resets = <&cpg 407>; 339 }; 340 341 thermal: thermal@e61f0000 { 342 compatible = "renesas,thermal-r8a7791", 343 "renesas,rcar-gen2-thermal", 344 "renesas,rcar-thermal"; 345 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; 346 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 347 clocks = <&cpg CPG_MOD 522>; 348 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 349 resets = <&cpg 522>; 350 #thermal-sensor-cells = <0>; 351 }; 352 353 ipmmu_sy0: mmu@e6280000 { 354 compatible = "renesas,ipmmu-r8a7791", 355 "renesas,ipmmu-vmsa"; 356 reg = <0 0xe6280000 0 0x1000>; 357 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 358 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 359 #iommu-cells = <1>; 360 status = "disabled"; 361 }; 362 363 ipmmu_sy1: mmu@e6290000 { 364 compatible = "renesas,ipmmu-r8a7791", 365 "renesas,ipmmu-vmsa"; 366 reg = <0 0xe6290000 0 0x1000>; 367 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 368 #iommu-cells = <1>; 369 status = "disabled"; 370 }; 371 372 ipmmu_ds: mmu@e6740000 { 373 compatible = "renesas,ipmmu-r8a7791", 374 "renesas,ipmmu-vmsa"; 375 reg = <0 0xe6740000 0 0x1000>; 376 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 377 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 378 #iommu-cells = <1>; 379 status = "disabled"; 380 }; 381 382 ipmmu_mp: mmu@ec680000 { 383 compatible = "renesas,ipmmu-r8a7791", 384 "renesas,ipmmu-vmsa"; 385 reg = <0 0xec680000 0 0x1000>; 386 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 387 #iommu-cells = <1>; 388 status = "disabled"; 389 }; 390 391 ipmmu_mx: mmu@fe951000 { 392 compatible = "renesas,ipmmu-r8a7791", 393 "renesas,ipmmu-vmsa"; 394 reg = <0 0xfe951000 0 0x1000>; 395 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 396 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 397 #iommu-cells = <1>; 398 status = "disabled"; 399 }; 400 401 ipmmu_rt: mmu@ffc80000 { 402 compatible = "renesas,ipmmu-r8a7791", 403 "renesas,ipmmu-vmsa"; 404 reg = <0 0xffc80000 0 0x1000>; 405 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 406 #iommu-cells = <1>; 407 status = "disabled"; 408 }; 409 410 ipmmu_gp: mmu@e62a0000 { 411 compatible = "renesas,ipmmu-r8a7791", 412 "renesas,ipmmu-vmsa"; 413 reg = <0 0xe62a0000 0 0x1000>; 414 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 415 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 416 #iommu-cells = <1>; 417 status = "disabled"; 418 }; 419 420 icram0: sram@e63a0000 { 421 compatible = "mmio-sram"; 422 reg = <0 0xe63a0000 0 0x12000>; 423 #address-cells = <1>; 424 #size-cells = <1>; 425 ranges = <0 0 0xe63a0000 0x12000>; 426 }; 427 428 icram1: sram@e63c0000 { 429 compatible = "mmio-sram"; 430 reg = <0 0xe63c0000 0 0x1000>; 431 #address-cells = <1>; 432 #size-cells = <1>; 433 ranges = <0 0 0xe63c0000 0x1000>; 434 435 smp-sram@0 { 436 compatible = "renesas,smp-sram"; 437 reg = <0 0x100>; 438 }; 439 }; 440 441 /* The memory map in the User's Manual maps the cores to 442 * bus numbers 443 */ 444 i2c0: i2c@e6508000 { 445 #address-cells = <1>; 446 #size-cells = <0>; 447 compatible = "renesas,i2c-r8a7791", 448 "renesas,rcar-gen2-i2c"; 449 reg = <0 0xe6508000 0 0x40>; 450 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 451 clocks = <&cpg CPG_MOD 931>; 452 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 453 resets = <&cpg 931>; 454 i2c-scl-internal-delay-ns = <6>; 455 status = "disabled"; 456 }; 457 458 i2c1: i2c@e6518000 { 459 #address-cells = <1>; 460 #size-cells = <0>; 461 compatible = "renesas,i2c-r8a7791", 462 "renesas,rcar-gen2-i2c"; 463 reg = <0 0xe6518000 0 0x40>; 464 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 465 clocks = <&cpg CPG_MOD 930>; 466 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 467 resets = <&cpg 930>; 468 i2c-scl-internal-delay-ns = <6>; 469 status = "disabled"; 470 }; 471 472 i2c2: i2c@e6530000 { 473 #address-cells = <1>; 474 #size-cells = <0>; 475 compatible = "renesas,i2c-r8a7791", 476 "renesas,rcar-gen2-i2c"; 477 reg = <0 0xe6530000 0 0x40>; 478 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 479 clocks = <&cpg CPG_MOD 929>; 480 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 481 resets = <&cpg 929>; 482 i2c-scl-internal-delay-ns = <6>; 483 status = "disabled"; 484 }; 485 486 i2c3: i2c@e6540000 { 487 #address-cells = <1>; 488 #size-cells = <0>; 489 compatible = "renesas,i2c-r8a7791", 490 "renesas,rcar-gen2-i2c"; 491 reg = <0 0xe6540000 0 0x40>; 492 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 493 clocks = <&cpg CPG_MOD 928>; 494 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 495 resets = <&cpg 928>; 496 i2c-scl-internal-delay-ns = <6>; 497 status = "disabled"; 498 }; 499 500 i2c4: i2c@e6520000 { 501 #address-cells = <1>; 502 #size-cells = <0>; 503 compatible = "renesas,i2c-r8a7791", 504 "renesas,rcar-gen2-i2c"; 505 reg = <0 0xe6520000 0 0x40>; 506 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 507 clocks = <&cpg CPG_MOD 927>; 508 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 509 resets = <&cpg 927>; 510 i2c-scl-internal-delay-ns = <6>; 511 status = "disabled"; 512 }; 513 514 i2c5: i2c@e6528000 { 515 /* doesn't need pinmux */ 516 #address-cells = <1>; 517 #size-cells = <0>; 518 compatible = "renesas,i2c-r8a7791", 519 "renesas,rcar-gen2-i2c"; 520 reg = <0 0xe6528000 0 0x40>; 521 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 522 clocks = <&cpg CPG_MOD 925>; 523 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 524 resets = <&cpg 925>; 525 i2c-scl-internal-delay-ns = <110>; 526 status = "disabled"; 527 }; 528 529 i2c6: i2c@e60b0000 { 530 /* doesn't need pinmux */ 531 #address-cells = <1>; 532 #size-cells = <0>; 533 compatible = "renesas,iic-r8a7791", 534 "renesas,rcar-gen2-iic", 535 "renesas,rmobile-iic"; 536 reg = <0 0xe60b0000 0 0x425>; 537 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 538 clocks = <&cpg CPG_MOD 926>; 539 dmas = <&dmac0 0x77>, <&dmac0 0x78>, 540 <&dmac1 0x77>, <&dmac1 0x78>; 541 dma-names = "tx", "rx", "tx", "rx"; 542 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 543 resets = <&cpg 926>; 544 status = "disabled"; 545 }; 546 547 i2c7: i2c@e6500000 { 548 #address-cells = <1>; 549 #size-cells = <0>; 550 compatible = "renesas,iic-r8a7791", 551 "renesas,rcar-gen2-iic", 552 "renesas,rmobile-iic"; 553 reg = <0 0xe6500000 0 0x425>; 554 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 555 clocks = <&cpg CPG_MOD 318>; 556 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 557 <&dmac1 0x61>, <&dmac1 0x62>; 558 dma-names = "tx", "rx", "tx", "rx"; 559 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 560 resets = <&cpg 318>; 561 status = "disabled"; 562 }; 563 564 i2c8: i2c@e6510000 { 565 #address-cells = <1>; 566 #size-cells = <0>; 567 compatible = "renesas,iic-r8a7791", 568 "renesas,rcar-gen2-iic", 569 "renesas,rmobile-iic"; 570 reg = <0 0xe6510000 0 0x425>; 571 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 572 clocks = <&cpg CPG_MOD 323>; 573 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 574 <&dmac1 0x65>, <&dmac1 0x66>; 575 dma-names = "tx", "rx", "tx", "rx"; 576 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 577 resets = <&cpg 323>; 578 status = "disabled"; 579 }; 580 581 hsusb: usb@e6590000 { 582 compatible = "renesas,usbhs-r8a7791", 583 "renesas,rcar-gen2-usbhs"; 584 reg = <0 0xe6590000 0 0x100>; 585 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 586 clocks = <&cpg CPG_MOD 704>; 587 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 588 <&usb_dmac1 0>, <&usb_dmac1 1>; 589 dma-names = "ch0", "ch1", "ch2", "ch3"; 590 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 591 resets = <&cpg 704>; 592 renesas,buswait = <4>; 593 phys = <&usb0 1>; 594 phy-names = "usb"; 595 status = "disabled"; 596 }; 597 598 usbphy: usb-phy@e6590100 { 599 compatible = "renesas,usb-phy-r8a7791", 600 "renesas,rcar-gen2-usb-phy"; 601 reg = <0 0xe6590100 0 0x100>; 602 #address-cells = <1>; 603 #size-cells = <0>; 604 clocks = <&cpg CPG_MOD 704>; 605 clock-names = "usbhs"; 606 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 607 resets = <&cpg 704>; 608 status = "disabled"; 609 610 usb0: usb-channel@0 { 611 reg = <0>; 612 #phy-cells = <1>; 613 }; 614 usb2: usb-channel@2 { 615 reg = <2>; 616 #phy-cells = <1>; 617 }; 618 }; 619 620 usb_dmac0: dma-controller@e65a0000 { 621 compatible = "renesas,r8a7791-usb-dmac", 622 "renesas,usb-dmac"; 623 reg = <0 0xe65a0000 0 0x100>; 624 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 625 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 626 interrupt-names = "ch0", "ch1"; 627 clocks = <&cpg CPG_MOD 330>; 628 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 629 resets = <&cpg 330>; 630 #dma-cells = <1>; 631 dma-channels = <2>; 632 }; 633 634 usb_dmac1: dma-controller@e65b0000 { 635 compatible = "renesas,r8a7791-usb-dmac", 636 "renesas,usb-dmac"; 637 reg = <0 0xe65b0000 0 0x100>; 638 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 639 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 640 interrupt-names = "ch0", "ch1"; 641 clocks = <&cpg CPG_MOD 331>; 642 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 643 resets = <&cpg 331>; 644 #dma-cells = <1>; 645 dma-channels = <2>; 646 }; 647 648 dmac0: dma-controller@e6700000 { 649 compatible = "renesas,dmac-r8a7791", 650 "renesas,rcar-dmac"; 651 reg = <0 0xe6700000 0 0x20000>; 652 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 653 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 654 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 655 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 656 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 657 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 658 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 659 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 660 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 661 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 662 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 663 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 664 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 665 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 666 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 667 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 668 interrupt-names = "error", 669 "ch0", "ch1", "ch2", "ch3", 670 "ch4", "ch5", "ch6", "ch7", 671 "ch8", "ch9", "ch10", "ch11", 672 "ch12", "ch13", "ch14"; 673 clocks = <&cpg CPG_MOD 219>; 674 clock-names = "fck"; 675 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 676 resets = <&cpg 219>; 677 #dma-cells = <1>; 678 dma-channels = <15>; 679 }; 680 681 dmac1: dma-controller@e6720000 { 682 compatible = "renesas,dmac-r8a7791", 683 "renesas,rcar-dmac"; 684 reg = <0 0xe6720000 0 0x20000>; 685 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 686 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 687 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 688 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 689 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 690 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 691 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 692 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 693 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 694 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 695 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 696 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 697 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 698 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 699 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 700 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 701 interrupt-names = "error", 702 "ch0", "ch1", "ch2", "ch3", 703 "ch4", "ch5", "ch6", "ch7", 704 "ch8", "ch9", "ch10", "ch11", 705 "ch12", "ch13", "ch14"; 706 clocks = <&cpg CPG_MOD 218>; 707 clock-names = "fck"; 708 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 709 resets = <&cpg 218>; 710 #dma-cells = <1>; 711 dma-channels = <15>; 712 }; 713 714 avb: ethernet@e6800000 { 715 compatible = "renesas,etheravb-r8a7791", 716 "renesas,etheravb-rcar-gen2"; 717 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 718 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 719 clocks = <&cpg CPG_MOD 812>; 720 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 721 resets = <&cpg 812>; 722 #address-cells = <1>; 723 #size-cells = <0>; 724 status = "disabled"; 725 }; 726 727 qspi: spi@e6b10000 { 728 compatible = "renesas,qspi-r8a7791", "renesas,qspi"; 729 reg = <0 0xe6b10000 0 0x2c>; 730 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 731 clocks = <&cpg CPG_MOD 917>; 732 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 733 <&dmac1 0x17>, <&dmac1 0x18>; 734 dma-names = "tx", "rx", "tx", "rx"; 735 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 736 resets = <&cpg 917>; 737 num-cs = <1>; 738 #address-cells = <1>; 739 #size-cells = <0>; 740 status = "disabled"; 741 }; 742 743 scifa0: serial@e6c40000 { 744 compatible = "renesas,scifa-r8a7791", 745 "renesas,rcar-gen2-scifa", "renesas,scifa"; 746 reg = <0 0xe6c40000 0 64>; 747 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 748 clocks = <&cpg CPG_MOD 204>; 749 clock-names = "fck"; 750 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 751 <&dmac1 0x21>, <&dmac1 0x22>; 752 dma-names = "tx", "rx", "tx", "rx"; 753 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 754 resets = <&cpg 204>; 755 status = "disabled"; 756 }; 757 758 scifa1: serial@e6c50000 { 759 compatible = "renesas,scifa-r8a7791", 760 "renesas,rcar-gen2-scifa", "renesas,scifa"; 761 reg = <0 0xe6c50000 0 64>; 762 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 763 clocks = <&cpg CPG_MOD 203>; 764 clock-names = "fck"; 765 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 766 <&dmac1 0x25>, <&dmac1 0x26>; 767 dma-names = "tx", "rx", "tx", "rx"; 768 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 769 resets = <&cpg 203>; 770 status = "disabled"; 771 }; 772 773 scifa2: serial@e6c60000 { 774 compatible = "renesas,scifa-r8a7791", 775 "renesas,rcar-gen2-scifa", "renesas,scifa"; 776 reg = <0 0xe6c60000 0 64>; 777 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 778 clocks = <&cpg CPG_MOD 202>; 779 clock-names = "fck"; 780 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 781 <&dmac1 0x27>, <&dmac1 0x28>; 782 dma-names = "tx", "rx", "tx", "rx"; 783 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 784 resets = <&cpg 202>; 785 status = "disabled"; 786 }; 787 788 scifa3: serial@e6c70000 { 789 compatible = "renesas,scifa-r8a7791", 790 "renesas,rcar-gen2-scifa", "renesas,scifa"; 791 reg = <0 0xe6c70000 0 64>; 792 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 793 clocks = <&cpg CPG_MOD 1106>; 794 clock-names = "fck"; 795 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 796 <&dmac1 0x1b>, <&dmac1 0x1c>; 797 dma-names = "tx", "rx", "tx", "rx"; 798 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 799 resets = <&cpg 1106>; 800 status = "disabled"; 801 }; 802 803 scifa4: serial@e6c78000 { 804 compatible = "renesas,scifa-r8a7791", 805 "renesas,rcar-gen2-scifa", "renesas,scifa"; 806 reg = <0 0xe6c78000 0 64>; 807 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 808 clocks = <&cpg CPG_MOD 1107>; 809 clock-names = "fck"; 810 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 811 <&dmac1 0x1f>, <&dmac1 0x20>; 812 dma-names = "tx", "rx", "tx", "rx"; 813 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 814 resets = <&cpg 1107>; 815 status = "disabled"; 816 }; 817 818 scifa5: serial@e6c80000 { 819 compatible = "renesas,scifa-r8a7791", 820 "renesas,rcar-gen2-scifa", "renesas,scifa"; 821 reg = <0 0xe6c80000 0 64>; 822 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 823 clocks = <&cpg CPG_MOD 1108>; 824 clock-names = "fck"; 825 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 826 <&dmac1 0x23>, <&dmac1 0x24>; 827 dma-names = "tx", "rx", "tx", "rx"; 828 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 829 resets = <&cpg 1108>; 830 status = "disabled"; 831 }; 832 833 scifb0: serial@e6c20000 { 834 compatible = "renesas,scifb-r8a7791", 835 "renesas,rcar-gen2-scifb", "renesas,scifb"; 836 reg = <0 0xe6c20000 0 0x100>; 837 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 838 clocks = <&cpg CPG_MOD 206>; 839 clock-names = "fck"; 840 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 841 <&dmac1 0x3d>, <&dmac1 0x3e>; 842 dma-names = "tx", "rx", "tx", "rx"; 843 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 844 resets = <&cpg 206>; 845 status = "disabled"; 846 }; 847 848 scifb1: serial@e6c30000 { 849 compatible = "renesas,scifb-r8a7791", 850 "renesas,rcar-gen2-scifb", "renesas,scifb"; 851 reg = <0 0xe6c30000 0 0x100>; 852 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 853 clocks = <&cpg CPG_MOD 207>; 854 clock-names = "fck"; 855 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 856 <&dmac1 0x19>, <&dmac1 0x1a>; 857 dma-names = "tx", "rx", "tx", "rx"; 858 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 859 resets = <&cpg 207>; 860 status = "disabled"; 861 }; 862 863 scifb2: serial@e6ce0000 { 864 compatible = "renesas,scifb-r8a7791", 865 "renesas,rcar-gen2-scifb", "renesas,scifb"; 866 reg = <0 0xe6ce0000 0 0x100>; 867 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 868 clocks = <&cpg CPG_MOD 216>; 869 clock-names = "fck"; 870 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 871 <&dmac1 0x1d>, <&dmac1 0x1e>; 872 dma-names = "tx", "rx", "tx", "rx"; 873 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 874 resets = <&cpg 216>; 875 status = "disabled"; 876 }; 877 878 scif0: serial@e6e60000 { 879 compatible = "renesas,scif-r8a7791", 880 "renesas,rcar-gen2-scif", "renesas,scif"; 881 reg = <0 0xe6e60000 0 64>; 882 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 883 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 884 <&scif_clk>; 885 clock-names = "fck", "brg_int", "scif_clk"; 886 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 887 <&dmac1 0x29>, <&dmac1 0x2a>; 888 dma-names = "tx", "rx", "tx", "rx"; 889 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 890 resets = <&cpg 721>; 891 status = "disabled"; 892 }; 893 894 scif1: serial@e6e68000 { 895 compatible = "renesas,scif-r8a7791", 896 "renesas,rcar-gen2-scif", "renesas,scif"; 897 reg = <0 0xe6e68000 0 64>; 898 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 899 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 900 <&scif_clk>; 901 clock-names = "fck", "brg_int", "scif_clk"; 902 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 903 <&dmac1 0x2d>, <&dmac1 0x2e>; 904 dma-names = "tx", "rx", "tx", "rx"; 905 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 906 resets = <&cpg 720>; 907 status = "disabled"; 908 }; 909 910 scif2: serial@e6e58000 { 911 compatible = "renesas,scif-r8a7791", 912 "renesas,rcar-gen2-scif", "renesas,scif"; 913 reg = <0 0xe6e58000 0 64>; 914 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 915 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 916 <&scif_clk>; 917 clock-names = "fck", "brg_int", "scif_clk"; 918 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 919 <&dmac1 0x2b>, <&dmac1 0x2c>; 920 dma-names = "tx", "rx", "tx", "rx"; 921 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 922 resets = <&cpg 719>; 923 status = "disabled"; 924 }; 925 926 scif3: serial@e6ea8000 { 927 compatible = "renesas,scif-r8a7791", 928 "renesas,rcar-gen2-scif", "renesas,scif"; 929 reg = <0 0xe6ea8000 0 64>; 930 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 931 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 932 <&scif_clk>; 933 clock-names = "fck", "brg_int", "scif_clk"; 934 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 935 <&dmac1 0x2f>, <&dmac1 0x30>; 936 dma-names = "tx", "rx", "tx", "rx"; 937 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 938 resets = <&cpg 718>; 939 status = "disabled"; 940 }; 941 942 scif4: serial@e6ee0000 { 943 compatible = "renesas,scif-r8a7791", 944 "renesas,rcar-gen2-scif", "renesas,scif"; 945 reg = <0 0xe6ee0000 0 64>; 946 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 947 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 948 <&scif_clk>; 949 clock-names = "fck", "brg_int", "scif_clk"; 950 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 951 <&dmac1 0xfb>, <&dmac1 0xfc>; 952 dma-names = "tx", "rx", "tx", "rx"; 953 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 954 resets = <&cpg 715>; 955 status = "disabled"; 956 }; 957 958 scif5: serial@e6ee8000 { 959 compatible = "renesas,scif-r8a7791", 960 "renesas,rcar-gen2-scif", "renesas,scif"; 961 reg = <0 0xe6ee8000 0 64>; 962 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 963 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 964 <&scif_clk>; 965 clock-names = "fck", "brg_int", "scif_clk"; 966 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 967 <&dmac1 0xfd>, <&dmac1 0xfe>; 968 dma-names = "tx", "rx", "tx", "rx"; 969 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 970 resets = <&cpg 714>; 971 status = "disabled"; 972 }; 973 974 hscif0: serial@e62c0000 { 975 compatible = "renesas,hscif-r8a7791", 976 "renesas,rcar-gen2-hscif", "renesas,hscif"; 977 reg = <0 0xe62c0000 0 96>; 978 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 979 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 980 <&scif_clk>; 981 clock-names = "fck", "brg_int", "scif_clk"; 982 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 983 <&dmac1 0x39>, <&dmac1 0x3a>; 984 dma-names = "tx", "rx", "tx", "rx"; 985 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 986 resets = <&cpg 717>; 987 status = "disabled"; 988 }; 989 990 hscif1: serial@e62c8000 { 991 compatible = "renesas,hscif-r8a7791", 992 "renesas,rcar-gen2-hscif", "renesas,hscif"; 993 reg = <0 0xe62c8000 0 96>; 994 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 995 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 996 <&scif_clk>; 997 clock-names = "fck", "brg_int", "scif_clk"; 998 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 999 <&dmac1 0x4d>, <&dmac1 0x4e>; 1000 dma-names = "tx", "rx", "tx", "rx"; 1001 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1002 resets = <&cpg 716>; 1003 status = "disabled"; 1004 }; 1005 1006 hscif2: serial@e62d0000 { 1007 compatible = "renesas,hscif-r8a7791", 1008 "renesas,rcar-gen2-hscif", "renesas,hscif"; 1009 reg = <0 0xe62d0000 0 96>; 1010 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1011 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 1012 <&scif_clk>; 1013 clock-names = "fck", "brg_int", "scif_clk"; 1014 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 1015 <&dmac1 0x3b>, <&dmac1 0x3c>; 1016 dma-names = "tx", "rx", "tx", "rx"; 1017 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1018 resets = <&cpg 713>; 1019 status = "disabled"; 1020 }; 1021 1022 msiof0: spi@e6e20000 { 1023 compatible = "renesas,msiof-r8a7791", 1024 "renesas,rcar-gen2-msiof"; 1025 reg = <0 0xe6e20000 0 0x0064>; 1026 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1027 clocks = <&cpg CPG_MOD 000>; 1028 dmas = <&dmac0 0x51>, <&dmac0 0x52>, 1029 <&dmac1 0x51>, <&dmac1 0x52>; 1030 dma-names = "tx", "rx", "tx", "rx"; 1031 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1032 resets = <&cpg 0>; 1033 #address-cells = <1>; 1034 #size-cells = <0>; 1035 status = "disabled"; 1036 }; 1037 1038 msiof1: spi@e6e10000 { 1039 compatible = "renesas,msiof-r8a7791", 1040 "renesas,rcar-gen2-msiof"; 1041 reg = <0 0xe6e10000 0 0x0064>; 1042 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1043 clocks = <&cpg CPG_MOD 208>; 1044 dmas = <&dmac0 0x55>, <&dmac0 0x56>, 1045 <&dmac1 0x55>, <&dmac1 0x56>; 1046 dma-names = "tx", "rx", "tx", "rx"; 1047 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1048 resets = <&cpg 208>; 1049 #address-cells = <1>; 1050 #size-cells = <0>; 1051 status = "disabled"; 1052 }; 1053 1054 msiof2: spi@e6e00000 { 1055 compatible = "renesas,msiof-r8a7791", 1056 "renesas,rcar-gen2-msiof"; 1057 reg = <0 0xe6e00000 0 0x0064>; 1058 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1059 clocks = <&cpg CPG_MOD 205>; 1060 dmas = <&dmac0 0x41>, <&dmac0 0x42>, 1061 <&dmac1 0x41>, <&dmac1 0x42>; 1062 dma-names = "tx", "rx", "tx", "rx"; 1063 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1064 resets = <&cpg 205>; 1065 #address-cells = <1>; 1066 #size-cells = <0>; 1067 status = "disabled"; 1068 }; 1069 1070 adc: adc@e6e54000 { 1071 compatible = "renesas,r8a7791-gyroadc", 1072 "renesas,rcar-gyroadc"; 1073 reg = <0 0xe6e54000 0 64>; 1074 clocks = <&cpg CPG_MOD 901>; 1075 clock-names = "fck"; 1076 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1077 resets = <&cpg 901>; 1078 status = "disabled"; 1079 }; 1080 1081 can0: can@e6e80000 { 1082 compatible = "renesas,can-r8a7791", 1083 "renesas,rcar-gen2-can"; 1084 reg = <0 0xe6e80000 0 0x1000>; 1085 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1086 clocks = <&cpg CPG_MOD 916>, 1087 <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>; 1088 clock-names = "clkp1", "clkp2", "can_clk"; 1089 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1090 resets = <&cpg 916>; 1091 status = "disabled"; 1092 }; 1093 1094 can1: can@e6e88000 { 1095 compatible = "renesas,can-r8a7791", 1096 "renesas,rcar-gen2-can"; 1097 reg = <0 0xe6e88000 0 0x1000>; 1098 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1099 clocks = <&cpg CPG_MOD 915>, 1100 <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>; 1101 clock-names = "clkp1", "clkp2", "can_clk"; 1102 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1103 resets = <&cpg 915>; 1104 status = "disabled"; 1105 }; 1106 1107 vin0: video@e6ef0000 { 1108 compatible = "renesas,vin-r8a7791", 1109 "renesas,rcar-gen2-vin"; 1110 reg = <0 0xe6ef0000 0 0x1000>; 1111 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1112 clocks = <&cpg CPG_MOD 811>; 1113 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1114 resets = <&cpg 811>; 1115 status = "disabled"; 1116 }; 1117 1118 vin1: video@e6ef1000 { 1119 compatible = "renesas,vin-r8a7791", 1120 "renesas,rcar-gen2-vin"; 1121 reg = <0 0xe6ef1000 0 0x1000>; 1122 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1123 clocks = <&cpg CPG_MOD 810>; 1124 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1125 resets = <&cpg 810>; 1126 status = "disabled"; 1127 }; 1128 1129 vin2: video@e6ef2000 { 1130 compatible = "renesas,vin-r8a7791", 1131 "renesas,rcar-gen2-vin"; 1132 reg = <0 0xe6ef2000 0 0x1000>; 1133 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1134 clocks = <&cpg CPG_MOD 809>; 1135 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1136 resets = <&cpg 809>; 1137 status = "disabled"; 1138 }; 1139 1140 rcar_sound: sound@ec500000 { 1141 /* 1142 * #sound-dai-cells is required 1143 * 1144 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1145 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1146 */ 1147 compatible = "renesas,rcar_sound-r8a7791", 1148 "renesas,rcar_sound-gen2"; 1149 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1150 <0 0xec5a0000 0 0x100>, /* ADG */ 1151 <0 0xec540000 0 0x1000>, /* SSIU */ 1152 <0 0xec541000 0 0x280>, /* SSI */ 1153 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1154 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1155 1156 clocks = <&cpg CPG_MOD 1005>, 1157 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1158 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1159 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1160 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1161 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1162 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1163 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1164 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1165 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1166 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1167 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1168 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1169 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1170 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, 1171 <&cpg CPG_CORE R8A7791_CLK_M2>; 1172 clock-names = "ssi-all", 1173 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1174 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1175 "ssi.1", "ssi.0", "src.9", "src.8", 1176 "src.7", "src.6", "src.5", "src.4", 1177 "src.3", "src.2", "src.1", "src.0", 1178 "ctu.0", "ctu.1", 1179 "mix.0", "mix.1", 1180 "dvc.0", "dvc.1", 1181 "clk_a", "clk_b", "clk_c", "clk_i"; 1182 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1183 resets = <&cpg 1005>, 1184 <&cpg 1006>, <&cpg 1007>, 1185 <&cpg 1008>, <&cpg 1009>, 1186 <&cpg 1010>, <&cpg 1011>, 1187 <&cpg 1012>, <&cpg 1013>, 1188 <&cpg 1014>, <&cpg 1015>; 1189 reset-names = "ssi-all", 1190 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1191 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1192 "ssi.1", "ssi.0"; 1193 1194 status = "disabled"; 1195 1196 rcar_sound,dvc { 1197 dvc0: dvc-0 { 1198 dmas = <&audma1 0xbc>; 1199 dma-names = "tx"; 1200 }; 1201 dvc1: dvc-1 { 1202 dmas = <&audma1 0xbe>; 1203 dma-names = "tx"; 1204 }; 1205 }; 1206 1207 rcar_sound,mix { 1208 mix0: mix-0 { }; 1209 mix1: mix-1 { }; 1210 }; 1211 1212 rcar_sound,ctu { 1213 ctu00: ctu-0 { }; 1214 ctu01: ctu-1 { }; 1215 ctu02: ctu-2 { }; 1216 ctu03: ctu-3 { }; 1217 ctu10: ctu-4 { }; 1218 ctu11: ctu-5 { }; 1219 ctu12: ctu-6 { }; 1220 ctu13: ctu-7 { }; 1221 }; 1222 1223 rcar_sound,src { 1224 src0: src-0 { 1225 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1226 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1227 dma-names = "rx", "tx"; 1228 }; 1229 src1: src-1 { 1230 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1231 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1232 dma-names = "rx", "tx"; 1233 }; 1234 src2: src-2 { 1235 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1236 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1237 dma-names = "rx", "tx"; 1238 }; 1239 src3: src-3 { 1240 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1241 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1242 dma-names = "rx", "tx"; 1243 }; 1244 src4: src-4 { 1245 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1246 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1247 dma-names = "rx", "tx"; 1248 }; 1249 src5: src-5 { 1250 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1251 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1252 dma-names = "rx", "tx"; 1253 }; 1254 src6: src-6 { 1255 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1256 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1257 dma-names = "rx", "tx"; 1258 }; 1259 src7: src-7 { 1260 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1261 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1262 dma-names = "rx", "tx"; 1263 }; 1264 src8: src-8 { 1265 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1266 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1267 dma-names = "rx", "tx"; 1268 }; 1269 src9: src-9 { 1270 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1271 dmas = <&audma0 0x97>, <&audma1 0xba>; 1272 dma-names = "rx", "tx"; 1273 }; 1274 }; 1275 1276 rcar_sound,ssi { 1277 ssi0: ssi-0 { 1278 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1279 dmas = <&audma0 0x01>, <&audma1 0x02>, 1280 <&audma0 0x15>, <&audma1 0x16>; 1281 dma-names = "rx", "tx", "rxu", "txu"; 1282 }; 1283 ssi1: ssi-1 { 1284 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1285 dmas = <&audma0 0x03>, <&audma1 0x04>, 1286 <&audma0 0x49>, <&audma1 0x4a>; 1287 dma-names = "rx", "tx", "rxu", "txu"; 1288 }; 1289 ssi2: ssi-2 { 1290 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1291 dmas = <&audma0 0x05>, <&audma1 0x06>, 1292 <&audma0 0x63>, <&audma1 0x64>; 1293 dma-names = "rx", "tx", "rxu", "txu"; 1294 }; 1295 ssi3: ssi-3 { 1296 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1297 dmas = <&audma0 0x07>, <&audma1 0x08>, 1298 <&audma0 0x6f>, <&audma1 0x70>; 1299 dma-names = "rx", "tx", "rxu", "txu"; 1300 }; 1301 ssi4: ssi-4 { 1302 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1303 dmas = <&audma0 0x09>, <&audma1 0x0a>, 1304 <&audma0 0x71>, <&audma1 0x72>; 1305 dma-names = "rx", "tx", "rxu", "txu"; 1306 }; 1307 ssi5: ssi-5 { 1308 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1309 dmas = <&audma0 0x0b>, <&audma1 0x0c>, 1310 <&audma0 0x73>, <&audma1 0x74>; 1311 dma-names = "rx", "tx", "rxu", "txu"; 1312 }; 1313 ssi6: ssi-6 { 1314 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1315 dmas = <&audma0 0x0d>, <&audma1 0x0e>, 1316 <&audma0 0x75>, <&audma1 0x76>; 1317 dma-names = "rx", "tx", "rxu", "txu"; 1318 }; 1319 ssi7: ssi-7 { 1320 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1321 dmas = <&audma0 0x0f>, <&audma1 0x10>, 1322 <&audma0 0x79>, <&audma1 0x7a>; 1323 dma-names = "rx", "tx", "rxu", "txu"; 1324 }; 1325 ssi8: ssi-8 { 1326 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1327 dmas = <&audma0 0x11>, <&audma1 0x12>, 1328 <&audma0 0x7b>, <&audma1 0x7c>; 1329 dma-names = "rx", "tx", "rxu", "txu"; 1330 }; 1331 ssi9: ssi-9 { 1332 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1333 dmas = <&audma0 0x13>, <&audma1 0x14>, 1334 <&audma0 0x7d>, <&audma1 0x7e>; 1335 dma-names = "rx", "tx", "rxu", "txu"; 1336 }; 1337 }; 1338 }; 1339 1340 audma0: dma-controller@ec700000 { 1341 compatible = "renesas,dmac-r8a7791", 1342 "renesas,rcar-dmac"; 1343 reg = <0 0xec700000 0 0x10000>; 1344 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1345 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1346 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1347 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1348 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1349 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1350 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1351 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1352 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1353 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1354 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1355 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1356 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1357 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1358 interrupt-names = "error", 1359 "ch0", "ch1", "ch2", "ch3", 1360 "ch4", "ch5", "ch6", "ch7", 1361 "ch8", "ch9", "ch10", "ch11", 1362 "ch12"; 1363 clocks = <&cpg CPG_MOD 502>; 1364 clock-names = "fck"; 1365 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1366 resets = <&cpg 502>; 1367 #dma-cells = <1>; 1368 dma-channels = <13>; 1369 }; 1370 1371 audma1: dma-controller@ec720000 { 1372 compatible = "renesas,dmac-r8a7791", 1373 "renesas,rcar-dmac"; 1374 reg = <0 0xec720000 0 0x10000>; 1375 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 1376 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1377 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1378 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 1379 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 1380 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 1381 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 1382 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 1383 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 1384 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 1385 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 1386 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 1387 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 1388 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; 1389 interrupt-names = "error", 1390 "ch0", "ch1", "ch2", "ch3", 1391 "ch4", "ch5", "ch6", "ch7", 1392 "ch8", "ch9", "ch10", "ch11", 1393 "ch12"; 1394 clocks = <&cpg CPG_MOD 501>; 1395 clock-names = "fck"; 1396 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1397 resets = <&cpg 501>; 1398 #dma-cells = <1>; 1399 dma-channels = <13>; 1400 }; 1401 1402 xhci: usb@ee000000 { 1403 compatible = "renesas,xhci-r8a7791", 1404 "renesas,rcar-gen2-xhci"; 1405 reg = <0 0xee000000 0 0xc00>; 1406 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 1407 clocks = <&cpg CPG_MOD 328>; 1408 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1409 resets = <&cpg 328>; 1410 phys = <&usb2 1>; 1411 phy-names = "usb"; 1412 status = "disabled"; 1413 }; 1414 1415 pci0: pci@ee090000 { 1416 compatible = "renesas,pci-r8a7791", 1417 "renesas,pci-rcar-gen2"; 1418 device_type = "pci"; 1419 reg = <0 0xee090000 0 0xc00>, 1420 <0 0xee080000 0 0x1100>; 1421 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1422 clocks = <&cpg CPG_MOD 703>; 1423 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1424 resets = <&cpg 703>; 1425 status = "disabled"; 1426 1427 bus-range = <0 0>; 1428 #address-cells = <3>; 1429 #size-cells = <2>; 1430 #interrupt-cells = <1>; 1431 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1432 interrupt-map-mask = <0xf800 0 0 0x7>; 1433 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1434 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1435 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1436 1437 usb@1,0 { 1438 reg = <0x800 0 0 0 0>; 1439 phys = <&usb0 0>; 1440 phy-names = "usb"; 1441 }; 1442 1443 usb@2,0 { 1444 reg = <0x1000 0 0 0 0>; 1445 phys = <&usb0 0>; 1446 phy-names = "usb"; 1447 }; 1448 }; 1449 1450 pci1: pci@ee0d0000 { 1451 compatible = "renesas,pci-r8a7791", 1452 "renesas,pci-rcar-gen2"; 1453 device_type = "pci"; 1454 reg = <0 0xee0d0000 0 0xc00>, 1455 <0 0xee0c0000 0 0x1100>; 1456 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1457 clocks = <&cpg CPG_MOD 703>; 1458 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1459 resets = <&cpg 703>; 1460 status = "disabled"; 1461 1462 bus-range = <1 1>; 1463 #address-cells = <3>; 1464 #size-cells = <2>; 1465 #interrupt-cells = <1>; 1466 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1467 interrupt-map-mask = <0xf800 0 0 0x7>; 1468 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1469 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1470 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1471 1472 usb@1,0 { 1473 reg = <0x10800 0 0 0 0>; 1474 phys = <&usb2 0>; 1475 phy-names = "usb"; 1476 }; 1477 1478 usb@2,0 { 1479 reg = <0x11000 0 0 0 0>; 1480 phys = <&usb2 0>; 1481 phy-names = "usb"; 1482 }; 1483 }; 1484 1485 sdhi0: sd@ee100000 { 1486 compatible = "renesas,sdhi-r8a7791", 1487 "renesas,rcar-gen2-sdhi"; 1488 reg = <0 0xee100000 0 0x328>; 1489 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1490 clocks = <&cpg CPG_MOD 314>; 1491 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1492 <&dmac1 0xcd>, <&dmac1 0xce>; 1493 dma-names = "tx", "rx", "tx", "rx"; 1494 max-frequency = <195000000>; 1495 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1496 resets = <&cpg 314>; 1497 status = "disabled"; 1498 }; 1499 1500 sdhi1: sd@ee140000 { 1501 compatible = "renesas,sdhi-r8a7791", 1502 "renesas,rcar-gen2-sdhi"; 1503 reg = <0 0xee140000 0 0x100>; 1504 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1505 clocks = <&cpg CPG_MOD 312>; 1506 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1507 <&dmac1 0xc1>, <&dmac1 0xc2>; 1508 dma-names = "tx", "rx", "tx", "rx"; 1509 max-frequency = <97500000>; 1510 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1511 resets = <&cpg 312>; 1512 status = "disabled"; 1513 }; 1514 1515 sdhi2: sd@ee160000 { 1516 compatible = "renesas,sdhi-r8a7791", 1517 "renesas,rcar-gen2-sdhi"; 1518 reg = <0 0xee160000 0 0x100>; 1519 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1520 clocks = <&cpg CPG_MOD 311>; 1521 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1522 <&dmac1 0xd3>, <&dmac1 0xd4>; 1523 dma-names = "tx", "rx", "tx", "rx"; 1524 max-frequency = <97500000>; 1525 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1526 resets = <&cpg 311>; 1527 status = "disabled"; 1528 }; 1529 1530 mmcif0: mmc@ee200000 { 1531 compatible = "renesas,mmcif-r8a7791", 1532 "renesas,sh-mmcif"; 1533 reg = <0 0xee200000 0 0x80>; 1534 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1535 clocks = <&cpg CPG_MOD 315>; 1536 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1537 <&dmac1 0xd1>, <&dmac1 0xd2>; 1538 dma-names = "tx", "rx", "tx", "rx"; 1539 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1540 resets = <&cpg 315>; 1541 reg-io-width = <4>; 1542 status = "disabled"; 1543 max-frequency = <97500000>; 1544 }; 1545 1546 sata0: sata@ee300000 { 1547 compatible = "renesas,sata-r8a7791", 1548 "renesas,rcar-gen2-sata"; 1549 reg = <0 0xee300000 0 0x200000>; 1550 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 1551 clocks = <&cpg CPG_MOD 815>; 1552 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1553 resets = <&cpg 815>; 1554 status = "disabled"; 1555 }; 1556 1557 sata1: sata@ee500000 { 1558 compatible = "renesas,sata-r8a7791", 1559 "renesas,rcar-gen2-sata"; 1560 reg = <0 0xee500000 0 0x200000>; 1561 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 1562 clocks = <&cpg CPG_MOD 814>; 1563 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1564 resets = <&cpg 814>; 1565 status = "disabled"; 1566 }; 1567 1568 ether: ethernet@ee700000 { 1569 compatible = "renesas,ether-r8a7791", 1570 "renesas,rcar-gen2-ether"; 1571 reg = <0 0xee700000 0 0x400>; 1572 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1573 clocks = <&cpg CPG_MOD 813>; 1574 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1575 resets = <&cpg 813>; 1576 phy-mode = "rmii"; 1577 #address-cells = <1>; 1578 #size-cells = <0>; 1579 status = "disabled"; 1580 }; 1581 1582 gic: interrupt-controller@f1001000 { 1583 compatible = "arm,gic-400"; 1584 #interrupt-cells = <3>; 1585 #address-cells = <0>; 1586 interrupt-controller; 1587 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 1588 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 1589 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1590 clocks = <&cpg CPG_MOD 408>; 1591 clock-names = "clk"; 1592 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1593 resets = <&cpg 408>; 1594 }; 1595 1596 pciec: pcie@fe000000 { 1597 compatible = "renesas,pcie-r8a7791", 1598 "renesas,pcie-rcar-gen2"; 1599 reg = <0 0xfe000000 0 0x80000>; 1600 #address-cells = <3>; 1601 #size-cells = <2>; 1602 bus-range = <0x00 0xff>; 1603 device_type = "pci"; 1604 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1605 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1606 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1607 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1608 /* Map all possible DDR as inbound ranges */ 1609 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>, 1610 <0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; 1611 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1612 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1613 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1614 #interrupt-cells = <1>; 1615 interrupt-map-mask = <0 0 0 0>; 1616 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1617 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1618 clock-names = "pcie", "pcie_bus"; 1619 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1620 resets = <&cpg 319>; 1621 status = "disabled"; 1622 }; 1623 1624 vsp@fe928000 { 1625 compatible = "renesas,vsp1"; 1626 reg = <0 0xfe928000 0 0x8000>; 1627 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1628 clocks = <&cpg CPG_MOD 131>; 1629 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1630 resets = <&cpg 131>; 1631 }; 1632 1633 vsp@fe930000 { 1634 compatible = "renesas,vsp1"; 1635 reg = <0 0xfe930000 0 0x8000>; 1636 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1637 clocks = <&cpg CPG_MOD 128>; 1638 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1639 resets = <&cpg 128>; 1640 }; 1641 1642 vsp@fe938000 { 1643 compatible = "renesas,vsp1"; 1644 reg = <0 0xfe938000 0 0x8000>; 1645 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 1646 clocks = <&cpg CPG_MOD 127>; 1647 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1648 resets = <&cpg 127>; 1649 }; 1650 1651 fdp1@fe940000 { 1652 compatible = "renesas,fdp1"; 1653 reg = <0 0xfe940000 0 0x2400>; 1654 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 1655 clocks = <&cpg CPG_MOD 119>; 1656 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1657 resets = <&cpg 119>; 1658 }; 1659 1660 fdp1@fe944000 { 1661 compatible = "renesas,fdp1"; 1662 reg = <0 0xfe944000 0 0x2400>; 1663 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 1664 clocks = <&cpg CPG_MOD 118>; 1665 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1666 resets = <&cpg 118>; 1667 }; 1668 1669 jpu: jpeg-codec@fe980000 { 1670 compatible = "renesas,jpu-r8a7791", 1671 "renesas,rcar-gen2-jpu"; 1672 reg = <0 0xfe980000 0 0x10300>; 1673 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; 1674 clocks = <&cpg CPG_MOD 106>; 1675 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1676 resets = <&cpg 106>; 1677 }; 1678 1679 du: display@feb00000 { 1680 compatible = "renesas,du-r8a7791"; 1681 reg = <0 0xfeb00000 0 0x40000>; 1682 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1683 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1684 clocks = <&cpg CPG_MOD 724>, 1685 <&cpg CPG_MOD 723>; 1686 clock-names = "du.0", "du.1"; 1687 status = "disabled"; 1688 1689 ports { 1690 #address-cells = <1>; 1691 #size-cells = <0>; 1692 1693 port@0 { 1694 reg = <0>; 1695 du_out_rgb: endpoint { 1696 }; 1697 }; 1698 port@1 { 1699 reg = <1>; 1700 du_out_lvds0: endpoint { 1701 remote-endpoint = <&lvds0_in>; 1702 }; 1703 }; 1704 }; 1705 }; 1706 1707 lvds0: lvds@feb90000 { 1708 compatible = "renesas,r8a7791-lvds"; 1709 reg = <0 0xfeb90000 0 0x1c>; 1710 clocks = <&cpg CPG_MOD 726>; 1711 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1712 resets = <&cpg 726>; 1713 status = "disabled"; 1714 1715 ports { 1716 #address-cells = <1>; 1717 #size-cells = <0>; 1718 1719 port@0 { 1720 reg = <0>; 1721 lvds0_in: endpoint { 1722 remote-endpoint = <&du_out_lvds0>; 1723 }; 1724 }; 1725 port@1 { 1726 reg = <1>; 1727 lvds0_out: endpoint { 1728 }; 1729 }; 1730 }; 1731 }; 1732 1733 prr: chipid@ff000044 { 1734 compatible = "renesas,prr"; 1735 reg = <0 0xff000044 0 4>; 1736 }; 1737 1738 cmt0: timer@ffca0000 { 1739 compatible = "renesas,r8a7791-cmt0", 1740 "renesas,rcar-gen2-cmt0"; 1741 reg = <0 0xffca0000 0 0x1004>; 1742 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1743 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1744 clocks = <&cpg CPG_MOD 124>; 1745 clock-names = "fck"; 1746 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1747 resets = <&cpg 124>; 1748 1749 status = "disabled"; 1750 }; 1751 1752 cmt1: timer@e6130000 { 1753 compatible = "renesas,r8a7791-cmt1", 1754 "renesas,rcar-gen2-cmt1"; 1755 reg = <0 0xe6130000 0 0x1004>; 1756 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1757 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1758 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1759 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1760 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1761 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1762 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1763 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1764 clocks = <&cpg CPG_MOD 329>; 1765 clock-names = "fck"; 1766 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1767 resets = <&cpg 329>; 1768 1769 status = "disabled"; 1770 }; 1771 }; 1772 1773 thermal-zones { 1774 cpu_thermal: cpu-thermal { 1775 polling-delay-passive = <0>; 1776 polling-delay = <0>; 1777 1778 thermal-sensors = <&thermal>; 1779 1780 trips { 1781 cpu-crit { 1782 temperature = <95000>; 1783 hysteresis = <0>; 1784 type = "critical"; 1785 }; 1786 }; 1787 cooling-maps { 1788 }; 1789 }; 1790 }; 1791 1792 timer { 1793 compatible = "arm,armv7-timer"; 1794 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1795 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1796 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1797 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1798 }; 1799 1800 /* External USB clock - can be overridden by the board */ 1801 usb_extal_clk: usb_extal { 1802 compatible = "fixed-clock"; 1803 #clock-cells = <0>; 1804 clock-frequency = <48000000>; 1805 }; 1806}; 1807