1// SPDX-License-Identifier: GPL-2.0+ 2 3#include <stm32h7-u-boot.dtsi> 4 5&fmc { 6 7 /* 8 * Memory configuration from sdram datasheet IS42S32800G-6BLI 9 * first bank is bank@0 10 * second bank is bank@1 11 */ 12 bank1: bank@1 { 13 st,sdram-control = /bits/ 8 <NO_COL_9 14 NO_ROW_12 15 MWIDTH_32 16 BANKS_4 17 CAS_2 18 SDCLK_3 19 RD_BURST_EN 20 RD_PIPE_DL_0>; 21 st,sdram-timing = /bits/ 8 <TMRD_1 22 TXSR_1 23 TRAS_1 24 TRC_6 25 TRP_2 26 TWR_1 27 TRCD_1>; 28 st,sdram-refcount = <1539>; 29 }; 30}; 31 32&pinctrl { 33 fmc_pins: fmc@0 { 34 pins { 35 pinmux = <STM32_PINMUX('D', 0, AF12)>, 36 <STM32_PINMUX('D', 1, AF12)>, 37 <STM32_PINMUX('D', 8, AF12)>, 38 <STM32_PINMUX('D', 9, AF12)>, 39 <STM32_PINMUX('D',10, AF12)>, 40 <STM32_PINMUX('D',14, AF12)>, 41 <STM32_PINMUX('D',15, AF12)>, 42 43 <STM32_PINMUX('E', 0, AF12)>, 44 <STM32_PINMUX('E', 1, AF12)>, 45 <STM32_PINMUX('E', 7, AF12)>, 46 <STM32_PINMUX('E', 8, AF12)>, 47 <STM32_PINMUX('E', 9, AF12)>, 48 <STM32_PINMUX('E',10, AF12)>, 49 <STM32_PINMUX('E',11, AF12)>, 50 <STM32_PINMUX('E',12, AF12)>, 51 <STM32_PINMUX('E',13, AF12)>, 52 <STM32_PINMUX('E',14, AF12)>, 53 <STM32_PINMUX('E',15, AF12)>, 54 55 <STM32_PINMUX('F', 0, AF12)>, 56 <STM32_PINMUX('F', 1, AF12)>, 57 <STM32_PINMUX('F', 2, AF12)>, 58 <STM32_PINMUX('F', 3, AF12)>, 59 <STM32_PINMUX('F', 4, AF12)>, 60 <STM32_PINMUX('F', 5, AF12)>, 61 <STM32_PINMUX('F',11, AF12)>, 62 <STM32_PINMUX('F',12, AF12)>, 63 <STM32_PINMUX('F',13, AF12)>, 64 <STM32_PINMUX('F',14, AF12)>, 65 <STM32_PINMUX('F',15, AF12)>, 66 67 <STM32_PINMUX('G', 0, AF12)>, 68 <STM32_PINMUX('G', 1, AF12)>, 69 <STM32_PINMUX('G', 2, AF12)>, 70 <STM32_PINMUX('G', 4, AF12)>, 71 <STM32_PINMUX('G', 5, AF12)>, 72 <STM32_PINMUX('G', 8, AF12)>, 73 <STM32_PINMUX('G',15, AF12)>, 74 75 <STM32_PINMUX('H', 5, AF12)>, 76 <STM32_PINMUX('H', 6, AF12)>, 77 <STM32_PINMUX('H', 7, AF12)>, 78 <STM32_PINMUX('H', 8, AF12)>, 79 <STM32_PINMUX('H', 9, AF12)>, 80 <STM32_PINMUX('H',10, AF12)>, 81 <STM32_PINMUX('H',11, AF12)>, 82 <STM32_PINMUX('H',12, AF12)>, 83 <STM32_PINMUX('H',13, AF12)>, 84 <STM32_PINMUX('H',14, AF12)>, 85 <STM32_PINMUX('H',15, AF12)>, 86 87 <STM32_PINMUX('I', 0, AF12)>, 88 <STM32_PINMUX('I', 1, AF12)>, 89 <STM32_PINMUX('I', 2, AF12)>, 90 <STM32_PINMUX('I', 3, AF12)>, 91 <STM32_PINMUX('I', 4, AF12)>, 92 <STM32_PINMUX('I', 5, AF12)>, 93 <STM32_PINMUX('I', 6, AF12)>, 94 <STM32_PINMUX('I', 7, AF12)>, 95 <STM32_PINMUX('I', 9, AF12)>, 96 <STM32_PINMUX('I',10, AF12)>; 97 98 slew-rate = <3>; 99 }; 100 }; 101}; 102