1 /*
2  * (C) Copyright 2003
3  * Thomas.Lange@corelatus.se
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #include <common.h>
9 #include <command.h>
10 #include <asm/au1x00.h>
11 #include <asm/mipsregs.h>
12 #include <asm/io.h>
13 
initdram(int board_type)14 phys_size_t initdram(int board_type)
15 {
16 	/* Sdram is setup by assembler code */
17 	/* If memory could be changed, we should return the true value here */
18 	return 64*1024*1024;
19 }
20 
21 #define BCSR_PCMCIA_PC0DRVEN		0x0010
22 #define BCSR_PCMCIA_PC0RST		0x0080
23 
24 /* In arch/mips/cpu/cpu.c */
25 void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 );
26 
checkboard(void)27 int checkboard (void)
28 {
29 #if defined(CONFIG_IDE_PCMCIA) && 0
30 	u16 status;
31 #endif
32 	/* volatile u32 *pcmcia_bcsr = (u32*)(DB1000_BCSR_ADDR+0x10); */
33 	volatile u32 *sys_counter = (volatile u32*)SYS_COUNTER_CNTRL;
34 	u32 proc_id;
35 
36 	*sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */
37 
38 	proc_id = read_c0_prid();
39 
40 	switch (proc_id >> 24) {
41 	case 0:
42 		puts ("Board: Pb1000\n");
43 		printf ("CPU: Au1000 396 MHz, id: 0x%02x, rev: 0x%02x\n",
44 			(proc_id >> 8) & 0xFF, proc_id & 0xFF);
45 		break;
46 	case 1:
47 		puts ("Board: Pb1500\n");
48 		printf ("CPU: Au1500, id: 0x%02x, rev: 0x%02x\n",
49 			(proc_id >> 8) & 0xFF, proc_id & 0xFF);
50 		break;
51 	case 2:
52 		puts ("Board: Pb1100\n");
53 		printf ("CPU: Au1100, id: 0x%02x, rev: 0x%02x\n",
54 			(proc_id >> 8) & 0xFF, proc_id & 0xFF);
55 		break;
56 	default:
57 		printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
58 	}
59 
60 	set_io_port_base(0);
61 
62 #if defined(CONFIG_IDE_PCMCIA) && 0
63 	/* Enable 3.3 V on slot 0 ( VCC )
64 	   No 5V */
65 	status = 4;
66 	*pcmcia_bcsr = status;
67 
68 	status |= BCSR_PCMCIA_PC0DRVEN;
69 	*pcmcia_bcsr = status;
70 	au_sync();
71 
72 	udelay(300*1000);
73 
74 	status |= BCSR_PCMCIA_PC0RST;
75 	*pcmcia_bcsr = status;
76 	au_sync();
77 
78 	udelay(100*1000);
79 
80 	/* PCMCIA is on a 36 bit physical address.
81 	   We need to map it into a 32 bit addresses */
82 
83 #if 0
84 	/* We dont need theese unless we run whole pcmcia package */
85 	write_one_tlb(20,                 /* index */
86 		      0x01ffe000,         /* Pagemask, 16 MB pages */
87 		      CONFIG_SYS_PCMCIA_IO_BASE, /* Hi */
88 		      0x3C000017,         /* Lo0 */
89 		      0x3C200017);        /* Lo1 */
90 
91 	write_one_tlb(21,                   /* index */
92 		      0x01ffe000,           /* Pagemask, 16 MB pages */
93 		      CONFIG_SYS_PCMCIA_ATTR_BASE, /* Hi */
94 		      0x3D000017,           /* Lo0 */
95 		      0x3D200017);          /* Lo1 */
96 #endif	/* 0 */
97 	write_one_tlb(22,                   /* index */
98 		      0x01ffe000,           /* Pagemask, 16 MB pages */
99 		      CONFIG_SYS_PCMCIA_MEM_ADDR,  /* Hi */
100 		      0x3E000017,           /* Lo0 */
101 		      0x3E200017);          /* Lo1 */
102 #endif	/* CONFIG_IDE_PCMCIA */
103 
104 	return 0;
105 }
106