1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright 2015 Freescale Semiconductor, Inc.
4  *
5  * Author: Chunhe Lan <Chunhe.Lan@freescale.com>
6  */
7 
8 #include <common.h>
9 #include <clock_legacy.h>
10 #include <console.h>
11 #include <env_internal.h>
12 #include <init.h>
13 #include <asm/global_data.h>
14 #include <asm/spl.h>
15 #include <malloc.h>
16 #include <ns16550.h>
17 #include <nand.h>
18 #include <mmc.h>
19 #include <fsl_esdhc.h>
20 #include <i2c.h>
21 
22 #include "t4rdb.h"
23 
24 #define FSL_CORENET_CCSR_PORSR1_RCW_MASK	0xFF800000
25 
26 DECLARE_GLOBAL_DATA_PTR;
27 
get_effective_memsize(void)28 phys_size_t get_effective_memsize(void)
29 {
30 	return CONFIG_SYS_L3_SIZE;
31 }
32 
get_board_sys_clk(void)33 unsigned long get_board_sys_clk(void)
34 {
35 	return CONFIG_SYS_CLK_FREQ;
36 }
37 
get_board_ddr_clk(void)38 unsigned long get_board_ddr_clk(void)
39 {
40 	return CONFIG_DDR_CLK_FREQ;
41 }
42 
board_init_f(ulong bootflag)43 void board_init_f(ulong bootflag)
44 {
45 	u32 plat_ratio, sys_clk, ccb_clk;
46 	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
47 
48 	/* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
49 	memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
50 
51 	/* Update GD pointer */
52 	gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
53 
54 	/* compiler optimization barrier needed for GCC >= 3.4 */
55 	__asm__ __volatile__("" : : : "memory");
56 
57 	console_init_f();
58 
59 	/* initialize selected port with appropriate baud rate */
60 	sys_clk = get_board_sys_clk();
61 	plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
62 	ccb_clk = sys_clk * plat_ratio / 2;
63 
64 	ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1,
65 		     ccb_clk / 16 / CONFIG_BAUDRATE);
66 
67 	puts("\nSD boot...\n");
68 
69 	relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);
70 }
71 
board_init_r(gd_t * gd,ulong dest_addr)72 void board_init_r(gd_t *gd, ulong dest_addr)
73 {
74 	struct bd_info *bd;
75 
76 	bd = (struct bd_info *)(gd + sizeof(gd_t));
77 	memset(bd, 0, sizeof(struct bd_info));
78 	gd->bd = bd;
79 
80 	arch_cpu_init();
81 	get_clocks();
82 	mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
83 			CONFIG_SPL_RELOC_MALLOC_SIZE);
84 	gd->flags |= GD_FLG_FULL_MALLOC_INIT;
85 
86 	mmc_initialize(bd);
87 	mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
88 			   (uchar *)SPL_ENV_ADDR);
89 
90 	gd->env_addr  = (ulong)(SPL_ENV_ADDR);
91 	gd->env_valid = ENV_VALID;
92 
93 	i2c_init_all();
94 
95 	dram_init();
96 
97 	mmc_boot();
98 }
99