1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg -sroa -early-cse | FileCheck %s
3 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg -sroa -early-cse | FileCheck %s
4
5 #include <arm_mve.h>
6
7 // CHECK-LABEL: @test_vdupq_n_f16(
8 // CHECK-NEXT: entry:
9 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x half> undef, half [[A:%.*]], i32 0
10 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x half> [[DOTSPLATINSERT]], <8 x half> undef, <8 x i32> zeroinitializer
11 // CHECK-NEXT: ret <8 x half> [[DOTSPLAT]]
12 //
test_vdupq_n_f16(float16_t a)13 float16x8_t test_vdupq_n_f16(float16_t a)
14 {
15 return vdupq_n_f16(a);
16 }
17
18 // CHECK-LABEL: @test_vdupq_n_f32(
19 // CHECK-NEXT: entry:
20 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
21 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> undef, <4 x i32> zeroinitializer
22 // CHECK-NEXT: ret <4 x float> [[DOTSPLAT]]
23 //
test_vdupq_n_f32(float32_t a)24 float32x4_t test_vdupq_n_f32(float32_t a)
25 {
26 return vdupq_n_f32(a);
27 }
28
29 // CHECK-LABEL: @test_vdupq_n_s8(
30 // CHECK-NEXT: entry:
31 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <16 x i8> undef, i8 [[A:%.*]], i32 0
32 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <16 x i8> [[DOTSPLATINSERT]], <16 x i8> undef, <16 x i32> zeroinitializer
33 // CHECK-NEXT: ret <16 x i8> [[DOTSPLAT]]
34 //
test_vdupq_n_s8(int8_t a)35 int8x16_t test_vdupq_n_s8(int8_t a)
36 {
37 return vdupq_n_s8(a);
38 }
39
40 // CHECK-LABEL: @test_vdupq_n_s16(
41 // CHECK-NEXT: entry:
42 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i16> undef, i16 [[A:%.*]], i32 0
43 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x i16> [[DOTSPLATINSERT]], <8 x i16> undef, <8 x i32> zeroinitializer
44 // CHECK-NEXT: ret <8 x i16> [[DOTSPLAT]]
45 //
test_vdupq_n_s16(int16_t a)46 int16x8_t test_vdupq_n_s16(int16_t a)
47 {
48 return vdupq_n_s16(a);
49 }
50
51 // CHECK-LABEL: @test_vdupq_n_s32(
52 // CHECK-NEXT: entry:
53 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> undef, i32 [[A:%.*]], i32 0
54 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT]], <4 x i32> undef, <4 x i32> zeroinitializer
55 // CHECK-NEXT: ret <4 x i32> [[DOTSPLAT]]
56 //
test_vdupq_n_s32(int32_t a)57 int32x4_t test_vdupq_n_s32(int32_t a)
58 {
59 return vdupq_n_s32(a);
60 }
61
62 // CHECK-LABEL: @test_vdupq_n_u8(
63 // CHECK-NEXT: entry:
64 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <16 x i8> undef, i8 [[A:%.*]], i32 0
65 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <16 x i8> [[DOTSPLATINSERT]], <16 x i8> undef, <16 x i32> zeroinitializer
66 // CHECK-NEXT: ret <16 x i8> [[DOTSPLAT]]
67 //
test_vdupq_n_u8(uint8_t a)68 uint8x16_t test_vdupq_n_u8(uint8_t a)
69 {
70 return vdupq_n_u8(a);
71 }
72
73 // CHECK-LABEL: @test_vdupq_n_u16(
74 // CHECK-NEXT: entry:
75 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i16> undef, i16 [[A:%.*]], i32 0
76 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x i16> [[DOTSPLATINSERT]], <8 x i16> undef, <8 x i32> zeroinitializer
77 // CHECK-NEXT: ret <8 x i16> [[DOTSPLAT]]
78 //
test_vdupq_n_u16(uint16_t a)79 uint16x8_t test_vdupq_n_u16(uint16_t a)
80 {
81 return vdupq_n_u16(a);
82 }
83
84 // CHECK-LABEL: @test_vdupq_n_u32(
85 // CHECK-NEXT: entry:
86 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> undef, i32 [[A:%.*]], i32 0
87 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT]], <4 x i32> undef, <4 x i32> zeroinitializer
88 // CHECK-NEXT: ret <4 x i32> [[DOTSPLAT]]
89 //
test_vdupq_n_u32(uint32_t a)90 uint32x4_t test_vdupq_n_u32(uint32_t a)
91 {
92 return vdupq_n_u32(a);
93 }
94
95 // CHECK-LABEL: @test_vdupq_m_n_f16(
96 // CHECK-NEXT: entry:
97 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
98 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
99 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x half> undef, half [[A:%.*]], i32 0
100 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x half> [[DOTSPLATINSERT]], <8 x half> undef, <8 x i32> zeroinitializer
101 // CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x half> [[DOTSPLAT]], <8 x half> [[INACTIVE:%.*]]
102 // CHECK-NEXT: ret <8 x half> [[TMP2]]
103 //
test_vdupq_m_n_f16(float16x8_t inactive,float16_t a,mve_pred16_t p)104 float16x8_t test_vdupq_m_n_f16(float16x8_t inactive, float16_t a, mve_pred16_t p)
105 {
106 #ifdef POLYMORPHIC
107 return vdupq_m(inactive, a, p);
108 #else /* POLYMORPHIC */
109 return vdupq_m_n_f16(inactive, a, p);
110 #endif /* POLYMORPHIC */
111 }
112
113 // CHECK-LABEL: @test_vdupq_m_n_f32(
114 // CHECK-NEXT: entry:
115 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
116 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
117 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
118 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> undef, <4 x i32> zeroinitializer
119 // CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x float> [[DOTSPLAT]], <4 x float> [[INACTIVE:%.*]]
120 // CHECK-NEXT: ret <4 x float> [[TMP2]]
121 //
test_vdupq_m_n_f32(float32x4_t inactive,float32_t a,mve_pred16_t p)122 float32x4_t test_vdupq_m_n_f32(float32x4_t inactive, float32_t a, mve_pred16_t p)
123 {
124 #ifdef POLYMORPHIC
125 return vdupq_m(inactive, a, p);
126 #else /* POLYMORPHIC */
127 return vdupq_m_n_f32(inactive, a, p);
128 #endif /* POLYMORPHIC */
129 }
130
131 // CHECK-LABEL: @test_vdupq_m_n_s8(
132 // CHECK-NEXT: entry:
133 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
134 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
135 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <16 x i8> undef, i8 [[A:%.*]], i32 0
136 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <16 x i8> [[DOTSPLATINSERT]], <16 x i8> undef, <16 x i32> zeroinitializer
137 // CHECK-NEXT: [[TMP2:%.*]] = select <16 x i1> [[TMP1]], <16 x i8> [[DOTSPLAT]], <16 x i8> [[INACTIVE:%.*]]
138 // CHECK-NEXT: ret <16 x i8> [[TMP2]]
139 //
test_vdupq_m_n_s8(int8x16_t inactive,int8_t a,mve_pred16_t p)140 int8x16_t test_vdupq_m_n_s8(int8x16_t inactive, int8_t a, mve_pred16_t p)
141 {
142 #ifdef POLYMORPHIC
143 return vdupq_m(inactive, a, p);
144 #else /* POLYMORPHIC */
145 return vdupq_m_n_s8(inactive, a, p);
146 #endif /* POLYMORPHIC */
147 }
148
149 // CHECK-LABEL: @test_vdupq_m_n_s16(
150 // CHECK-NEXT: entry:
151 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
152 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
153 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i16> undef, i16 [[A:%.*]], i32 0
154 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x i16> [[DOTSPLATINSERT]], <8 x i16> undef, <8 x i32> zeroinitializer
155 // CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> [[DOTSPLAT]], <8 x i16> [[INACTIVE:%.*]]
156 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
157 //
test_vdupq_m_n_s16(int16x8_t inactive,int16_t a,mve_pred16_t p)158 int16x8_t test_vdupq_m_n_s16(int16x8_t inactive, int16_t a, mve_pred16_t p)
159 {
160 #ifdef POLYMORPHIC
161 return vdupq_m(inactive, a, p);
162 #else /* POLYMORPHIC */
163 return vdupq_m_n_s16(inactive, a, p);
164 #endif /* POLYMORPHIC */
165 }
166
167 // CHECK-LABEL: @test_vdupq_m_n_s32(
168 // CHECK-NEXT: entry:
169 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
170 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
171 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> undef, i32 [[A:%.*]], i32 0
172 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT]], <4 x i32> undef, <4 x i32> zeroinitializer
173 // CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[DOTSPLAT]], <4 x i32> [[INACTIVE:%.*]]
174 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
175 //
test_vdupq_m_n_s32(int32x4_t inactive,int32_t a,mve_pred16_t p)176 int32x4_t test_vdupq_m_n_s32(int32x4_t inactive, int32_t a, mve_pred16_t p)
177 {
178 #ifdef POLYMORPHIC
179 return vdupq_m(inactive, a, p);
180 #else /* POLYMORPHIC */
181 return vdupq_m_n_s32(inactive, a, p);
182 #endif /* POLYMORPHIC */
183 }
184
185 // CHECK-LABEL: @test_vdupq_m_n_u8(
186 // CHECK-NEXT: entry:
187 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
188 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
189 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <16 x i8> undef, i8 [[A:%.*]], i32 0
190 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <16 x i8> [[DOTSPLATINSERT]], <16 x i8> undef, <16 x i32> zeroinitializer
191 // CHECK-NEXT: [[TMP2:%.*]] = select <16 x i1> [[TMP1]], <16 x i8> [[DOTSPLAT]], <16 x i8> [[INACTIVE:%.*]]
192 // CHECK-NEXT: ret <16 x i8> [[TMP2]]
193 //
test_vdupq_m_n_u8(uint8x16_t inactive,uint8_t a,mve_pred16_t p)194 uint8x16_t test_vdupq_m_n_u8(uint8x16_t inactive, uint8_t a, mve_pred16_t p)
195 {
196 #ifdef POLYMORPHIC
197 return vdupq_m(inactive, a, p);
198 #else /* POLYMORPHIC */
199 return vdupq_m_n_u8(inactive, a, p);
200 #endif /* POLYMORPHIC */
201 }
202
203 // CHECK-LABEL: @test_vdupq_m_n_u16(
204 // CHECK-NEXT: entry:
205 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
206 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
207 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i16> undef, i16 [[A:%.*]], i32 0
208 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x i16> [[DOTSPLATINSERT]], <8 x i16> undef, <8 x i32> zeroinitializer
209 // CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> [[DOTSPLAT]], <8 x i16> [[INACTIVE:%.*]]
210 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
211 //
test_vdupq_m_n_u16(uint16x8_t inactive,uint16_t a,mve_pred16_t p)212 uint16x8_t test_vdupq_m_n_u16(uint16x8_t inactive, uint16_t a, mve_pred16_t p)
213 {
214 #ifdef POLYMORPHIC
215 return vdupq_m(inactive, a, p);
216 #else /* POLYMORPHIC */
217 return vdupq_m_n_u16(inactive, a, p);
218 #endif /* POLYMORPHIC */
219 }
220
221 // CHECK-LABEL: @test_vdupq_m_n_u32(
222 // CHECK-NEXT: entry:
223 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
224 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
225 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> undef, i32 [[A:%.*]], i32 0
226 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT]], <4 x i32> undef, <4 x i32> zeroinitializer
227 // CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[DOTSPLAT]], <4 x i32> [[INACTIVE:%.*]]
228 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
229 //
test_vdupq_m_n_u32(uint32x4_t inactive,uint32_t a,mve_pred16_t p)230 uint32x4_t test_vdupq_m_n_u32(uint32x4_t inactive, uint32_t a, mve_pred16_t p)
231 {
232 #ifdef POLYMORPHIC
233 return vdupq_m(inactive, a, p);
234 #else /* POLYMORPHIC */
235 return vdupq_m_n_u32(inactive, a, p);
236 #endif /* POLYMORPHIC */
237 }
238
239 // CHECK-LABEL: @test_vdupq_x_n_f16(
240 // CHECK-NEXT: entry:
241 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
242 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
243 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x half> undef, half [[A:%.*]], i32 0
244 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x half> [[DOTSPLATINSERT]], <8 x half> undef, <8 x i32> zeroinitializer
245 // CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x half> [[DOTSPLAT]], <8 x half> undef
246 // CHECK-NEXT: ret <8 x half> [[TMP2]]
247 //
test_vdupq_x_n_f16(float16_t a,mve_pred16_t p)248 float16x8_t test_vdupq_x_n_f16(float16_t a, mve_pred16_t p)
249 {
250 return vdupq_x_n_f16(a, p);
251 }
252
253 // CHECK-LABEL: @test_vdupq_x_n_f32(
254 // CHECK-NEXT: entry:
255 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
256 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
257 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
258 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> undef, <4 x i32> zeroinitializer
259 // CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x float> [[DOTSPLAT]], <4 x float> undef
260 // CHECK-NEXT: ret <4 x float> [[TMP2]]
261 //
test_vdupq_x_n_f32(float32_t a,mve_pred16_t p)262 float32x4_t test_vdupq_x_n_f32(float32_t a, mve_pred16_t p)
263 {
264 return vdupq_x_n_f32(a, p);
265 }
266
267 // CHECK-LABEL: @test_vdupq_x_n_s8(
268 // CHECK-NEXT: entry:
269 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
270 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
271 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <16 x i8> undef, i8 [[A:%.*]], i32 0
272 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <16 x i8> [[DOTSPLATINSERT]], <16 x i8> undef, <16 x i32> zeroinitializer
273 // CHECK-NEXT: [[TMP2:%.*]] = select <16 x i1> [[TMP1]], <16 x i8> [[DOTSPLAT]], <16 x i8> undef
274 // CHECK-NEXT: ret <16 x i8> [[TMP2]]
275 //
test_vdupq_x_n_s8(int8_t a,mve_pred16_t p)276 int8x16_t test_vdupq_x_n_s8(int8_t a, mve_pred16_t p)
277 {
278 return vdupq_x_n_s8(a, p);
279 }
280
281 // CHECK-LABEL: @test_vdupq_x_n_s16(
282 // CHECK-NEXT: entry:
283 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
284 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
285 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i16> undef, i16 [[A:%.*]], i32 0
286 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x i16> [[DOTSPLATINSERT]], <8 x i16> undef, <8 x i32> zeroinitializer
287 // CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> [[DOTSPLAT]], <8 x i16> undef
288 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
289 //
test_vdupq_x_n_s16(int16_t a,mve_pred16_t p)290 int16x8_t test_vdupq_x_n_s16(int16_t a, mve_pred16_t p)
291 {
292 return vdupq_x_n_s16(a, p);
293 }
294
295 // CHECK-LABEL: @test_vdupq_x_n_s32(
296 // CHECK-NEXT: entry:
297 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
298 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
299 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> undef, i32 [[A:%.*]], i32 0
300 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT]], <4 x i32> undef, <4 x i32> zeroinitializer
301 // CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[DOTSPLAT]], <4 x i32> undef
302 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
303 //
test_vdupq_x_n_s32(int32_t a,mve_pred16_t p)304 int32x4_t test_vdupq_x_n_s32(int32_t a, mve_pred16_t p)
305 {
306 return vdupq_x_n_s32(a, p);
307 }
308
309 // CHECK-LABEL: @test_vdupq_x_n_u8(
310 // CHECK-NEXT: entry:
311 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
312 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
313 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <16 x i8> undef, i8 [[A:%.*]], i32 0
314 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <16 x i8> [[DOTSPLATINSERT]], <16 x i8> undef, <16 x i32> zeroinitializer
315 // CHECK-NEXT: [[TMP2:%.*]] = select <16 x i1> [[TMP1]], <16 x i8> [[DOTSPLAT]], <16 x i8> undef
316 // CHECK-NEXT: ret <16 x i8> [[TMP2]]
317 //
test_vdupq_x_n_u8(uint8_t a,mve_pred16_t p)318 uint8x16_t test_vdupq_x_n_u8(uint8_t a, mve_pred16_t p)
319 {
320 return vdupq_x_n_u8(a, p);
321 }
322
323 // CHECK-LABEL: @test_vdupq_x_n_u16(
324 // CHECK-NEXT: entry:
325 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
326 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
327 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i16> undef, i16 [[A:%.*]], i32 0
328 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x i16> [[DOTSPLATINSERT]], <8 x i16> undef, <8 x i32> zeroinitializer
329 // CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> [[DOTSPLAT]], <8 x i16> undef
330 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
331 //
test_vdupq_x_n_u16(uint16_t a,mve_pred16_t p)332 uint16x8_t test_vdupq_x_n_u16(uint16_t a, mve_pred16_t p)
333 {
334 return vdupq_x_n_u16(a, p);
335 }
336
337 // CHECK-LABEL: @test_vdupq_x_n_u32(
338 // CHECK-NEXT: entry:
339 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
340 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
341 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> undef, i32 [[A:%.*]], i32 0
342 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT]], <4 x i32> undef, <4 x i32> zeroinitializer
343 // CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[DOTSPLAT]], <4 x i32> undef
344 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
345 //
test_vdupq_x_n_u32(uint32_t a,mve_pred16_t p)346 uint32x4_t test_vdupq_x_n_u32(uint32_t a, mve_pred16_t p)
347 {
348 return vdupq_x_n_u32(a, p);
349 }
350
351