1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
3 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
4
5 #include <arm_mve.h>
6
7 // CHECK-LABEL: @test_vcmlaq_f16(
8 // CHECK-NEXT: entry:
9 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vcmlaq.v8f16(i32 0, <8 x half> [[A:%.*]], <8 x half> [[B:%.*]], <8 x half> [[C:%.*]])
10 // CHECK-NEXT: ret <8 x half> [[TMP0]]
11 //
test_vcmlaq_f16(float16x8_t a,float16x8_t b,float16x8_t c)12 float16x8_t test_vcmlaq_f16(float16x8_t a, float16x8_t b, float16x8_t c)
13 {
14 #ifdef POLYMORPHIC
15 return vcmlaq(a, b, c);
16 #else
17 return vcmlaq_f16(a, b, c);
18 #endif
19 }
20
21 // CHECK-LABEL: @test_vcmlaq_f32(
22 // CHECK-NEXT: entry:
23 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vcmlaq.v4f32(i32 0, <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]])
24 // CHECK-NEXT: ret <4 x float> [[TMP0]]
25 //
test_vcmlaq_f32(float32x4_t a,float32x4_t b,float32x4_t c)26 float32x4_t test_vcmlaq_f32(float32x4_t a, float32x4_t b, float32x4_t c)
27 {
28 #ifdef POLYMORPHIC
29 return vcmlaq(a, b, c);
30 #else
31 return vcmlaq_f32(a, b, c);
32 #endif
33 }
34
35 // CHECK-LABEL: @test_vcmlaq_rot90_f16(
36 // CHECK-NEXT: entry:
37 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vcmlaq.v8f16(i32 1, <8 x half> [[A:%.*]], <8 x half> [[B:%.*]], <8 x half> [[C:%.*]])
38 // CHECK-NEXT: ret <8 x half> [[TMP0]]
39 //
test_vcmlaq_rot90_f16(float16x8_t a,float16x8_t b,float16x8_t c)40 float16x8_t test_vcmlaq_rot90_f16(float16x8_t a, float16x8_t b, float16x8_t c)
41 {
42 #ifdef POLYMORPHIC
43 return vcmlaq_rot90(a, b, c);
44 #else
45 return vcmlaq_rot90_f16(a, b, c);
46 #endif
47 }
48
49 // CHECK-LABEL: @test_vcmlaq_rot90_f32(
50 // CHECK-NEXT: entry:
51 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vcmlaq.v4f32(i32 1, <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]])
52 // CHECK-NEXT: ret <4 x float> [[TMP0]]
53 //
test_vcmlaq_rot90_f32(float32x4_t a,float32x4_t b,float32x4_t c)54 float32x4_t test_vcmlaq_rot90_f32(float32x4_t a, float32x4_t b, float32x4_t c)
55 {
56 #ifdef POLYMORPHIC
57 return vcmlaq_rot90(a, b, c);
58 #else
59 return vcmlaq_rot90_f32(a, b, c);
60 #endif
61 }
62
63 // CHECK-LABEL: @test_vcmlaq_rot180_f16(
64 // CHECK-NEXT: entry:
65 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vcmlaq.v8f16(i32 2, <8 x half> [[A:%.*]], <8 x half> [[B:%.*]], <8 x half> [[C:%.*]])
66 // CHECK-NEXT: ret <8 x half> [[TMP0]]
67 //
test_vcmlaq_rot180_f16(float16x8_t a,float16x8_t b,float16x8_t c)68 float16x8_t test_vcmlaq_rot180_f16(float16x8_t a, float16x8_t b, float16x8_t c)
69 {
70 #ifdef POLYMORPHIC
71 return vcmlaq_rot180(a, b, c);
72 #else
73 return vcmlaq_rot180_f16(a, b, c);
74 #endif
75 }
76
77 // CHECK-LABEL: @test_vcmlaq_rot180_f32(
78 // CHECK-NEXT: entry:
79 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vcmlaq.v4f32(i32 2, <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]])
80 // CHECK-NEXT: ret <4 x float> [[TMP0]]
81 //
test_vcmlaq_rot180_f32(float32x4_t a,float32x4_t b,float32x4_t c)82 float32x4_t test_vcmlaq_rot180_f32(float32x4_t a, float32x4_t b, float32x4_t c)
83 {
84 #ifdef POLYMORPHIC
85 return vcmlaq_rot180(a, b, c);
86 #else
87 return vcmlaq_rot180_f32(a, b, c);
88 #endif
89 }
90
91 // CHECK-LABEL: @test_vcmlaq_rot270_f16(
92 // CHECK-NEXT: entry:
93 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vcmlaq.v8f16(i32 3, <8 x half> [[A:%.*]], <8 x half> [[B:%.*]], <8 x half> [[C:%.*]])
94 // CHECK-NEXT: ret <8 x half> [[TMP0]]
95 //
test_vcmlaq_rot270_f16(float16x8_t a,float16x8_t b,float16x8_t c)96 float16x8_t test_vcmlaq_rot270_f16(float16x8_t a, float16x8_t b, float16x8_t c)
97 {
98 #ifdef POLYMORPHIC
99 return vcmlaq_rot270(a, b, c);
100 #else
101 return vcmlaq_rot270_f16(a, b, c);
102 #endif
103 }
104
105 // CHECK-LABEL: @test_vcmlaq_rot270_f32(
106 // CHECK-NEXT: entry:
107 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vcmlaq.v4f32(i32 3, <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]])
108 // CHECK-NEXT: ret <4 x float> [[TMP0]]
109 //
test_vcmlaq_rot270_f32(float32x4_t a,float32x4_t b,float32x4_t c)110 float32x4_t test_vcmlaq_rot270_f32(float32x4_t a, float32x4_t b, float32x4_t c)
111 {
112 #ifdef POLYMORPHIC
113 return vcmlaq_rot270(a, b, c);
114 #else
115 return vcmlaq_rot270_f32(a, b, c);
116 #endif
117 }
118
119 // CHECK-LABEL: @test_vcmlaq_m_f16(
120 // CHECK-NEXT: entry:
121 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
122 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
123 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcmlaq.predicated.v8f16.v8i1(i32 0, <8 x half> [[A:%.*]], <8 x half> [[B:%.*]], <8 x half> [[C:%.*]], <8 x i1> [[TMP1]])
124 // CHECK-NEXT: ret <8 x half> [[TMP2]]
125 //
test_vcmlaq_m_f16(float16x8_t a,float16x8_t b,float16x8_t c,mve_pred16_t p)126 float16x8_t test_vcmlaq_m_f16(float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
127 {
128 #ifdef POLYMORPHIC
129 return vcmlaq_m(a, b, c, p);
130 #else
131 return vcmlaq_m_f16(a, b, c, p);
132 #endif
133 }
134
135 // CHECK-LABEL: @test_vcmlaq_m_f32(
136 // CHECK-NEXT: entry:
137 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
138 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
139 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcmlaq.predicated.v4f32.v4i1(i32 0, <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]], <4 x i1> [[TMP1]])
140 // CHECK-NEXT: ret <4 x float> [[TMP2]]
141 //
test_vcmlaq_m_f32(float32x4_t a,float32x4_t b,float32x4_t c,mve_pred16_t p)142 float32x4_t test_vcmlaq_m_f32(float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
143 {
144 #ifdef POLYMORPHIC
145 return vcmlaq_m(a, b, c, p);
146 #else
147 return vcmlaq_m_f32(a, b, c, p);
148 #endif
149 }
150
151 // CHECK-LABEL: @test_vcmlaq_rot90_m_f16(
152 // CHECK-NEXT: entry:
153 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
154 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
155 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcmlaq.predicated.v8f16.v8i1(i32 1, <8 x half> [[A:%.*]], <8 x half> [[B:%.*]], <8 x half> [[C:%.*]], <8 x i1> [[TMP1]])
156 // CHECK-NEXT: ret <8 x half> [[TMP2]]
157 //
test_vcmlaq_rot90_m_f16(float16x8_t a,float16x8_t b,float16x8_t c,mve_pred16_t p)158 float16x8_t test_vcmlaq_rot90_m_f16(float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
159 {
160 #ifdef POLYMORPHIC
161 return vcmlaq_rot90_m(a, b, c, p);
162 #else
163 return vcmlaq_rot90_m_f16(a, b, c, p);
164 #endif
165 }
166
167 // CHECK-LABEL: @test_vcmlaq_rot90_m_f32(
168 // CHECK-NEXT: entry:
169 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
170 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
171 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcmlaq.predicated.v4f32.v4i1(i32 1, <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]], <4 x i1> [[TMP1]])
172 // CHECK-NEXT: ret <4 x float> [[TMP2]]
173 //
test_vcmlaq_rot90_m_f32(float32x4_t a,float32x4_t b,float32x4_t c,mve_pred16_t p)174 float32x4_t test_vcmlaq_rot90_m_f32(float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
175 {
176 #ifdef POLYMORPHIC
177 return vcmlaq_rot90_m(a, b, c, p);
178 #else
179 return vcmlaq_rot90_m_f32(a, b, c, p);
180 #endif
181 }
182
183 // CHECK-LABEL: @test_vcmlaq_rot180_m_f16(
184 // CHECK-NEXT: entry:
185 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
186 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
187 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcmlaq.predicated.v8f16.v8i1(i32 2, <8 x half> [[A:%.*]], <8 x half> [[B:%.*]], <8 x half> [[C:%.*]], <8 x i1> [[TMP1]])
188 // CHECK-NEXT: ret <8 x half> [[TMP2]]
189 //
test_vcmlaq_rot180_m_f16(float16x8_t a,float16x8_t b,float16x8_t c,mve_pred16_t p)190 float16x8_t test_vcmlaq_rot180_m_f16(float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
191 {
192 #ifdef POLYMORPHIC
193 return vcmlaq_rot180_m(a, b, c, p);
194 #else
195 return vcmlaq_rot180_m_f16(a, b, c, p);
196 #endif
197 }
198
199 // CHECK-LABEL: @test_vcmlaq_rot180_m_f32(
200 // CHECK-NEXT: entry:
201 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
202 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
203 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcmlaq.predicated.v4f32.v4i1(i32 2, <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]], <4 x i1> [[TMP1]])
204 // CHECK-NEXT: ret <4 x float> [[TMP2]]
205 //
test_vcmlaq_rot180_m_f32(float32x4_t a,float32x4_t b,float32x4_t c,mve_pred16_t p)206 float32x4_t test_vcmlaq_rot180_m_f32(float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
207 {
208 #ifdef POLYMORPHIC
209 return vcmlaq_rot180_m(a, b, c, p);
210 #else
211 return vcmlaq_rot180_m_f32(a, b, c, p);
212 #endif
213 }
214
215 // CHECK-LABEL: @test_vcmlaq_rot270_m_f16(
216 // CHECK-NEXT: entry:
217 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
218 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
219 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcmlaq.predicated.v8f16.v8i1(i32 3, <8 x half> [[A:%.*]], <8 x half> [[B:%.*]], <8 x half> [[C:%.*]], <8 x i1> [[TMP1]])
220 // CHECK-NEXT: ret <8 x half> [[TMP2]]
221 //
test_vcmlaq_rot270_m_f16(float16x8_t a,float16x8_t b,float16x8_t c,mve_pred16_t p)222 float16x8_t test_vcmlaq_rot270_m_f16(float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
223 {
224 #ifdef POLYMORPHIC
225 return vcmlaq_rot270_m(a, b, c, p);
226 #else
227 return vcmlaq_rot270_m_f16(a, b, c, p);
228 #endif
229 }
230
231 // CHECK-LABEL: @test_vcmlaq_rot270_m_f32(
232 // CHECK-NEXT: entry:
233 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
234 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
235 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcmlaq.predicated.v4f32.v4i1(i32 3, <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]], <4 x i1> [[TMP1]])
236 // CHECK-NEXT: ret <4 x float> [[TMP2]]
237 //
test_vcmlaq_rot270_m_f32(float32x4_t a,float32x4_t b,float32x4_t c,mve_pred16_t p)238 float32x4_t test_vcmlaq_rot270_m_f32(float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
239 {
240 #ifdef POLYMORPHIC
241 return vcmlaq_rot270_m(a, b, c, p);
242 #else
243 return vcmlaq_rot270_m_f32(a, b, c, p);
244 #endif
245 }
246
247