1 /*===-------------------------------------------------------------------------- 2 * ATMI (Asynchronous Task and Memory Interface) 3 * 4 * This file is distributed under the MIT License. See LICENSE.txt for details. 5 *===------------------------------------------------------------------------*/ 6 #ifndef INCLUDE_ATMI_H_ 7 #define INCLUDE_ATMI_H_ 8 9 #define ROCM_VERSION_MAJOR 3 10 #define ROCM_VERSION_MINOR 2 11 12 /** \defgroup enumerations Enumerated Types 13 * @{ 14 */ 15 16 /** 17 * @brief Status codes. 18 */ 19 typedef enum atmi_status_t { 20 /** 21 * The function has been executed successfully. 22 */ 23 ATMI_STATUS_SUCCESS = 0, 24 /** 25 * A undocumented error has occurred. 26 */ 27 ATMI_STATUS_UNKNOWN = 1, 28 /** 29 * A generic error has occurred. 30 */ 31 ATMI_STATUS_ERROR = 2, 32 } atmi_status_t; 33 34 /** 35 * @brief Device Types. 36 */ 37 typedef enum atmi_devtype_s { 38 ATMI_DEVTYPE_CPU = 0x0001, 39 ATMI_DEVTYPE_iGPU = 0x0010, // Integrated GPU 40 ATMI_DEVTYPE_dGPU = 0x0100, // Discrete GPU 41 ATMI_DEVTYPE_GPU = ATMI_DEVTYPE_iGPU | ATMI_DEVTYPE_dGPU, // Any GPU 42 ATMI_DEVTYPE_ALL = 0x111 // Union of all device types 43 } atmi_devtype_t; 44 45 /** 46 * @brief Memory Access Type. 47 */ 48 typedef enum atmi_memtype_s { 49 ATMI_MEMTYPE_FINE_GRAINED = 0, 50 ATMI_MEMTYPE_COARSE_GRAINED = 1, 51 ATMI_MEMTYPE_ANY 52 } atmi_memtype_t; 53 54 /** 55 * @brief ATMI Memory Fences for Tasks. 56 */ 57 typedef enum atmi_task_fence_scope_s { 58 /** 59 * No memory fence applied; external fences have to be applied around the task 60 * launch/completion. 61 */ 62 ATMI_FENCE_SCOPE_NONE = 0, 63 /** 64 * The fence is applied to the device. 65 */ 66 ATMI_FENCE_SCOPE_DEVICE = 1, 67 /** 68 * The fence is applied to the entire system. 69 */ 70 ATMI_FENCE_SCOPE_SYSTEM = 2 71 } atmi_task_fence_scope_t; 72 73 /** @} */ 74 75 /** \defgroup common Common ATMI Structures 76 * @{ 77 */ 78 79 /** 80 * @brief ATMI Compute Place 81 */ 82 typedef struct atmi_place_s { 83 /** 84 * The node in a cluster where computation should occur. 85 * Default is node_id = 0 for local computations. 86 */ 87 unsigned int node_id; 88 /** 89 * Device type: CPU, GPU or DSP 90 */ 91 atmi_devtype_t type; 92 /** 93 * The device ordinal number ordered by runtime; -1 for any 94 */ 95 int device_id; 96 } atmi_place_t; 97 98 /** 99 * @brief ATMI Memory Place 100 */ 101 typedef struct atmi_mem_place_s { 102 /** 103 * The node in a cluster where computation should occur. 104 * Default is node_id = 0 for local computations. 105 */ 106 unsigned int node_id; 107 /** 108 * Device type: CPU, GPU or DSP 109 */ 110 atmi_devtype_t dev_type; 111 /** 112 * The device ordinal number ordered by runtime; -1 for any 113 */ 114 int dev_id; 115 // atmi_memtype_t mem_type; // Fine grained or Coarse grained 116 /** 117 * The memory space/region ordinal number ordered by runtime; -1 for any 118 */ 119 int mem_id; 120 } atmi_mem_place_t; 121 122 /** 123 * @brief ATMI Memory Space/region Structure 124 */ 125 typedef struct atmi_memory_s { 126 /** 127 * Memory capacity 128 */ 129 unsigned long int capacity; 130 /** 131 * Memory type 132 */ 133 atmi_memtype_t type; 134 } atmi_memory_t; 135 136 /** 137 * @brief ATMI Device Structure 138 */ 139 typedef struct atmi_device_s { 140 /** 141 * Device type: CPU, GPU or DSP 142 */ 143 atmi_devtype_t type; 144 /** 145 * Array of memory spaces/regions that are accessible 146 * from this device. 147 */ 148 atmi_memory_t *memories; 149 } atmi_device_t; 150 151 /** 152 * @brief ATMI Machine Structure 153 */ 154 typedef struct atmi_machine_s { 155 /** 156 * The number of devices categorized by the device type 157 */ 158 unsigned int device_count_by_type[ATMI_DEVTYPE_ALL]; 159 /** 160 * The device structures categorized by the device type 161 */ 162 atmi_device_t *devices_by_type[ATMI_DEVTYPE_ALL]; 163 } atmi_machine_t; 164 165 // Below are some helper macros that can be used to setup 166 // some of the ATMI data structures. 167 #define ATMI_PLACE_CPU(node, cpu_id) \ 168 { .node_id = node, .type = ATMI_DEVTYPE_CPU, .device_id = cpu_id } 169 #define ATMI_PLACE_GPU(node, gpu_id) \ 170 { .node_id = node, .type = ATMI_DEVTYPE_GPU, .device_id = gpu_id } 171 #define ATMI_MEM_PLACE_CPU(node, cpu_id) \ 172 { \ 173 .node_id = node, .dev_type = ATMI_DEVTYPE_CPU, .dev_id = cpu_id, \ 174 .mem_id = -1 \ 175 } 176 #define ATMI_MEM_PLACE_GPU(node, gpu_id) \ 177 { \ 178 .node_id = node, .dev_type = ATMI_DEVTYPE_GPU, .dev_id = gpu_id, \ 179 .mem_id = -1 \ 180 } 181 #define ATMI_MEM_PLACE_CPU_MEM(node, cpu_id, cpu_mem_id) \ 182 { \ 183 .node_id = node, .dev_type = ATMI_DEVTYPE_CPU, .dev_id = cpu_id, \ 184 .mem_id = cpu_mem_id \ 185 } 186 #define ATMI_MEM_PLACE_GPU_MEM(node, gpu_id, gpu_mem_id) \ 187 { \ 188 .node_id = node, .dev_type = ATMI_DEVTYPE_GPU, .dev_id = gpu_id, \ 189 .mem_id = gpu_mem_id \ 190 } 191 #define ATMI_MEM_PLACE(d_type, d_id, m_id) \ 192 { .node_id = 0, .dev_type = d_type, .dev_id = d_id, .mem_id = m_id } 193 194 #endif // INCLUDE_ATMI_H_ 195