1 // Copyright (c) 2012 The Chromium Authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 #include "base/cpu.h"
6
7 #include <limits.h>
8 #include <stddef.h>
9 #include <stdint.h>
10 #include <string.h>
11
12 #include <algorithm>
13 #include <utility>
14
15 #include "base/stl_util.h"
16
17 #if defined(ARCH_CPU_ARM_FAMILY) && (defined(OS_ANDROID) || defined(OS_LINUX))
18 #include "base/files/file_util.h"
19 #endif
20
21 #if defined(ARCH_CPU_X86_FAMILY)
22 #if defined(COMPILER_MSVC)
23 #include <intrin.h>
24 #include <immintrin.h> // For _xgetbv()
25 #endif
26 #endif
27
28 namespace base {
29
30 #if defined(ARCH_CPU_X86_FAMILY)
31 namespace internal {
32
ComputeX86FamilyAndModel(const std::string & vendor,int signature)33 std::tuple<int, int, int, int> ComputeX86FamilyAndModel(
34 const std::string& vendor,
35 int signature) {
36 int family = (signature >> 8) & 0xf;
37 int model = (signature >> 4) & 0xf;
38 int ext_family = 0;
39 int ext_model = 0;
40
41 // The "Intel 64 and IA-32 Architectures Developer's Manual: Vol. 2A"
42 // specifies the Extended Model is defined only when the Base Family is
43 // 06h or 0Fh.
44 // The "AMD CPUID Specification" specifies that the Extended Model is
45 // defined only when Base Family is 0Fh.
46 // Both manuals define the display model as
47 // {ExtendedModel[3:0],BaseModel[3:0]} in that case.
48 if (family == 0xf || (family == 0x6 && vendor == "GenuineIntel")) {
49 ext_model = (signature >> 16) & 0xf;
50 model += ext_model << 4;
51 }
52 // Both the "Intel 64 and IA-32 Architectures Developer's Manual: Vol. 2A"
53 // and the "AMD CPUID Specification" specify that the Extended Family is
54 // defined only when the Base Family is 0Fh.
55 // Both manuals define the display family as {0000b,BaseFamily[3:0]} +
56 // ExtendedFamily[7:0] in that case.
57 if (family == 0xf) {
58 ext_family = (signature >> 20) & 0xff;
59 family += ext_family;
60 }
61
62 return {family, model, ext_family, ext_model};
63 }
64
65 } // namespace internal
66 #endif // defined(ARCH_CPU_X86_FAMILY)
67
CPU()68 CPU::CPU()
69 : signature_(0),
70 type_(0),
71 family_(0),
72 model_(0),
73 stepping_(0),
74 ext_model_(0),
75 ext_family_(0),
76 has_mmx_(false),
77 has_sse_(false),
78 has_sse2_(false),
79 has_sse3_(false),
80 has_ssse3_(false),
81 has_sse41_(false),
82 has_sse42_(false),
83 has_popcnt_(false),
84 has_avx_(false),
85 has_avx2_(false),
86 has_aesni_(false),
87 has_non_stop_time_stamp_counter_(false),
88 is_running_in_vm_(false),
89 cpu_vendor_("unknown") {
90 Initialize();
91 }
92
93 namespace {
94
95 #if defined(ARCH_CPU_X86_FAMILY)
96 #if !defined(COMPILER_MSVC)
97
98 #if defined(__pic__) && defined(__i386__)
99
__cpuid(int cpu_info[4],int info_type)100 void __cpuid(int cpu_info[4], int info_type) {
101 __asm__ volatile(
102 "mov %%ebx, %%edi\n"
103 "cpuid\n"
104 "xchg %%edi, %%ebx\n"
105 : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]),
106 "=d"(cpu_info[3])
107 : "a"(info_type), "c"(0));
108 }
109
110 #else
111
112 void __cpuid(int cpu_info[4], int info_type) {
113 __asm__ volatile("cpuid\n"
114 : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]),
115 "=d"(cpu_info[3])
116 : "a"(info_type), "c"(0));
117 }
118
119 #endif
120 #endif // !defined(COMPILER_MSVC)
121
122 // xgetbv returns the value of an Intel Extended Control Register (XCR).
123 // Currently only XCR0 is defined by Intel so |xcr| should always be zero.
xgetbv(uint32_t xcr)124 uint64_t xgetbv(uint32_t xcr) {
125 #if defined(COMPILER_MSVC)
126 return _xgetbv(xcr);
127 #else
128 uint32_t eax, edx;
129
130 __asm__ volatile (
131 "xgetbv" : "=a"(eax), "=d"(edx) : "c"(xcr));
132 return (static_cast<uint64_t>(edx) << 32) | eax;
133 #endif // defined(COMPILER_MSVC)
134 }
135
136 #endif // ARCH_CPU_X86_FAMILY
137
138 #if defined(ARCH_CPU_ARM_FAMILY) && (defined(OS_ANDROID) || defined(OS_LINUX))
CpuInfoBrand()139 std::string* CpuInfoBrand() {
140 static std::string* brand = []() {
141 // This function finds the value from /proc/cpuinfo under the key "model
142 // name" or "Processor". "model name" is used in Linux 3.8 and later (3.7
143 // and later for arm64) and is shown once per CPU. "Processor" is used in
144 // earler versions and is shown only once at the top of /proc/cpuinfo
145 // regardless of the number CPUs.
146 const char kModelNamePrefix[] = "model name\t: ";
147 const char kProcessorPrefix[] = "Processor\t: ";
148
149 std::string contents;
150 ReadFileToString(FilePath("/proc/cpuinfo"), &contents);
151 DCHECK(!contents.empty());
152
153 std::istringstream iss(contents);
154 std::string line;
155 while (std::getline(iss, line)) {
156 if (line.compare(0, strlen(kModelNamePrefix), kModelNamePrefix) == 0)
157 return new std::string(line.substr(strlen(kModelNamePrefix)));
158 if (line.compare(0, strlen(kProcessorPrefix), kProcessorPrefix) == 0)
159 return new std::string(line.substr(strlen(kProcessorPrefix)));
160 }
161
162 return new std::string();
163 }();
164
165 return brand;
166 }
167 #endif // defined(ARCH_CPU_ARM_FAMILY) && (defined(OS_ANDROID) ||
168 // defined(OS_LINUX))
169
170 } // namespace
171
Initialize()172 void CPU::Initialize() {
173 #if defined(ARCH_CPU_X86_FAMILY)
174 int cpu_info[4] = {-1};
175 // This array is used to temporarily hold the vendor name and then the brand
176 // name. Thus it has to be big enough for both use cases. There are
177 // static_asserts below for each of the use cases to make sure this array is
178 // big enough.
179 char cpu_string[sizeof(cpu_info) * 3 + 1];
180
181 // __cpuid with an InfoType argument of 0 returns the number of
182 // valid Ids in CPUInfo[0] and the CPU identification string in
183 // the other three array elements. The CPU identification string is
184 // not in linear order. The code below arranges the information
185 // in a human readable form. The human readable order is CPUInfo[1] |
186 // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped
187 // before using memcpy() to copy these three array elements to |cpu_string|.
188 __cpuid(cpu_info, 0);
189 int num_ids = cpu_info[0];
190 std::swap(cpu_info[2], cpu_info[3]);
191 static constexpr size_t kVendorNameSize = 3 * sizeof(cpu_info[1]);
192 static_assert(kVendorNameSize < base::size(cpu_string),
193 "cpu_string too small");
194 memcpy(cpu_string, &cpu_info[1], kVendorNameSize);
195 cpu_string[kVendorNameSize] = '\0';
196 cpu_vendor_ = cpu_string;
197
198 // Interpret CPU feature information.
199 if (num_ids > 0) {
200 int cpu_info7[4] = {0};
201 __cpuid(cpu_info, 1);
202 if (num_ids >= 7) {
203 __cpuid(cpu_info7, 7);
204 }
205 signature_ = cpu_info[0];
206 stepping_ = cpu_info[0] & 0xf;
207 type_ = (cpu_info[0] >> 12) & 0x3;
208 std::tie(family_, model_, ext_family_, ext_model_) =
209 internal::ComputeX86FamilyAndModel(cpu_vendor_, signature_);
210 has_mmx_ = (cpu_info[3] & 0x00800000) != 0;
211 has_sse_ = (cpu_info[3] & 0x02000000) != 0;
212 has_sse2_ = (cpu_info[3] & 0x04000000) != 0;
213 has_sse3_ = (cpu_info[2] & 0x00000001) != 0;
214 has_ssse3_ = (cpu_info[2] & 0x00000200) != 0;
215 has_sse41_ = (cpu_info[2] & 0x00080000) != 0;
216 has_sse42_ = (cpu_info[2] & 0x00100000) != 0;
217 has_popcnt_ = (cpu_info[2] & 0x00800000) != 0;
218
219 // "Hypervisor Present Bit: Bit 31 of ECX of CPUID leaf 0x1."
220 // See https://lwn.net/Articles/301888/
221 // This is checking for any hypervisor. Hypervisors may choose not to
222 // announce themselves. Hypervisors trap CPUID and sometimes return
223 // different results to underlying hardware.
224 is_running_in_vm_ = (cpu_info[2] & 0x80000000) != 0;
225
226 // AVX instructions will generate an illegal instruction exception unless
227 // a) they are supported by the CPU,
228 // b) XSAVE is supported by the CPU and
229 // c) XSAVE is enabled by the kernel.
230 // See http://software.intel.com/en-us/blogs/2011/04/14/is-avx-enabled
231 //
232 // In addition, we have observed some crashes with the xgetbv instruction
233 // even after following Intel's example code. (See crbug.com/375968.)
234 // Because of that, we also test the XSAVE bit because its description in
235 // the CPUID documentation suggests that it signals xgetbv support.
236 has_avx_ =
237 (cpu_info[2] & 0x10000000) != 0 &&
238 (cpu_info[2] & 0x04000000) != 0 /* XSAVE */ &&
239 (cpu_info[2] & 0x08000000) != 0 /* OSXSAVE */ &&
240 (xgetbv(0) & 6) == 6 /* XSAVE enabled by kernel */;
241 has_aesni_ = (cpu_info[2] & 0x02000000) != 0;
242 has_avx2_ = has_avx_ && (cpu_info7[1] & 0x00000020) != 0;
243 }
244
245 // Get the brand string of the cpu.
246 __cpuid(cpu_info, 0x80000000);
247 const int max_parameter = cpu_info[0];
248
249 static constexpr int kParameterStart = 0x80000002;
250 static constexpr int kParameterEnd = 0x80000004;
251 static constexpr int kParameterSize = kParameterEnd - kParameterStart + 1;
252 static_assert(kParameterSize * sizeof(cpu_info) + 1 == base::size(cpu_string),
253 "cpu_string has wrong size");
254
255 if (max_parameter >= kParameterEnd) {
256 size_t i = 0;
257 for (int parameter = kParameterStart; parameter <= kParameterEnd;
258 ++parameter) {
259 __cpuid(cpu_info, parameter);
260 memcpy(&cpu_string[i], cpu_info, sizeof(cpu_info));
261 i += sizeof(cpu_info);
262 }
263 cpu_string[i] = '\0';
264 cpu_brand_ = cpu_string;
265 }
266
267 static constexpr int kParameterContainingNonStopTimeStampCounter = 0x80000007;
268 if (max_parameter >= kParameterContainingNonStopTimeStampCounter) {
269 __cpuid(cpu_info, kParameterContainingNonStopTimeStampCounter);
270 has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0;
271 }
272
273 if (!has_non_stop_time_stamp_counter_ && is_running_in_vm_) {
274 int cpu_info_hv[4] = {};
275 __cpuid(cpu_info_hv, 0x40000000);
276 if (cpu_info_hv[1] == 0x7263694D && // Micr
277 cpu_info_hv[2] == 0x666F736F && // osof
278 cpu_info_hv[3] == 0x76482074) { // t Hv
279 // If CPUID says we have a variant TSC and a hypervisor has identified
280 // itself and the hypervisor says it is Microsoft Hyper-V, then treat
281 // TSC as invariant.
282 //
283 // Microsoft Hyper-V hypervisor reports variant TSC as there are some
284 // scenarios (eg. VM live migration) where the TSC is variant, but for
285 // our purposes we can treat it as invariant.
286 has_non_stop_time_stamp_counter_ = true;
287 }
288 }
289 #elif defined(ARCH_CPU_ARM_FAMILY)
290 #if (defined(OS_ANDROID) || defined(OS_LINUX))
291 cpu_brand_ = *CpuInfoBrand();
292 #elif defined(OS_WIN)
293 // Windows makes high-resolution thread timing information available in
294 // user-space.
295 has_non_stop_time_stamp_counter_ = true;
296 #endif
297 #endif
298 }
299
GetIntelMicroArchitecture() const300 CPU::IntelMicroArchitecture CPU::GetIntelMicroArchitecture() const {
301 if (has_avx2()) return AVX2;
302 if (has_avx()) return AVX;
303 if (has_sse42()) return SSE42;
304 if (has_sse41()) return SSE41;
305 if (has_ssse3()) return SSSE3;
306 if (has_sse3()) return SSE3;
307 if (has_sse2()) return SSE2;
308 if (has_sse()) return SSE;
309 return PENTIUM;
310 }
311
312 } // namespace base
313