1*38fd1498Szrj;; Copyright (C) 2012-2018 Free Software Foundation, Inc. 2*38fd1498Szrj;; 3*38fd1498Szrj;; This file is part of GCC. 4*38fd1498Szrj;; 5*38fd1498Szrj;; GCC is free software; you can redistribute it and/or modify 6*38fd1498Szrj;; it under the terms of the GNU General Public License as published by 7*38fd1498Szrj;; the Free Software Foundation; either version 3, or (at your option) 8*38fd1498Szrj;; any later version. 9*38fd1498Szrj;; 10*38fd1498Szrj;; GCC is distributed in the hope that it will be useful, 11*38fd1498Szrj;; but WITHOUT ANY WARRANTY; without even the implied warranty of 12*38fd1498Szrj;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13*38fd1498Szrj;; GNU General Public License for more details. 14*38fd1498Szrj;; 15*38fd1498Szrj;; You should have received a copy of the GNU General Public License 16*38fd1498Szrj;; along with GCC; see the file COPYING3. If not see 17*38fd1498Szrj;; <http://www.gnu.org/licenses/>. 18*38fd1498Szrj 19*38fd1498Szrj;; AMD btver2 scheduling 20*38fd1498Szrj 21*38fd1498Szrj;; Instructions decoded are that are classifed as direct (fast path single), 22*38fd1498Szrj;; double (fast path double) and vector instructions. 23*38fd1498Szrj;; Direct instrucions are decoded and convereted into 1 cop 24*38fd1498Szrj;; Double instrucions are decoded and converetd into 2 cops 25*38fd1498Szrj;; Vector instrucions are microcoded and they generated converted to 26*38fd1498Szrj;; 3 or more cops. 27*38fd1498Szrj 28*38fd1498Szrj(define_attr "btver2_decode" "direct,vector,double" 29*38fd1498Szrj (const_string "direct")) 30*38fd1498Szrj 31*38fd1498Szrj(define_attr "btver2_sse_attr" "other,rcp,sqrt,maxmin" 32*38fd1498Szrj (const_string "other")) 33*38fd1498Szrj 34*38fd1498Szrj(define_automaton "btver2,btver2_int,btver2_agu,btver2_fp") 35*38fd1498Szrj 36*38fd1498Szrj;; Decoder decodes up to two insns (2 fastpath singles) or 37*38fd1498Szrj;;(2 fastpath doubles) or combination of both at a cycle. 38*38fd1498Szrj;; In case of vector (microded) instruction decoder decodes only one insn 39*38fd1498Szrj;; at a cycle .To model that we have 2 "decoder" units. 40*38fd1498Szrj 41*38fd1498Szrj(define_cpu_unit "btver2-decode0" "btver2") 42*38fd1498Szrj(define_cpu_unit "btver2-decode1" "btver2") 43*38fd1498Szrj 44*38fd1498Szrj;; "me" unit converts the decoded insn into cops. 45*38fd1498Szrj;; It can generate upto 2 cops from two fast path singles in cycle x+1, 46*38fd1498Szrj;; to model we have two "mes". In case of fast path double it converts 47*38fd1498Szrj;; them to 2 cops in cycle x+1. Vector instructions are modelled to block 48*38fd1498Szrj;; all decoder units. 49*38fd1498Szrj 50*38fd1498Szrj(define_cpu_unit "me0" "btver2") 51*38fd1498Szrj(define_cpu_unit "me1" "btver2") 52*38fd1498Szrj 53*38fd1498Szrj(define_reservation "btver2-direct" "(btver2-decode0|btver2-decode1),(me0|me1)") 54*38fd1498Szrj 55*38fd1498Szrj(define_reservation "btver2-double" "(btver2-decode0|btver2-decode1),(me0+me1)") 56*38fd1498Szrj 57*38fd1498Szrj(define_reservation "btver2-vector" "(btver2-decode0+btver2-decode1),(me0+me1)") 58*38fd1498Szrj 59*38fd1498Szrj;; Integer operations 60*38fd1498Szrj;; There are 2 ALU pipes 61*38fd1498Szrj 62*38fd1498Szrj(define_cpu_unit "btver2-ieu0" "btver2_int") 63*38fd1498Szrj(define_cpu_unit "btver2-ieu1" "btver2_int") 64*38fd1498Szrj 65*38fd1498Szrj;; There are 2 AGU pipes one for load and one for store. 66*38fd1498Szrj 67*38fd1498Szrj(define_cpu_unit "btver2-load" "btver2_agu") 68*38fd1498Szrj(define_cpu_unit "btver2-store" "btver2_agu") 69*38fd1498Szrj 70*38fd1498Szrj;; ALU operations can take place in ALU pipe0 or pipe1. 71*38fd1498Szrj(define_reservation "btver2-alu" "(btver2-ieu0|btver2-ieu1)") 72*38fd1498Szrj 73*38fd1498Szrj;; MUL and DIV operations can take place in to ALU pipe1. 74*38fd1498Szrj(define_reservation "btver2-mul" "btver2-ieu1") 75*38fd1498Szrj(define_reservation "btver2-div" "btver2-ieu1") 76*38fd1498Szrj 77*38fd1498Szrj;; vectorpath (microcoded) instructions are single issue instructions. 78*38fd1498Szrj;; So, they occupy all the integer units. 79*38fd1498Szrj(define_reservation "btver2-ivector" "btver2-ieu0+btver2-ieu1+ 80*38fd1498Szrj btver2-load+btver2-store") 81*38fd1498Szrj 82*38fd1498Szrj;;Floating point pipes. 83*38fd1498Szrj(define_cpu_unit "btver2-fp0" "btver2_fp") 84*38fd1498Szrj(define_cpu_unit "btver2-fp1" "btver2_fp") 85*38fd1498Szrj 86*38fd1498Szrj(define_reservation "btver2-fpa" "btver2-fp0") 87*38fd1498Szrj(define_reservation "btver2-vimul" "btver2-fp0") 88*38fd1498Szrj(define_reservation "btver2-valu" "btver2-fp0|btver2-fp1") 89*38fd1498Szrj(define_reservation "btver2-stc" "btver2-fp1") 90*38fd1498Szrj(define_reservation "btver2-fpm" "btver2-fp1") 91*38fd1498Szrj 92*38fd1498Szrj;; vectorpath (microcoded) instructions are single issue instructions. 93*38fd1498Szrj;; So, they occupy all the fp units. 94*38fd1498Szrj(define_reservation "btver2-fvector" "btver2-fp0+btver2-fp1+ 95*38fd1498Szrj btver2-load+btver2-store") 96*38fd1498Szrj 97*38fd1498Szrj;; Call instruction 98*38fd1498Szrj(define_insn_reservation "btver2_call" 2 99*38fd1498Szrj (and (eq_attr "cpu" "btver2") 100*38fd1498Szrj (eq_attr "type" "call,callv")) 101*38fd1498Szrj "btver2-double,btver2-load") 102*38fd1498Szrj 103*38fd1498Szrj;; General instructions 104*38fd1498Szrj;; 105*38fd1498Szrj 106*38fd1498Szrj(define_insn_reservation "btver2_push_mem" 4 107*38fd1498Szrj (and (eq_attr "cpu" "btver2") 108*38fd1498Szrj (and (eq_attr "memory" "load") 109*38fd1498Szrj (eq_attr "type" "push"))) 110*38fd1498Szrj "btver2-direct,btver2-load,btver2-alu") 111*38fd1498Szrj 112*38fd1498Szrj(define_insn_reservation "btver2_push" 1 113*38fd1498Szrj (and (eq_attr "cpu" "btver2") 114*38fd1498Szrj (eq_attr "type" "push")) 115*38fd1498Szrj "btver2-direct,btver2-alu") 116*38fd1498Szrj 117*38fd1498Szrj(define_insn_reservation "btver2_pop_mem" 4 118*38fd1498Szrj (and (eq_attr "cpu" "btver2") 119*38fd1498Szrj (and (eq_attr "memory" "load") 120*38fd1498Szrj (eq_attr "type" "pop"))) 121*38fd1498Szrj "btver2-direct,btver2-load,btver2-alu") 122*38fd1498Szrj 123*38fd1498Szrj(define_insn_reservation "btver2_pop" 1 124*38fd1498Szrj (and (eq_attr "cpu" "btver2") 125*38fd1498Szrj (eq_attr "type" "pop")) 126*38fd1498Szrj "btver2-direct,btver2-alu") 127*38fd1498Szrj 128*38fd1498Szrj(define_insn_reservation "btver2_leave" 3 129*38fd1498Szrj (and (eq_attr "cpu" "btver2") 130*38fd1498Szrj (eq_attr "type" "leave")) 131*38fd1498Szrj "btver2-double,btver2-alu") 132*38fd1498Szrj 133*38fd1498Szrj(define_insn_reservation "btver2_lea" 1 134*38fd1498Szrj (and (eq_attr "cpu" "btver2") 135*38fd1498Szrj (eq_attr "type" "lea")) 136*38fd1498Szrj "btver2-direct,btver2-alu") 137*38fd1498Szrj 138*38fd1498Szrj;; Integer 139*38fd1498Szrj(define_insn_reservation "btver2_imul_DI" 6 140*38fd1498Szrj (and (eq_attr "cpu" "btver2") 141*38fd1498Szrj (and (eq_attr "type" "imul") 142*38fd1498Szrj (and (eq_attr "mode" "DI") 143*38fd1498Szrj (eq_attr "memory" "none,unknown")))) 144*38fd1498Szrj "btver2-direct,btver2-mul*4") 145*38fd1498Szrj 146*38fd1498Szrj(define_insn_reservation "btver2_imul" 3 147*38fd1498Szrj (and (eq_attr "cpu" "btver2") 148*38fd1498Szrj (and (eq_attr "type" "imul") 149*38fd1498Szrj (eq_attr "memory" "none,unknown"))) 150*38fd1498Szrj "btver2-direct,btver2-mul") 151*38fd1498Szrj 152*38fd1498Szrj(define_insn_reservation "btver2_imul_mem_DI" 9 153*38fd1498Szrj (and (eq_attr "cpu" "btver2") 154*38fd1498Szrj (and (eq_attr "type" "imul") 155*38fd1498Szrj (and (eq_attr "mode" "DI") 156*38fd1498Szrj (eq_attr "memory" "load,both")))) 157*38fd1498Szrj "btver2-direct,btver2-load,btver2-mul*4") 158*38fd1498Szrj 159*38fd1498Szrj(define_insn_reservation "btver2_imul_mem" 6 160*38fd1498Szrj (and (eq_attr "cpu" "btver2") 161*38fd1498Szrj (and (eq_attr "type" "imul") 162*38fd1498Szrj (eq_attr "memory" "load,both"))) 163*38fd1498Szrj "btver2-direct,btver2-load,btver2-mul") 164*38fd1498Szrj 165*38fd1498Szrj(define_insn_reservation "btver2_idiv_DI" 41 166*38fd1498Szrj (and (eq_attr "cpu" "btver2") 167*38fd1498Szrj (and (eq_attr "type" "idiv") 168*38fd1498Szrj (and (eq_attr "mode" "DI") 169*38fd1498Szrj (eq_attr "memory" "none,unknown")))) 170*38fd1498Szrj "btver2-double,btver2-div") 171*38fd1498Szrj 172*38fd1498Szrj(define_insn_reservation "btver2_idiv_mem_DI" 44 173*38fd1498Szrj (and (eq_attr "cpu" "btver2") 174*38fd1498Szrj (and (eq_attr "type" "idiv") 175*38fd1498Szrj (and (eq_attr "mode" "DI") 176*38fd1498Szrj (eq_attr "memory" "load")))) 177*38fd1498Szrj "btver2-double,btver2-load,btver2-div") 178*38fd1498Szrj 179*38fd1498Szrj(define_insn_reservation "btver2_idiv_SI" 25 180*38fd1498Szrj (and (eq_attr "cpu" "btver2") 181*38fd1498Szrj (and (eq_attr "type" "idiv") 182*38fd1498Szrj (and (eq_attr "mode" "SI") 183*38fd1498Szrj (eq_attr "memory" "none,unknown")))) 184*38fd1498Szrj "btver2-double,btver2-div*25") 185*38fd1498Szrj 186*38fd1498Szrj(define_insn_reservation "btver2_idiv_mem_SI" 28 187*38fd1498Szrj (and (eq_attr "cpu" "btver2") 188*38fd1498Szrj (and (eq_attr "type" "idiv") 189*38fd1498Szrj (and (eq_attr "mode" "SI") 190*38fd1498Szrj (eq_attr "memory" "load")))) 191*38fd1498Szrj "btver2-double,btver2-load,btver2-div*25") 192*38fd1498Szrj 193*38fd1498Szrj(define_insn_reservation "btver2_idiv_HI" 17 194*38fd1498Szrj (and (eq_attr "cpu" "btver2") 195*38fd1498Szrj (and (eq_attr "type" "idiv") 196*38fd1498Szrj (and (eq_attr "mode" "HI") 197*38fd1498Szrj (eq_attr "memory" "none,unknown")))) 198*38fd1498Szrj "btver2-double,btver2-div*17") 199*38fd1498Szrj 200*38fd1498Szrj(define_insn_reservation "btver2_idiv_mem_HI" 20 201*38fd1498Szrj (and (eq_attr "cpu" "btver2") 202*38fd1498Szrj (and (eq_attr "type" "idiv") 203*38fd1498Szrj (and (eq_attr "mode" "HI") 204*38fd1498Szrj (eq_attr "memory" "load")))) 205*38fd1498Szrj "btver2-double,btver2-load,btver2-div*17") 206*38fd1498Szrj 207*38fd1498Szrj(define_insn_reservation "btver2_idiv_QI" 12 208*38fd1498Szrj (and (eq_attr "cpu" "btver2") 209*38fd1498Szrj (and (eq_attr "type" "idiv") 210*38fd1498Szrj (and (eq_attr "mode" "SI") 211*38fd1498Szrj (eq_attr "memory" "none,unknown")))) 212*38fd1498Szrj "btver2-direct,btver2-div*12") 213*38fd1498Szrj 214*38fd1498Szrj(define_insn_reservation "btver2_idiv_mem_QI" 15 215*38fd1498Szrj (and (eq_attr "cpu" "btver2") 216*38fd1498Szrj (and (eq_attr "type" "idiv") 217*38fd1498Szrj (and (eq_attr "mode" "SI") 218*38fd1498Szrj (eq_attr "memory" "load")))) 219*38fd1498Szrj "btver2-direct,btver2-load,btver2-div*12") 220*38fd1498Szrj 221*38fd1498Szrj(define_insn_reservation "btver2_str" 7 222*38fd1498Szrj (and (eq_attr "cpu" "btver2") 223*38fd1498Szrj (and (eq_attr "type" "str") 224*38fd1498Szrj (eq_attr "memory" "load,both,store"))) 225*38fd1498Szrj "btver2-vector,btver2-ivector") 226*38fd1498Szrj 227*38fd1498Szrj(define_insn_reservation "btver2_idirect_loadmov" 4 228*38fd1498Szrj (and (eq_attr "cpu" "btver2") 229*38fd1498Szrj (and (eq_attr "type" "imov") 230*38fd1498Szrj (eq_attr "memory" "load"))) 231*38fd1498Szrj "btver2-direct,btver2-load,btver2-alu") 232*38fd1498Szrj 233*38fd1498Szrj(define_insn_reservation "btver2_idirect_load" 4 234*38fd1498Szrj (and (eq_attr "cpu" "btver2") 235*38fd1498Szrj (and (eq_attr "bdver1_decode" "direct") 236*38fd1498Szrj (and (eq_attr "unit" "integer,unknown") 237*38fd1498Szrj (eq_attr "memory" "load")))) 238*38fd1498Szrj "btver2-direct,btver2-load,btver2-alu") 239*38fd1498Szrj 240*38fd1498Szrj(define_insn_reservation "btver2_idirect_movstore" 4 241*38fd1498Szrj (and (eq_attr "cpu" "btver2") 242*38fd1498Szrj (and (eq_attr "type" "imov") 243*38fd1498Szrj (eq_attr "memory" "store"))) 244*38fd1498Szrj "btver2-direct,btver2-alu,btver2-store") 245*38fd1498Szrj 246*38fd1498Szrj(define_insn_reservation "btver2_idirect_both" 4 247*38fd1498Szrj (and (eq_attr "cpu" "btver2") 248*38fd1498Szrj (and (eq_attr "bdver1_decode" "direct") 249*38fd1498Szrj (and (eq_attr "unit" "integer,unknown") 250*38fd1498Szrj (eq_attr "memory" "both")))) 251*38fd1498Szrj "btver2-direct,btver2-load,btver2-alu,btver2-store") 252*38fd1498Szrj 253*38fd1498Szrj(define_insn_reservation "btver2_idirect_store" 4 254*38fd1498Szrj (and (eq_attr "cpu" "btver2") 255*38fd1498Szrj (and (eq_attr "bdver1_decode" "direct") 256*38fd1498Szrj (and (eq_attr "unit" "integer,unknown") 257*38fd1498Szrj (eq_attr "memory" "store")))) 258*38fd1498Szrj "btver2-direct,btver2-alu,btver2-store") 259*38fd1498Szrj 260*38fd1498Szrj;; Other integer instrucions 261*38fd1498Szrj(define_insn_reservation "btver2_idirect" 1 262*38fd1498Szrj (and (eq_attr "cpu" "btver2") 263*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 264*38fd1498Szrj (and (eq_attr "unit" "integer,unknown") 265*38fd1498Szrj (eq_attr "memory" "none,unknown")))) 266*38fd1498Szrj "btver2-direct,btver2-alu") 267*38fd1498Szrj 268*38fd1498Szrj;; Floating point instructions 269*38fd1498Szrj(define_insn_reservation "btver2_fldxf" 19 270*38fd1498Szrj (and (eq_attr "cpu" "btver2") 271*38fd1498Szrj (and (eq_attr "type" "fmov") 272*38fd1498Szrj (and (eq_attr "memory" "load") 273*38fd1498Szrj (eq_attr "mode" "XF")))) 274*38fd1498Szrj "btver2-vector,btver2-load,btver2-fvector*5") 275*38fd1498Szrj 276*38fd1498Szrj(define_insn_reservation "btver2_fld" 11 277*38fd1498Szrj (and (eq_attr "cpu" "btver2") 278*38fd1498Szrj (and (eq_attr "type" "fmov") 279*38fd1498Szrj (eq_attr "memory" "load"))) 280*38fd1498Szrj "btver2-direct,btver2-load,(btver2-fp0|btver2-fp1)") 281*38fd1498Szrj 282*38fd1498Szrj(define_insn_reservation "btver2_fstxf" 24 283*38fd1498Szrj (and (eq_attr "cpu" "btver2") 284*38fd1498Szrj (and (eq_attr "type" "fmov") 285*38fd1498Szrj (and (eq_attr "memory" "both") 286*38fd1498Szrj (eq_attr "mode" "XF")))) 287*38fd1498Szrj "btver2-vector,btver2-fvector*9,btver2-store") 288*38fd1498Szrj 289*38fd1498Szrj(define_insn_reservation "btver2_fst" 11 290*38fd1498Szrj (and (eq_attr "cpu" "btver2") 291*38fd1498Szrj (and (eq_attr "type" "fmov") 292*38fd1498Szrj (eq_attr "memory" "store,both"))) 293*38fd1498Szrj "btver2-direct,btver2-fp1,btver2-store") 294*38fd1498Szrj 295*38fd1498Szrj(define_insn_reservation "btver2_fist" 9 296*38fd1498Szrj (and (eq_attr "cpu" "btver2") 297*38fd1498Szrj (eq_attr "type" "fistp,fisttp")) 298*38fd1498Szrj "btver2-direct,btver2-load,btver2-fp1") 299*38fd1498Szrj 300*38fd1498Szrj(define_insn_reservation "btver2_fmov" 2 301*38fd1498Szrj (and (eq_attr "cpu" "btver2") 302*38fd1498Szrj (eq_attr "type" "fmov")) 303*38fd1498Szrj "btver2-direct,(btver2-fp0|btver2-fp1)") 304*38fd1498Szrj 305*38fd1498Szrj(define_insn_reservation "btver2_fadd_load" 8 306*38fd1498Szrj (and (eq_attr "cpu" "btver2") 307*38fd1498Szrj (and (eq_attr "type" "fop") 308*38fd1498Szrj (eq_attr "memory" "load"))) 309*38fd1498Szrj "btver2-direct,btver2-load,btver2-fp0") 310*38fd1498Szrj 311*38fd1498Szrj(define_insn_reservation "btver2_fadd" 3 312*38fd1498Szrj (and (eq_attr "cpu" "btver2") 313*38fd1498Szrj (eq_attr "type" "fop")) 314*38fd1498Szrj "btver2-direct,btver2-fp0") 315*38fd1498Szrj 316*38fd1498Szrj(define_insn_reservation "btver2_fmul_load" 10 317*38fd1498Szrj (and (eq_attr "cpu" "btver2") 318*38fd1498Szrj (and (eq_attr "type" "fmul") 319*38fd1498Szrj (eq_attr "memory" "load"))) 320*38fd1498Szrj "btver2-direct,btver2-load,btver2-fp1*3") 321*38fd1498Szrj 322*38fd1498Szrj(define_insn_reservation "btver2_fmul" 5 323*38fd1498Szrj (and (eq_attr "cpu" "btver2") 324*38fd1498Szrj (eq_attr "type" "fmul")) 325*38fd1498Szrj "btver2-direct,(btver2-fp1*3)") 326*38fd1498Szrj 327*38fd1498Szrj(define_insn_reservation "btver2_fsgn" 2 328*38fd1498Szrj (and (eq_attr "cpu" "btver2") 329*38fd1498Szrj (eq_attr "type" "fsgn")) 330*38fd1498Szrj "btver2-direct,btver2-fp1*2") 331*38fd1498Szrj 332*38fd1498Szrj(define_insn_reservation "btver2_fdiv_load" 24 333*38fd1498Szrj (and (eq_attr "cpu" "btver2") 334*38fd1498Szrj (and (eq_attr "type" "fdiv") 335*38fd1498Szrj (eq_attr "memory" "load"))) 336*38fd1498Szrj "btver2-direct,btver2-load,btver2-fp1*19") 337*38fd1498Szrj 338*38fd1498Szrj(define_insn_reservation "btver2_fdiv" 19 339*38fd1498Szrj (and (eq_attr "cpu" "btver2") 340*38fd1498Szrj (eq_attr "type" "fdiv")) 341*38fd1498Szrj "btver2-direct,btver2-fp1*19") 342*38fd1498Szrj 343*38fd1498Szrj(define_insn_reservation "btver2_fcmov_load" 12 344*38fd1498Szrj (and (eq_attr "cpu" "btver2") 345*38fd1498Szrj (and (eq_attr "type" "fcmov") 346*38fd1498Szrj (eq_attr "memory" "load"))) 347*38fd1498Szrj "btver2-vector,btver2-load,(btver2-fp0|btver2-fp1)*7") 348*38fd1498Szrj 349*38fd1498Szrj(define_insn_reservation "btver2_fcmov" 7 350*38fd1498Szrj (and (eq_attr "cpu" "btver2") 351*38fd1498Szrj (eq_attr "type" "fcmov")) 352*38fd1498Szrj "btver2-vector,(btver2-fp0|btver2-fp1)*7") 353*38fd1498Szrj 354*38fd1498Szrj(define_insn_reservation "btver2_fcomi_load" 7 355*38fd1498Szrj (and (eq_attr "cpu" "btver2") 356*38fd1498Szrj (and (eq_attr "type" "fcmp") 357*38fd1498Szrj (and (eq_attr "bdver1_decode" "double") 358*38fd1498Szrj (eq_attr "memory" "load")))) 359*38fd1498Szrj "btver2-direct,btver2-load,btver2-fp0*2") 360*38fd1498Szrj 361*38fd1498Szrj(define_insn_reservation "btver2_fcomi" 2 362*38fd1498Szrj (and (eq_attr "cpu" "btver2") 363*38fd1498Szrj (and (eq_attr "bdver1_decode" "double") 364*38fd1498Szrj (eq_attr "type" "fcmp"))) 365*38fd1498Szrj "btver2-direct, btver2-fp0*2") 366*38fd1498Szrj 367*38fd1498Szrj(define_insn_reservation "btver2_fcom_load" 6 368*38fd1498Szrj (and (eq_attr "cpu" "btver2") 369*38fd1498Szrj (and (eq_attr "type" "fcmp") 370*38fd1498Szrj (eq_attr "memory" "load"))) 371*38fd1498Szrj "btver2-direct,btver2-load,btver2-fp0") 372*38fd1498Szrj 373*38fd1498Szrj(define_insn_reservation "btver2_fcom" 1 374*38fd1498Szrj (and (eq_attr "cpu" "btver2") 375*38fd1498Szrj (eq_attr "type" "fcmp")) 376*38fd1498Szrj "btver2-direct,btver2-fp0") 377*38fd1498Szrj 378*38fd1498Szrj(define_insn_reservation "btver2_fxch" 1 379*38fd1498Szrj (and (eq_attr "cpu" "btver2") 380*38fd1498Szrj (eq_attr "type" "fxch")) 381*38fd1498Szrj "btver2-direct,btver2-fp1") 382*38fd1498Szrj 383*38fd1498Szrj;; SSE AVX maxmin,rcp,sqrt 384*38fd1498Szrj(define_insn_reservation "btver2_sse_maxmin" 2 385*38fd1498Szrj (and (eq_attr "cpu" "btver2") 386*38fd1498Szrj (and (eq_attr "mode" "V8SF,V4DF,V2DF,V4SF,SF,DF") 387*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 388*38fd1498Szrj (and (eq_attr "btver2_sse_attr" "maxmin") 389*38fd1498Szrj (eq_attr "type" "sse,sseadd"))))) 390*38fd1498Szrj "btver2-direct,btver2-fpa") 391*38fd1498Szrj 392*38fd1498Szrj(define_insn_reservation "btver2_sse_maxmin_mem" 7 393*38fd1498Szrj (and (eq_attr "cpu" "btver2") 394*38fd1498Szrj (and (eq_attr "mode" "V8SF,V4DF,V2DF,V4SF,SF,DF") 395*38fd1498Szrj (and (eq_attr "memory" "load") 396*38fd1498Szrj (and (eq_attr "btver2_sse_attr" "maxmin") 397*38fd1498Szrj (eq_attr "type" "sse,sseadd"))))) 398*38fd1498Szrj "btver2-direct,btver2-load,btver2-fpa") 399*38fd1498Szrj 400*38fd1498Szrj(define_insn_reservation "btver2_sse_rcp" 2 401*38fd1498Szrj (and (eq_attr "cpu" "btver2") 402*38fd1498Szrj (and (eq_attr "mode" "V4SF,SF") 403*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 404*38fd1498Szrj (and (eq_attr "btver2_sse_attr" "rcp") 405*38fd1498Szrj (eq_attr "type" "sse"))))) 406*38fd1498Szrj "btver2-direct,btver2-fpm") 407*38fd1498Szrj 408*38fd1498Szrj(define_insn_reservation "btver2_sse_rcp_mem" 7 409*38fd1498Szrj (and (eq_attr "cpu" "btver2") 410*38fd1498Szrj (and (eq_attr "mode" "V4SF,SF") 411*38fd1498Szrj (and (eq_attr "memory" "load") 412*38fd1498Szrj (and (eq_attr "btver2_sse_attr" "rcp") 413*38fd1498Szrj (eq_attr "type" "sse"))))) 414*38fd1498Szrj "btver2-direct,btver2-load,btver2-fpm") 415*38fd1498Szrj 416*38fd1498Szrj(define_insn_reservation "btver2_avx_rcp" 2 417*38fd1498Szrj (and (eq_attr "cpu" "btver2") 418*38fd1498Szrj (and (eq_attr "mode" "V8SF") 419*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 420*38fd1498Szrj (and (eq_attr "btver2_sse_attr" "rcp") 421*38fd1498Szrj (eq_attr "type" "sse"))))) 422*38fd1498Szrj "btver2-double,btver2-fpm*2") 423*38fd1498Szrj 424*38fd1498Szrj(define_insn_reservation "btver2_avx_rcp_mem" 7 425*38fd1498Szrj (and (eq_attr "cpu" "btver2") 426*38fd1498Szrj (and (eq_attr "mode" "V8SF") 427*38fd1498Szrj (and (eq_attr "memory" "load") 428*38fd1498Szrj (and (eq_attr "btver2_sse_attr" "rcp") 429*38fd1498Szrj (eq_attr "type" "sse"))))) 430*38fd1498Szrj "btver2-double,btver2-load,btver2-fpm*2") 431*38fd1498Szrj 432*38fd1498Szrj(define_insn_reservation "btver2_sse_sqrt_v4sf" 21 433*38fd1498Szrj (and (eq_attr "cpu" "btver2") 434*38fd1498Szrj (and (eq_attr "mode" "V4SF") 435*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 436*38fd1498Szrj (and (eq_attr "btver2_sse_attr" "sqrt") 437*38fd1498Szrj (eq_attr "type" "sse"))))) 438*38fd1498Szrj "btver2-direct,btver2-fpm*21") 439*38fd1498Szrj 440*38fd1498Szrj(define_insn_reservation "btver2_sse_sqrt_v4sf_mem" 26 441*38fd1498Szrj (and (eq_attr "cpu" "btver2") 442*38fd1498Szrj (and (eq_attr "mode" "V4SF") 443*38fd1498Szrj (and (eq_attr "memory" "load") 444*38fd1498Szrj (and (eq_attr "btver2_sse_attr" "sqrt") 445*38fd1498Szrj (eq_attr "type" "sse"))))) 446*38fd1498Szrj "btver2-direct,btver2-load,btver2-fpm*21") 447*38fd1498Szrj 448*38fd1498Szrj(define_insn_reservation "btver2_sse_sqrt_v4df" 54 449*38fd1498Szrj (and (eq_attr "cpu" "btver2") 450*38fd1498Szrj (and (eq_attr "mode" "V4DF") 451*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 452*38fd1498Szrj (and (eq_attr "btver2_sse_attr" "sqrt") 453*38fd1498Szrj (eq_attr "type" "sse"))))) 454*38fd1498Szrj "btver2-double,btver2-fpm*54") 455*38fd1498Szrj 456*38fd1498Szrj(define_insn_reservation "btver2_sse_sqrt_v4df_mem" 59 457*38fd1498Szrj (and (eq_attr "cpu" "btver2") 458*38fd1498Szrj (and (eq_attr "mode" "V4DF") 459*38fd1498Szrj (and (eq_attr "memory" "load") 460*38fd1498Szrj (and (eq_attr "btver2_sse_attr" "sqrt") 461*38fd1498Szrj (eq_attr "type" "sse"))))) 462*38fd1498Szrj "btver2-double,btver2-load,btver2-fpm*54") 463*38fd1498Szrj 464*38fd1498Szrj(define_insn_reservation "btver2_sse_sqrt_sf" 16 465*38fd1498Szrj (and (eq_attr "cpu" "btver2") 466*38fd1498Szrj (and (eq_attr "mode" "SF") 467*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 468*38fd1498Szrj (and (eq_attr "btver2_sse_attr" "sqrt") 469*38fd1498Szrj (eq_attr "type" "sse"))))) 470*38fd1498Szrj "btver2-direct,btver2-fpm*16") 471*38fd1498Szrj 472*38fd1498Szrj(define_insn_reservation "btver2_sse_sqrt_sf_mem" 21 473*38fd1498Szrj (and (eq_attr "cpu" "btver2") 474*38fd1498Szrj (and (eq_attr "mode" "SF") 475*38fd1498Szrj (and (eq_attr "memory" "load") 476*38fd1498Szrj (and (eq_attr "btver2_sse_attr" "sqrt") 477*38fd1498Szrj (eq_attr "type" "sse"))))) 478*38fd1498Szrj "btver2-direct,btver2-load,btver2-fpm*16") 479*38fd1498Szrj 480*38fd1498Szrj(define_insn_reservation "btver2_sse_sqrt_df" 27 481*38fd1498Szrj (and (eq_attr "cpu" "btver2") 482*38fd1498Szrj (and (eq_attr "mode" "V2DF,DF") 483*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 484*38fd1498Szrj (and (eq_attr "btver2_sse_attr" "sqrt") 485*38fd1498Szrj (eq_attr "type" "sse"))))) 486*38fd1498Szrj "btver2-direct,btver2-fpm*27") 487*38fd1498Szrj 488*38fd1498Szrj(define_insn_reservation "btver2_sse_sqrt_df_mem" 32 489*38fd1498Szrj (and (eq_attr "cpu" "btver2") 490*38fd1498Szrj (and (eq_attr "mode" "V2DF,DF") 491*38fd1498Szrj (and (eq_attr "memory" "load") 492*38fd1498Szrj (and (eq_attr "btver2_sse_attr" "sqrt") 493*38fd1498Szrj (eq_attr "type" "sse"))))) 494*38fd1498Szrj "btver2-direct,btver2-load,btver2-fpm*27") 495*38fd1498Szrj 496*38fd1498Szrj(define_insn_reservation "btver2_sse_sqrt_v8sf" 42 497*38fd1498Szrj (and (eq_attr "cpu" "btver2") 498*38fd1498Szrj (and (eq_attr "mode" "V8SF") 499*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 500*38fd1498Szrj (and (eq_attr "btver2_sse_attr" "sqrt") 501*38fd1498Szrj (eq_attr "type" "sse"))))) 502*38fd1498Szrj "btver2-double,btver2-fpm*42") 503*38fd1498Szrj 504*38fd1498Szrj(define_insn_reservation "btver2_sse_sqrt_v8sf_mem" 42 505*38fd1498Szrj (and (eq_attr "cpu" "btver2") 506*38fd1498Szrj (and (eq_attr "mode" "V8SF") 507*38fd1498Szrj (and (eq_attr "memory" "load") 508*38fd1498Szrj (and (eq_attr "btver2_sse_attr" "sqrt") 509*38fd1498Szrj (eq_attr "type" "sse"))))) 510*38fd1498Szrj "btver2-double,btver2-load,btver2-fpm*42") 511*38fd1498Szrj 512*38fd1498Szrj;; Bitmanipulation instrucions BMI LZCNT POPCNT 513*38fd1498Szrj(define_insn_reservation "btver2_bmi_reg_direct" 1 514*38fd1498Szrj (and (eq_attr "cpu" "btver2") 515*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 516*38fd1498Szrj (and (eq_attr "memory" "none") 517*38fd1498Szrj (eq_attr "type" "bitmanip")))) 518*38fd1498Szrj "btver2-direct,btver2-alu") 519*38fd1498Szrj 520*38fd1498Szrj(define_insn_reservation "btver2_bmi_mem_direct" 4 521*38fd1498Szrj (and (eq_attr "cpu" "btver2") 522*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 523*38fd1498Szrj (and (eq_attr "memory" "load") 524*38fd1498Szrj (eq_attr "type" "bitmanip")))) 525*38fd1498Szrj "btver2-direct,btver2-load,btver2-alu") 526*38fd1498Szrj 527*38fd1498Szrj(define_insn_reservation "btver2_bmi_reg_double" 2 528*38fd1498Szrj (and (eq_attr "cpu" "btver2") 529*38fd1498Szrj (and (eq_attr "btver2_decode" "double") 530*38fd1498Szrj (and (eq_attr "memory" "none") 531*38fd1498Szrj (eq_attr "type" "bitmanip,alu1")))) 532*38fd1498Szrj "btver2-double,btver2-alu") 533*38fd1498Szrj 534*38fd1498Szrj(define_insn_reservation "btver2_bmi_double_store" 5 535*38fd1498Szrj (and (eq_attr "cpu" "btver2") 536*38fd1498Szrj (and (eq_attr "memory" "store") 537*38fd1498Szrj (and (eq_attr "btver2_decode" "double") 538*38fd1498Szrj (eq_attr "type" "bitmanip,alu1")))) 539*38fd1498Szrj "btver2-double,btver2-alu,btver2-store") 540*38fd1498Szrj 541*38fd1498Szrj(define_insn_reservation "btver2_bmi_double_load" 4 542*38fd1498Szrj (and (eq_attr "cpu" "btver2") 543*38fd1498Szrj (and (eq_attr "btver2_decode" "double") 544*38fd1498Szrj (and (eq_attr "memory" "load") 545*38fd1498Szrj (eq_attr "type" "bitmanip,alu1")))) 546*38fd1498Szrj "btver2-double,btver2-load,btver2-alu") 547*38fd1498Szrj 548*38fd1498Szrj;; F16C converts 549*38fd1498Szrj(define_insn_reservation "btver2_ssecvt_load_direct" 8 550*38fd1498Szrj (and (eq_attr "cpu" "btver2") 551*38fd1498Szrj (and (eq_attr "mode" "V8SF,V4SF") 552*38fd1498Szrj (and (eq_attr "memory" "load") 553*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 554*38fd1498Szrj (eq_attr "type" "ssecvt"))))) 555*38fd1498Szrj "btver2-direct,btver2-load,btver2-stc") 556*38fd1498Szrj 557*38fd1498Szrj(define_insn_reservation "btver2_ssecvt_store_direct" 8 558*38fd1498Szrj (and (eq_attr "cpu" "btver2") 559*38fd1498Szrj (and (eq_attr "mode" "V8SF,V4SF") 560*38fd1498Szrj (and (eq_attr "memory" "store") 561*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 562*38fd1498Szrj (eq_attr "type" "ssecvt"))))) 563*38fd1498Szrj "btver2-direct,btver2-stc,btver2-store") 564*38fd1498Szrj 565*38fd1498Szrj(define_insn_reservation "btver2_ssecvt_reg_direct" 3 566*38fd1498Szrj (and (eq_attr "cpu" "btver2") 567*38fd1498Szrj (and (eq_attr "mode" "V8SF,V4SF") 568*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 569*38fd1498Szrj (eq_attr "type" "ssecvt")))) 570*38fd1498Szrj "btver2-direct,btver2-stc") 571*38fd1498Szrj 572*38fd1498Szrj(define_insn_reservation "btver2_ssecvt_load_double" 8 573*38fd1498Szrj (and (eq_attr "cpu" "btver2") 574*38fd1498Szrj (and (eq_attr "mode" "V8SF,V4SF") 575*38fd1498Szrj (and (eq_attr "memory" "load") 576*38fd1498Szrj (and (eq_attr "btver2_decode" "double") 577*38fd1498Szrj (eq_attr "type" "ssecvt"))))) 578*38fd1498Szrj "btver2-double,btver2-load,btver2-stc*2") 579*38fd1498Szrj 580*38fd1498Szrj(define_insn_reservation "btver2_ssecvt_reg_double" 3 581*38fd1498Szrj (and (eq_attr "cpu" "btver2") 582*38fd1498Szrj (and (eq_attr "mode" "V8SF,V4SF") 583*38fd1498Szrj (and (eq_attr "btver2_decode" "double") 584*38fd1498Szrj (eq_attr "type" "ssecvt")))) 585*38fd1498Szrj "btver2-double,btver2-stc*2") 586*38fd1498Szrj 587*38fd1498Szrj(define_insn_reservation "btver2_ssecvt_store_vector" 11 588*38fd1498Szrj (and (eq_attr "cpu" "btver2") 589*38fd1498Szrj (and (eq_attr "mode" "V8SF,V4SF") 590*38fd1498Szrj (and (eq_attr "memory" "store") 591*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 592*38fd1498Szrj (eq_attr "type" "ssecvt"))))) 593*38fd1498Szrj "btver2-vector,btver2-stc,(btver2-fpa|btver2-fpm),btver2-store") 594*38fd1498Szrj 595*38fd1498Szrj(define_insn_reservation "btver2_ssecvt_reg_vector" 6 596*38fd1498Szrj (and (eq_attr "cpu" "btver2") 597*38fd1498Szrj (and (eq_attr "mode" "V8SF,V4SF") 598*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 599*38fd1498Szrj (eq_attr "type" "ssecvt")))) 600*38fd1498Szrj "btver2-vector,btver2-stc,(btver2-fpa|btver2-fpm)") 601*38fd1498Szrj 602*38fd1498Szrj;; avx256 adds 603*38fd1498Szrj(define_insn_reservation "btver2_avx_add_load_256" 8 604*38fd1498Szrj (and (eq_attr "cpu" "btver2") 605*38fd1498Szrj (and (eq_attr "mode" "V4DF,V8SF") 606*38fd1498Szrj (and (eq_attr "memory" "load") 607*38fd1498Szrj (eq_attr "type" "sseadd,sseadd1")))) 608*38fd1498Szrj "btver2-double,btver2-load,btver2-fpa") 609*38fd1498Szrj 610*38fd1498Szrj(define_insn_reservation "btver2_avx_add_reg_256" 3 611*38fd1498Szrj (and (eq_attr "cpu" "btver2") 612*38fd1498Szrj (and (eq_attr "mode" "V4DF,V8SF") 613*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 614*38fd1498Szrj (eq_attr "type" "sseadd,sseadd1")))) 615*38fd1498Szrj "btver2-double,btver2-fpa") 616*38fd1498Szrj 617*38fd1498Szrj;; avx256 logs 618*38fd1498Szrj(define_insn_reservation "btver2_avx_load_log" 6 619*38fd1498Szrj (and (eq_attr "cpu" "btver2") 620*38fd1498Szrj (and (eq_attr "mode" "V4DF,V8SF") 621*38fd1498Szrj (and (eq_attr "memory" "load") 622*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 623*38fd1498Szrj (eq_attr "type" "sselog,sselog1"))))) 624*38fd1498Szrj "btver2-double,btver2-load,(btver2-fpa|btver2-fpm)") 625*38fd1498Szrj 626*38fd1498Szrj(define_insn_reservation "btver2_avx_reg_log" 1 627*38fd1498Szrj (and (eq_attr "cpu" "btver2") 628*38fd1498Szrj (and (eq_attr "mode" "V4DF,V8SF") 629*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 630*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 631*38fd1498Szrj (eq_attr "type" "sselog,sselog1"))))) 632*38fd1498Szrj "btver2-double,(btver2-fpa|btver2-fpm)") 633*38fd1498Szrj 634*38fd1498Szrj;; avx256 sse 635*38fd1498Szrj 636*38fd1498Szrj(define_insn_reservation "btver2_avx_load_sse" 6 637*38fd1498Szrj (and (eq_attr "cpu" "btver2") 638*38fd1498Szrj (and (eq_attr "mode" "V4DF,V8SF") 639*38fd1498Szrj (and (eq_attr "memory" "load") 640*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 641*38fd1498Szrj (eq_attr "type" "sse"))))) 642*38fd1498Szrj "btver2-double,btver2-load,(btver2-fpa|btver2-fpm)") 643*38fd1498Szrj 644*38fd1498Szrj(define_insn_reservation "btver2_avx_reg_sse" 1 645*38fd1498Szrj (and (eq_attr "cpu" "btver2") 646*38fd1498Szrj (and (eq_attr "mode" "V4DF,V8SF") 647*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 648*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 649*38fd1498Szrj (eq_attr "type" "sse"))))) 650*38fd1498Szrj "btver2-double,(btver2-fpa|btver2-fpm)") 651*38fd1498Szrj 652*38fd1498Szrj;; avx256 moves 653*38fd1498Szrj(define_insn_reservation "btver2_avx_load_int_mov" 6 654*38fd1498Szrj (and (eq_attr "cpu" "btver2") 655*38fd1498Szrj (and (eq_attr "mode" "OI") 656*38fd1498Szrj (and (eq_attr "memory" "load") 657*38fd1498Szrj (eq_attr "type" "ssemov")))) 658*38fd1498Szrj "btver2-double,btver2-load,btver2-valu") 659*38fd1498Szrj 660*38fd1498Szrj(define_insn_reservation "btver2_avx_store_int_mov" 6 661*38fd1498Szrj (and (eq_attr "cpu" "btver2") 662*38fd1498Szrj (and (eq_attr "mode" "OI") 663*38fd1498Szrj (and (eq_attr "memory" "store") 664*38fd1498Szrj (eq_attr "type" "ssemov")))) 665*38fd1498Szrj "btver2-double,btver2-valu,btver2-store") 666*38fd1498Szrj 667*38fd1498Szrj(define_insn_reservation "btver2_avx_int_mov" 1 668*38fd1498Szrj (and (eq_attr "cpu" "btver2") 669*38fd1498Szrj (and (eq_attr "mode" "OI") 670*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 671*38fd1498Szrj (eq_attr "type" "ssemov")))) 672*38fd1498Szrj "btver2-double,btver2-valu") 673*38fd1498Szrj 674*38fd1498Szrj(define_insn_reservation "btver2_avx_load_from_vectors" 6 675*38fd1498Szrj (and (eq_attr "cpu" "btver2") 676*38fd1498Szrj (and (eq_attr "mode" "V8SF,V4DF") 677*38fd1498Szrj (and (ior ( match_operand:V4SF 1 "memory_operand") 678*38fd1498Szrj ( match_operand:V2DF 1 "memory_operand")) 679*38fd1498Szrj (and (eq_attr "memory" "load") 680*38fd1498Szrj (eq_attr "type" "ssemov"))))) 681*38fd1498Szrj "btver2-double,btver2-load,(btver2-fpa|btver2-fpm)") 682*38fd1498Szrj 683*38fd1498Szrj(define_insn_reservation "btver2_avx_loads_from_scalar" 6 684*38fd1498Szrj (and (eq_attr "cpu" "btver2") 685*38fd1498Szrj (and (eq_attr "mode" "V8SF,V4DF") 686*38fd1498Szrj (and (ior ( match_operand:SF 1 "memory_operand") 687*38fd1498Szrj ( match_operand:DF 1 "memory_operand")) 688*38fd1498Szrj (and (eq_attr "memory" "load") 689*38fd1498Szrj (eq_attr "type" "ssemov"))))) 690*38fd1498Szrj "btver2-double,btver2-load,(btver2-fpa|btver2-fpm)*2") 691*38fd1498Szrj 692*38fd1498Szrj(define_insn_reservation "btver2_avx_store_move" 6 693*38fd1498Szrj (and (eq_attr "cpu" "btver2") 694*38fd1498Szrj (and (eq_attr "mode" "V4DF,V8SF") 695*38fd1498Szrj (and (eq_attr "memory" "store") 696*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 697*38fd1498Szrj (eq_attr "type" "ssemov"))))) 698*38fd1498Szrj "btver2-double,(btver2-fpa|btver2-fpm),btver2-store") 699*38fd1498Szrj 700*38fd1498Szrj(define_insn_reservation "btver2_avx_load_move" 6 701*38fd1498Szrj (and (eq_attr "cpu" "btver2") 702*38fd1498Szrj (and (eq_attr "mode" "V4DF,V8SF") 703*38fd1498Szrj (and (eq_attr "memory" "load") 704*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 705*38fd1498Szrj (eq_attr "type" "ssemov"))))) 706*38fd1498Szrj "btver2-double,btver2-load,(btver2-fpa|btver2-fpm)") 707*38fd1498Szrj 708*38fd1498Szrj(define_insn_reservation "btver2_avx_reg_move" 1 709*38fd1498Szrj (and (eq_attr "cpu" "btver2") 710*38fd1498Szrj (and (eq_attr "mode" "V4DF,V8SF") 711*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 712*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 713*38fd1498Szrj (eq_attr "type" "ssemov"))))) 714*38fd1498Szrj "btver2-double,(btver2-fpa|btver2-fpm)") 715*38fd1498Szrj;; avx256 cmps 716*38fd1498Szrj(define_insn_reservation "btver2_avx_load_cmp" 7 717*38fd1498Szrj (and (eq_attr "cpu" "btver2") 718*38fd1498Szrj (and (eq_attr "mode" "V4DF,V8SF") 719*38fd1498Szrj (and (eq_attr "memory" "load") 720*38fd1498Szrj (eq_attr "type" "ssecmp")))) 721*38fd1498Szrj "btver2-double,btver2-load,(btver2-fpa|btver2-fpm)*2") 722*38fd1498Szrj 723*38fd1498Szrj(define_insn_reservation "btver2_avx_cmp" 2 724*38fd1498Szrj (and (eq_attr "cpu" "btver2") 725*38fd1498Szrj (and (eq_attr "mode" "V4DF,V8SF") 726*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 727*38fd1498Szrj (eq_attr "type" "ssecmp")))) 728*38fd1498Szrj "btver2-double,(btver2-fpa|btver2-fpm)*2") 729*38fd1498Szrj 730*38fd1498Szrj;; ssecvts 256 731*38fd1498Szrj(define_insn_reservation "btver2_ssecvt_256_load" 8 732*38fd1498Szrj (and (eq_attr "cpu" "btver2") 733*38fd1498Szrj (and (eq_attr "mode" "V4DF,OI") 734*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 735*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 736*38fd1498Szrj (eq_attr "type" "ssecvt"))))) 737*38fd1498Szrj "btver2-double,btver2-load,btver2-stc*2") 738*38fd1498Szrj 739*38fd1498Szrj(define_insn_reservation "btver2_ssecvt_256" 3 740*38fd1498Szrj (and (eq_attr "cpu" "btver2") 741*38fd1498Szrj (and (eq_attr "mode" "V4DF,OI") 742*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 743*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 744*38fd1498Szrj (eq_attr "type" "ssecvt"))))) 745*38fd1498Szrj "btver2-double,btver2-stc*2") 746*38fd1498Szrj 747*38fd1498Szrj(define_insn_reservation "btver2_ssecvt_256_vector_load" 11 748*38fd1498Szrj (and (eq_attr "cpu" "btver2") 749*38fd1498Szrj (and (eq_attr "mode" "V4DF,OI") 750*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 751*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 752*38fd1498Szrj (eq_attr "type" "ssecvt"))))) 753*38fd1498Szrj "btver2-vector,btver2-load,btver2-stc*2,(btver2-fpa|btver2-fpm)") 754*38fd1498Szrj 755*38fd1498Szrj(define_insn_reservation "btver2_ssecvt_256_vector" 6 756*38fd1498Szrj (and (eq_attr "cpu" "btver2") 757*38fd1498Szrj (and (eq_attr "mode" "V4DF,OI") 758*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 759*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 760*38fd1498Szrj (eq_attr "type" "ssecvt"))))) 761*38fd1498Szrj "btver2-vector,btver2-stc*2,(btver2-fpa|btver2-fpm)") 762*38fd1498Szrj 763*38fd1498Szrj;; avx256 divides 764*38fd1498Szrj(define_insn_reservation "btver2_avx_load_div" 43 765*38fd1498Szrj (and (eq_attr "cpu" "btver2") 766*38fd1498Szrj (and (eq_attr "mode" "V4DF,V8SF") 767*38fd1498Szrj (and (eq_attr "memory" "load") 768*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 769*38fd1498Szrj (eq_attr "type" "ssediv"))))) 770*38fd1498Szrj "btver2-double,btver2-load,btver2-fpm*38") 771*38fd1498Szrj 772*38fd1498Szrj(define_insn_reservation "btver2_avx_div" 38 773*38fd1498Szrj (and (eq_attr "cpu" "btver2") 774*38fd1498Szrj (and (eq_attr "mode" "V4DF,V8SF") 775*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 776*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 777*38fd1498Szrj (eq_attr "type" "ssediv"))))) 778*38fd1498Szrj "btver2-double,btver2-fpm*38") 779*38fd1498Szrj 780*38fd1498Szrj;; avx256 multiply 781*38fd1498Szrj 782*38fd1498Szrj(define_insn_reservation "btver2_avx_mul_load_pd" 9 783*38fd1498Szrj (and (eq_attr "cpu" "btver2") 784*38fd1498Szrj (and (eq_attr "mode" "V4DF") 785*38fd1498Szrj (and (eq_attr "memory" "load") 786*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 787*38fd1498Szrj (eq_attr "type" "ssemul"))))) 788*38fd1498Szrj "btver2-double,btver2-load,btver2-fpm*4") 789*38fd1498Szrj 790*38fd1498Szrj(define_insn_reservation "btver2_avx_mul_load_ps" 7 791*38fd1498Szrj (and (eq_attr "cpu" "btver2") 792*38fd1498Szrj (and (eq_attr "mode" "V8SF") 793*38fd1498Szrj (and (eq_attr "memory" "load") 794*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 795*38fd1498Szrj (eq_attr "type" "ssemul"))))) 796*38fd1498Szrj "btver2-double,btver2-load,btver2-fpm*2") 797*38fd1498Szrj 798*38fd1498Szrj 799*38fd1498Szrj(define_insn_reservation "btver2_avx_mul_256_pd" 4 800*38fd1498Szrj (and (eq_attr "cpu" "btver2") 801*38fd1498Szrj (and (eq_attr "mode" "V4DF") 802*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 803*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 804*38fd1498Szrj (eq_attr "type" "ssemul"))))) 805*38fd1498Szrj "btver2-double,btver2-fpm*4") 806*38fd1498Szrj 807*38fd1498Szrj(define_insn_reservation "btver2_avx_mul_256_ps" 2 808*38fd1498Szrj (and (eq_attr "cpu" "btver2") 809*38fd1498Szrj (and (eq_attr "mode" "V8SF") 810*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 811*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 812*38fd1498Szrj (eq_attr "type" "ssemul"))))) 813*38fd1498Szrj "btver2-double,btver2-fpm*2") 814*38fd1498Szrj 815*38fd1498Szrj(define_insn_reservation "btver2_avx_dpps_load_ps" 17 816*38fd1498Szrj (and (eq_attr "cpu" "btver2") 817*38fd1498Szrj (and (eq_attr "mode" "V8SF") 818*38fd1498Szrj (and (eq_attr "memory" "load") 819*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 820*38fd1498Szrj (eq_attr "type" "ssemul"))))) 821*38fd1498Szrj "btver2-vector,btver2-fpm*6,btver2-fpa*6") 822*38fd1498Szrj 823*38fd1498Szrj(define_insn_reservation "btver2_avx_dpps_ps" 12 824*38fd1498Szrj (and (eq_attr "cpu" "btver2") 825*38fd1498Szrj (and (eq_attr "mode" "V8SF") 826*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 827*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 828*38fd1498Szrj (eq_attr "type" "ssemul"))))) 829*38fd1498Szrj "btver2-vector,btver2-fpm*6,btver2-fpa*6") 830*38fd1498Szrj 831*38fd1498Szrj;; AES/CLMUL 832*38fd1498Szrj 833*38fd1498Szrj(define_insn_reservation "btver2_aes_double" 3 834*38fd1498Szrj (and (eq_attr "cpu" "btver2") 835*38fd1498Szrj (and (match_operand:V2DI 0 "register_operand") 836*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 837*38fd1498Szrj (and (eq_attr "btver2_decode" "double") 838*38fd1498Szrj (eq_attr "type" "sselog1"))))) 839*38fd1498Szrj "btver2-double,btver2-valu,btver2-vimul") 840*38fd1498Szrj 841*38fd1498Szrj(define_insn_reservation "btver2_aes_direct" 2 842*38fd1498Szrj (and (eq_attr "cpu" "btver2") 843*38fd1498Szrj (and (match_operand:V2DI 0 "register_operand") 844*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 845*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 846*38fd1498Szrj (eq_attr "type" "sselog1"))))) 847*38fd1498Szrj "btver2-direct,btver2-vimul") 848*38fd1498Szrj 849*38fd1498Szrj;; AVX128 SSE4* SSSE3 SSE3* SSE2 SSE instructions 850*38fd1498Szrj 851*38fd1498Szrj(define_insn_reservation "btver2_sseint_load_direct" 6 852*38fd1498Szrj (and (eq_attr "cpu" "btver2") 853*38fd1498Szrj (and (eq_attr "mode" "TI") 854*38fd1498Szrj (and (eq_attr "memory" "load") 855*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 856*38fd1498Szrj (eq_attr "type" "sse,ssecmp,sseiadd"))))) 857*38fd1498Szrj "btver2-direct,btver2-load,btver2-valu") 858*38fd1498Szrj 859*38fd1498Szrj(define_insn_reservation "btver2_sseint_direct" 1 860*38fd1498Szrj (and (eq_attr "cpu" "btver2") 861*38fd1498Szrj (and (eq_attr "mode" "TI") 862*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 863*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 864*38fd1498Szrj (eq_attr "type" "sse,ssecmp,sseiadd"))))) 865*38fd1498Szrj "btver2-direct,btver2-valu") 866*38fd1498Szrj 867*38fd1498Szrj(define_insn_reservation "btver2_sselog_direct" 1 868*38fd1498Szrj (and (eq_attr "cpu" "btver2") 869*38fd1498Szrj (and (eq_attr "mode" "V2DF,V4SF") 870*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 871*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 872*38fd1498Szrj (eq_attr "type" "sse,sselog"))))) 873*38fd1498Szrj "btver2-direct,(btver2-fpa|btver2-fpm)") 874*38fd1498Szrj 875*38fd1498Szrj(define_insn_reservation "btver2_sselog_load_direct" 6 876*38fd1498Szrj (and (eq_attr "cpu" "btver2") 877*38fd1498Szrj (and (eq_attr "mode" "V2DF,V4SF") 878*38fd1498Szrj (and (eq_attr "memory" "load") 879*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 880*38fd1498Szrj (eq_attr "type" "sse,sselog"))))) 881*38fd1498Szrj "btver2-direct,btver2-load,(btver2-fpa|btver2-fpm)") 882*38fd1498Szrj 883*38fd1498Szrj(define_insn_reservation "btver2_intext_reg_128" 3 884*38fd1498Szrj (and (eq_attr "cpu" "btver2") 885*38fd1498Szrj (and (eq_attr "mode" "SF,QI,SI,HI,SI") 886*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 887*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 888*38fd1498Szrj (eq_attr "type" "sselog"))))) 889*38fd1498Szrj "btver2-direct,btver2-fpa") 890*38fd1498Szrj 891*38fd1498Szrj(define_insn_reservation "btver2_sse_mov_direct" 1 892*38fd1498Szrj (and (eq_attr "cpu" "btver2") 893*38fd1498Szrj (and (eq_attr "mode" "V2DF,V4SF") 894*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 895*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 896*38fd1498Szrj (eq_attr "type" "ssemov"))))) 897*38fd1498Szrj "btver2-direct,(btver2-fpa|btver2-fpm)") 898*38fd1498Szrj 899*38fd1498Szrj(define_insn_reservation "btver2_sse_mov_vector" 2 900*38fd1498Szrj (and (eq_attr "cpu" "btver2") 901*38fd1498Szrj (and (eq_attr "mode" "V2DF,V4SF") 902*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 903*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 904*38fd1498Szrj (eq_attr "type" "ssemov"))))) 905*38fd1498Szrj "btver2-vector,(btver2-fpa|btver2-fpm)*2") 906*38fd1498Szrj 907*38fd1498Szrj(define_insn_reservation "btver2_ssecomi_load_128" 8 908*38fd1498Szrj (and (eq_attr "cpu" "btver2") 909*38fd1498Szrj (and (eq_attr "mode" "TI") 910*38fd1498Szrj (and (eq_attr "memory" "load") 911*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 912*38fd1498Szrj (eq_attr "type" "ssecomi"))))) 913*38fd1498Szrj "btver2-direct,btver2-load,btver2-fpa") 914*38fd1498Szrj 915*38fd1498Szrj(define_insn_reservation "btver2_ssecomi_reg_128" 3 916*38fd1498Szrj (and (eq_attr "cpu" "btver2") 917*38fd1498Szrj (and (eq_attr "mode" "TI") 918*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 919*38fd1498Szrj (and (eq_attr "btver2_decode" "!vector") 920*38fd1498Szrj (eq_attr "type" "ssecomi"))))) 921*38fd1498Szrj "btver2-direct,btver2-fpa") 922*38fd1498Szrj 923*38fd1498Szrj(define_insn_reservation "btver2_ssemul_load_v2df" 14 924*38fd1498Szrj (and (eq_attr "cpu" "btver2") 925*38fd1498Szrj (and (eq_attr "mode" "V2DF") 926*38fd1498Szrj (and (eq_attr "memory" "load") 927*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 928*38fd1498Szrj (eq_attr "type" "ssemul"))))) 929*38fd1498Szrj "btver2-vector,btver2-load,btver2-fpm*2,btver2-fpa") 930*38fd1498Szrj 931*38fd1498Szrj(define_insn_reservation "btver2_ssemul_reg_v2df" 9 932*38fd1498Szrj (and (eq_attr "cpu" "btver2") 933*38fd1498Szrj (and (eq_attr "mode" "V2DF") 934*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 935*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 936*38fd1498Szrj (eq_attr "type" "ssemul"))))) 937*38fd1498Szrj "btver2-vector,btver2-fpm*2,btver2-fpa") 938*38fd1498Szrj 939*38fd1498Szrj(define_insn_reservation "btver2_ssemul_load_v4sf" 16 940*38fd1498Szrj (and (eq_attr "cpu" "btver2") 941*38fd1498Szrj (and (eq_attr "mode" "V4SF") 942*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 943*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 944*38fd1498Szrj (eq_attr "type" "ssemul"))))) 945*38fd1498Szrj "btver2-vector,btver2-load,btver2-fpm*3,btver2-fpa*2") 946*38fd1498Szrj 947*38fd1498Szrj(define_insn_reservation "btver2_ssemul_reg_v4sf" 11 948*38fd1498Szrj (and (eq_attr "cpu" "btver2") 949*38fd1498Szrj (and (eq_attr "mode" "V4SF") 950*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 951*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 952*38fd1498Szrj (eq_attr "type" "ssemul"))))) 953*38fd1498Szrj "btver2-vector,btver2-fpm*3,btver2-fpa*2") 954*38fd1498Szrj 955*38fd1498Szrj(define_insn_reservation "btver2_sse_store_vectmov" 8 956*38fd1498Szrj (and (eq_attr "cpu" "btver2") 957*38fd1498Szrj (and (eq_attr "memory" "load") 958*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 959*38fd1498Szrj (eq_attr "type" "ssemov")))) 960*38fd1498Szrj "btver2-vector,btver2-valu*3,btver2-store") 961*38fd1498Szrj 962*38fd1498Szrj(define_insn_reservation "btver2_sse_load_vectmov" 8 963*38fd1498Szrj (and (eq_attr "cpu" "btver2") 964*38fd1498Szrj (and (eq_attr "memory" "load") 965*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 966*38fd1498Szrj (eq_attr "type" "ssemov")))) 967*38fd1498Szrj "btver2-vector,btver2-load,btver2-valu*3") 968*38fd1498Szrj 969*38fd1498Szrj(define_insn_reservation "btver2_sse_vectmov" 3 970*38fd1498Szrj (and (eq_attr "cpu" "btver2") 971*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 972*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 973*38fd1498Szrj (eq_attr "type" "ssemov")))) 974*38fd1498Szrj "btver2-vector,btver2-valu*3") 975*38fd1498Szrj 976*38fd1498Szrj 977*38fd1498Szrj(define_insn_reservation "btver2_sseimul" 2 978*38fd1498Szrj (and (eq_attr "cpu" "btver2") 979*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 980*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 981*38fd1498Szrj (eq_attr "type" "sseimul")))) 982*38fd1498Szrj "btver2-direct,btver2-vimul") 983*38fd1498Szrj 984*38fd1498Szrj(define_insn_reservation "btver2_sseimul_load" 7 985*38fd1498Szrj (and (eq_attr "cpu" "btver2") 986*38fd1498Szrj (and (eq_attr "memory" "load") 987*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 988*38fd1498Szrj (eq_attr "type" "sseimul")))) 989*38fd1498Szrj "btver2-direct,btver2-load,btver2-vimul") 990*38fd1498Szrj 991*38fd1498Szrj(define_insn_reservation "btver2_sseimul_load_vect" 9 992*38fd1498Szrj (and (eq_attr "cpu" "btver2") 993*38fd1498Szrj (and (eq_attr "memory" "load") 994*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 995*38fd1498Szrj (eq_attr "type" "sseimul")))) 996*38fd1498Szrj "btver2-vector,btver2-load,btver2-vimul*2,btver2-valu") 997*38fd1498Szrj 998*38fd1498Szrj(define_insn_reservation "btver2_sseimul_vect" 4 999*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1000*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1001*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 1002*38fd1498Szrj (eq_attr "type" "sseimul")))) 1003*38fd1498Szrj "btver2-vector,btver2-vimul*2,btver2-valu") 1004*38fd1498Szrj 1005*38fd1498Szrj(define_insn_reservation "btver2_sseins" 3 1006*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1007*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1008*38fd1498Szrj (eq_attr "type" "sseins"))) 1009*38fd1498Szrj "btver2-vector,btver2-valu*3") 1010*38fd1498Szrj 1011*38fd1498Szrj(define_insn_reservation "btver2_sseishft_load" 6 1012*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1013*38fd1498Szrj (and (eq_attr "memory" "load") 1014*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1015*38fd1498Szrj (eq_attr "type" "sseishft")))) 1016*38fd1498Szrj "btver2-direct,btver2-load,btver2-valu") 1017*38fd1498Szrj 1018*38fd1498Szrj(define_insn_reservation "btver2_sseishft_direct" 1 1019*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1020*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1021*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1022*38fd1498Szrj (eq_attr "type" "sseishft")))) 1023*38fd1498Szrj "btver2-direct,btver2-valu") 1024*38fd1498Szrj 1025*38fd1498Szrj(define_insn_reservation "btver2_sselog1_load" 6 1026*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1027*38fd1498Szrj (and (eq_attr "mode" "!V8SF,!V4DF") 1028*38fd1498Szrj (and (eq_attr "memory" "load") 1029*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1030*38fd1498Szrj (eq_attr "type" "sselog1"))))) 1031*38fd1498Szrj "btver2-direct,btver2-load,btver2-valu") 1032*38fd1498Szrj 1033*38fd1498Szrj(define_insn_reservation "btver2_sselog1_direct" 1 1034*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1035*38fd1498Szrj (and (eq_attr "mode" "!V8SF,!V4DF") 1036*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1037*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1038*38fd1498Szrj (eq_attr "type" "sselog1"))))) 1039*38fd1498Szrj "btver2-direct,btver2-valu") 1040*38fd1498Szrj 1041*38fd1498Szrj(define_insn_reservation "btver2_sselog1_vector_load" 7 1042*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1043*38fd1498Szrj (and (eq_attr "memory" "load") 1044*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 1045*38fd1498Szrj (eq_attr "type" "sselog1")))) 1046*38fd1498Szrj "btver2-vector,btver2-valu*2") 1047*38fd1498Szrj 1048*38fd1498Szrj(define_insn_reservation "btver2_sselog1_vector" 2 1049*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1050*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1051*38fd1498Szrj (and (eq_attr "btver2_decode" "vector") 1052*38fd1498Szrj (eq_attr "type" "sselog1")))) 1053*38fd1498Szrj "btver2-vector,btver2-valu*2") 1054*38fd1498Szrj 1055*38fd1498Szrj(define_insn_reservation "btver2_sseadd_load" 8 1056*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1057*38fd1498Szrj (and (eq_attr "mode" "V4SF,V2DF") 1058*38fd1498Szrj (and (eq_attr "memory" "load") 1059*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1060*38fd1498Szrj (eq_attr "type" "sseadd,sseadd1"))))) 1061*38fd1498Szrj "btver2-direct,btver2-load,btver2-fpa") 1062*38fd1498Szrj 1063*38fd1498Szrj(define_insn_reservation "btver2_sseadd_reg" 3 1064*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1065*38fd1498Szrj (and (eq_attr "mode" "V4SF,V2DF") 1066*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1067*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1068*38fd1498Szrj (eq_attr "type" "sseadd,sseadd1"))))) 1069*38fd1498Szrj "btver2-direct,btver2-fpa") 1070*38fd1498Szrj 1071*38fd1498Szrj;;SSE2 SSEint SSEfp SSE 1072*38fd1498Szrj 1073*38fd1498Szrj(define_insn_reservation "btver2_sseint_to_scalar_move_with_load" 8 1074*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1075*38fd1498Szrj (and (eq_attr "mode" "SI,DI") 1076*38fd1498Szrj (and (eq_attr "memory" "load") 1077*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1078*38fd1498Szrj (eq_attr "type" "ssemov"))))) 1079*38fd1498Szrj "btver2-direct,btver2-load,btver2-fpa") 1080*38fd1498Szrj 1081*38fd1498Szrj(define_insn_reservation "btver2_sseint_to_scalar_move_with_store" 8 1082*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1083*38fd1498Szrj (and (eq_attr "mode" "SI,DI") 1084*38fd1498Szrj (and (eq_attr "memory" "store") 1085*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1086*38fd1498Szrj (eq_attr "type" "ssemov"))))) 1087*38fd1498Szrj "btver2-direct,btver2-fpa,btver2-store") 1088*38fd1498Szrj 1089*38fd1498Szrj 1090*38fd1498Szrj(define_insn_reservation "btver2_scalar_to_sseint_move_with_load" 11 1091*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1092*38fd1498Szrj (and (eq_attr "mode" "TI") 1093*38fd1498Szrj (and (ior ( match_operand:SI 1 "memory_operand") 1094*38fd1498Szrj ( match_operand:DI 1 "memory_operand")) 1095*38fd1498Szrj (eq_attr "type" "ssemov")))) 1096*38fd1498Szrj "btver2-direct,btver2-load,btver2-stc,btver2-valu") 1097*38fd1498Szrj 1098*38fd1498Szrj(define_insn_reservation "btver2_sseint_to_scalar" 3 1099*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1100*38fd1498Szrj (and (eq_attr "mode" "SI,DI") 1101*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1102*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1103*38fd1498Szrj (eq_attr "type" "ssemov"))))) 1104*38fd1498Szrj "btver2-direct,btver2-fpa") 1105*38fd1498Szrj 1106*38fd1498Szrj(define_insn_reservation "btver2_scalar_to_sseint" 6 1107*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1108*38fd1498Szrj (and (eq_attr "mode" "TI") 1109*38fd1498Szrj (and (ior ( match_operand:SI 1 "register_operand") 1110*38fd1498Szrj ( match_operand:DI 1 "register_operand")) 1111*38fd1498Szrj (eq_attr "type" "ssemov")))) 1112*38fd1498Szrj "btver2-direct,btver2-stc,btver2-valu") 1113*38fd1498Szrj 1114*38fd1498Szrj(define_insn_reservation "btver2_sse_int_load" 6 1115*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1116*38fd1498Szrj (and (eq_attr "mode" "TI") 1117*38fd1498Szrj (and (eq_attr "memory" "load") 1118*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1119*38fd1498Szrj (eq_attr "type" "ssemov,sselog,sseishft1"))))) 1120*38fd1498Szrj "btver2-direct,btver2-load,btver2-valu") 1121*38fd1498Szrj 1122*38fd1498Szrj(define_insn_reservation "btver2_sse_int_direct" 1 1123*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1124*38fd1498Szrj (and (eq_attr "mode" "TI") 1125*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1126*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1127*38fd1498Szrj (eq_attr "type" "ssemov,sselog,sseishft1"))))) 1128*38fd1498Szrj "btver2-direct,btver2-valu") 1129*38fd1498Szrj 1130*38fd1498Szrj(define_insn_reservation "btver2_sse_int_cvt_load" 6 1131*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1132*38fd1498Szrj (and (eq_attr "mode" "DI") 1133*38fd1498Szrj (and (eq_attr "memory" "load") 1134*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1135*38fd1498Szrj (eq_attr "type" "sseicvt"))))) 1136*38fd1498Szrj "btver2-direct,btver2-load,btver2-valu") 1137*38fd1498Szrj 1138*38fd1498Szrj(define_insn_reservation "btver2_sse_int_cvt" 1 1139*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1140*38fd1498Szrj (and (eq_attr "mode" "DI") 1141*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1142*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1143*38fd1498Szrj (eq_attr "type" "sseicvt"))))) 1144*38fd1498Szrj "btver2-direct,btver2-valu") 1145*38fd1498Szrj 1146*38fd1498Szrj(define_insn_reservation "btver2_sse_int_32_move" 3 1147*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1148*38fd1498Szrj (and (eq_attr "mode" "SI,DI") 1149*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1150*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1151*38fd1498Szrj (eq_attr "type" "ssemov"))))) 1152*38fd1498Szrj "btver2-direct,btver2-fpa") 1153*38fd1498Szrj 1154*38fd1498Szrj(define_insn_reservation "btver2_int_32_sse_move" 6 1155*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1156*38fd1498Szrj (and (eq_attr "mode" "TI") 1157*38fd1498Szrj (and (ior ( match_operand:SI 1 "register_operand") 1158*38fd1498Szrj ( match_operand:DI 1 "register_operand")) 1159*38fd1498Szrj (eq_attr "type" "ssemov")))) 1160*38fd1498Szrj "btver2-direct,btver2-stc,btver2-valu") 1161*38fd1498Szrj 1162*38fd1498Szrj(define_insn_reservation "btver2_sse2cvt_load_direct" 8 1163*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1164*38fd1498Szrj (and (eq_attr "mode" "TI,V4SF,V2DF,DI") 1165*38fd1498Szrj (and (eq_attr "memory" "load") 1166*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1167*38fd1498Szrj (eq_attr "type" "ssecvt"))))) 1168*38fd1498Szrj "btver2-direct,btver2-load,btver2-stc") 1169*38fd1498Szrj 1170*38fd1498Szrj(define_insn_reservation "btver2_sse2cvt_reg_direct" 3 1171*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1172*38fd1498Szrj (and (eq_attr "mode" "TI,V4SF,V2DF,DI") 1173*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1174*38fd1498Szrj (eq_attr "type" "ssecvt")))) 1175*38fd1498Szrj "btver2-direct,btver2-stc") 1176*38fd1498Szrj 1177*38fd1498Szrj(define_insn_reservation "btver2_sseicvt_load_si" 11 1178*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1179*38fd1498Szrj (and (eq_attr "mode" "SI") 1180*38fd1498Szrj (and (eq_attr "memory" "load") 1181*38fd1498Szrj (and (eq_attr "btver2_decode" "double") 1182*38fd1498Szrj (eq_attr "type" "sseicvt"))))) 1183*38fd1498Szrj "btver2-double,btver2-load,btver2-stc,btver2-fpa") 1184*38fd1498Szrj 1185*38fd1498Szrj(define_insn_reservation "btver2_sseicvt_si" 6 1186*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1187*38fd1498Szrj (and (eq_attr "mode" "SI") 1188*38fd1498Szrj (and (eq_attr "btver2_decode" "double") 1189*38fd1498Szrj (eq_attr "type" "sseicvt")))) 1190*38fd1498Szrj "btver2-double,btver2-stc,btver2-fpa") 1191*38fd1498Szrj 1192*38fd1498Szrj(define_insn_reservation "btver2_ssecvt_load_df" 11 1193*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1194*38fd1498Szrj (and (eq_attr "mode" "DF") 1195*38fd1498Szrj (and (eq_attr "memory" "load") 1196*38fd1498Szrj (and (eq_attr "btver2_decode" "double") 1197*38fd1498Szrj (eq_attr "type" "ssecvt"))))) 1198*38fd1498Szrj "btver2-double,btver2-load,btver2-stc*2") 1199*38fd1498Szrj 1200*38fd1498Szrj 1201*38fd1498Szrj(define_insn_reservation "btver2_ssecvt_df" 6 1202*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1203*38fd1498Szrj (and (eq_attr "mode" "DF") 1204*38fd1498Szrj (and (eq_attr "btver2_decode" "double") 1205*38fd1498Szrj (eq_attr "type" "ssecvt")))) 1206*38fd1498Szrj "btver2-double,btver2-stc*2") 1207*38fd1498Szrj 1208*38fd1498Szrj(define_insn_reservation "btver2_ssecvt_load_sf" 12 1209*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1210*38fd1498Szrj (and (eq_attr "mode" "SF") 1211*38fd1498Szrj (and (eq_attr "memory" "load") 1212*38fd1498Szrj (and (eq_attr "btver2_decode" "double") 1213*38fd1498Szrj (eq_attr "type" "ssecvt"))))) 1214*38fd1498Szrj "btver2-double,btver2-load,btver2-stc*2") 1215*38fd1498Szrj 1216*38fd1498Szrj(define_insn_reservation "btver2_ssecvt_sf" 7 1217*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1218*38fd1498Szrj (and (eq_attr "mode" "SF") 1219*38fd1498Szrj (and (eq_attr "btver2_decode" "double") 1220*38fd1498Szrj (eq_attr "type" "ssecvt")))) 1221*38fd1498Szrj "btver2-double,btver2-stc*2") 1222*38fd1498Szrj 1223*38fd1498Szrj(define_insn_reservation "btver2_sseicvt_load_df" 14 1224*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1225*38fd1498Szrj (and (eq_attr "mode" "DF,SF") 1226*38fd1498Szrj (and (eq_attr "memory" "load") 1227*38fd1498Szrj (and (eq_attr "btver2_decode" "double") 1228*38fd1498Szrj (eq_attr "type" "sseicvt"))))) 1229*38fd1498Szrj "btver2-double,btver2-load,btver2-stc") 1230*38fd1498Szrj;;st,ld-stc 1231*38fd1498Szrj(define_insn_reservation "btver2_sseicvt_df" 9 1232*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1233*38fd1498Szrj (and (eq_attr "mode" "DF,SF") 1234*38fd1498Szrj (and (eq_attr "btver2_decode" "double") 1235*38fd1498Szrj (eq_attr "type" "sseicvt")))) 1236*38fd1498Szrj "btver2-double,btver2-stc") 1237*38fd1498Szrj 1238*38fd1498Szrj 1239*38fd1498Szrj(define_insn_reservation "btver2_scalar_sse_load_add" 8 1240*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1241*38fd1498Szrj (and (eq_attr "mode" "DF,SF") 1242*38fd1498Szrj (and (eq_attr "memory" "load") 1243*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1244*38fd1498Szrj (eq_attr "type" "sseadd"))))) 1245*38fd1498Szrj "btver2-direct,btver2-load,btver2-fpa") 1246*38fd1498Szrj 1247*38fd1498Szrj(define_insn_reservation "btver2_scalar_sse_add" 3 1248*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1249*38fd1498Szrj (and (eq_attr "mode" "DF,SF") 1250*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1251*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1252*38fd1498Szrj (eq_attr "type" "sseadd"))))) 1253*38fd1498Szrj "btver2-direct,btver2-fpa") 1254*38fd1498Szrj 1255*38fd1498Szrj(define_insn_reservation "btver2_int_sse_cmp_load" 7 1256*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1257*38fd1498Szrj (and (eq_attr "mode" "V2DF,V4SF,DF,SF") 1258*38fd1498Szrj (and (eq_attr "memory" "load") 1259*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1260*38fd1498Szrj (eq_attr "type" "ssecmp"))))) 1261*38fd1498Szrj "btver2-direct,btver2-load,btver2-fpa") 1262*38fd1498Szrj 1263*38fd1498Szrj(define_insn_reservation "btver2_int_sse_cmp" 2 1264*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1265*38fd1498Szrj (and (eq_attr "mode" "V2DF,V4SF,DF,SF") 1266*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1267*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1268*38fd1498Szrj (eq_attr "type" "ssecmp"))))) 1269*38fd1498Szrj "btver2-direct,btver2-fpa") 1270*38fd1498Szrj 1271*38fd1498Szrj(define_insn_reservation "btver2_int_sse_comsi_load" 7 1272*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1273*38fd1498Szrj (and (eq_attr "mode" "DF,SF") 1274*38fd1498Szrj (and (eq_attr "memory" "load") 1275*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1276*38fd1498Szrj (eq_attr "type" "ssecomi"))))) 1277*38fd1498Szrj "btver2-direct,btver2-fpa") 1278*38fd1498Szrj 1279*38fd1498Szrj(define_insn_reservation "btver2_int_sse_comsi" 2 1280*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1281*38fd1498Szrj (and (eq_attr "mode" "DF,SF") 1282*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1283*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1284*38fd1498Szrj (eq_attr "type" "ssecomi"))))) 1285*38fd1498Szrj "btver2-direct,btver2-fpa") 1286*38fd1498Szrj 1287*38fd1498Szrj(define_insn_reservation "btver2_ssemmx_mov_load_default" 6 1288*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1289*38fd1498Szrj (and (eq_attr "memory" "load") 1290*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1291*38fd1498Szrj (eq_attr "type" "ssemov,mmxmov")))) 1292*38fd1498Szrj "btver2-direct,btver2-load,(btver2-fpa|btver2-fpm)") 1293*38fd1498Szrj 1294*38fd1498Szrj(define_insn_reservation "btver2_ssemmx_mov_store_default" 6 1295*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1296*38fd1498Szrj (and (eq_attr "memory" "store,both") 1297*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1298*38fd1498Szrj (eq_attr "type" "ssemov,mmxmov")))) 1299*38fd1498Szrj "btver2-direct,(btver2-fpa|btver2-fpm),btver2-store") 1300*38fd1498Szrj 1301*38fd1498Szrj(define_insn_reservation "btver2_sse_mov_default" 1 1302*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1303*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1304*38fd1498Szrj (and (eq_attr "btver2_decode" "direct") 1305*38fd1498Szrj (eq_attr "type" "ssemov,mmxmov")))) 1306*38fd1498Szrj "btver2-direct,(btver2-fpa|btver2-fpm)") 1307*38fd1498Szrj 1308*38fd1498Szrj(define_insn_reservation "btver2_sse_shuf_double" 2 1309*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1310*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1311*38fd1498Szrj (and (eq_attr "mode" "V4DF,V8SF") 1312*38fd1498Szrj (eq_attr "type" "sseshuf")))) 1313*38fd1498Szrj "btver2-double,(btver2-fpa|btver2-fpm)") 1314*38fd1498Szrj 1315*38fd1498Szrj(define_insn_reservation "btver2_sse_shuf_direct" 1 1316*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1317*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1318*38fd1498Szrj (and (eq_attr "mode" "V2DF,V4SF") 1319*38fd1498Szrj (eq_attr "type" "sseshuf,sseshuf1")))) 1320*38fd1498Szrj "btver2-direct,(btver2-fpa|btver2-fpm)") 1321*38fd1498Szrj 1322*38fd1498Szrj(define_insn_reservation "btver2_sse_shuf_double_load" 7 1323*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1324*38fd1498Szrj (and (eq_attr "memory" "load") 1325*38fd1498Szrj (and (eq_attr "mode" "V4DF,V8SF") 1326*38fd1498Szrj (eq_attr "type" "sseshuf")))) 1327*38fd1498Szrj "btver2-double,btver2-load,(btver2-fpa|btver2-fpm)") 1328*38fd1498Szrj 1329*38fd1498Szrj(define_insn_reservation "btver2_sse_shuf_direct_load" 6 1330*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1331*38fd1498Szrj (and (eq_attr "memory" "load") 1332*38fd1498Szrj (and (eq_attr "mode" "V2DF,V4SF") 1333*38fd1498Szrj (eq_attr "type" "sseshuf,sseshuf1")))) 1334*38fd1498Szrj "btver2-direct,btver2-load,(btver2-fpa|btver2-fpm)") 1335*38fd1498Szrj 1336*38fd1498Szrj(define_insn_reservation "btver2_sse_div" 19 1337*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1338*38fd1498Szrj (and (eq_attr "mode" "V2DF,DF,V4SF") 1339*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1340*38fd1498Szrj (eq_attr "type" "ssediv")))) 1341*38fd1498Szrj "btver2-direct,btver2-fpm*19") 1342*38fd1498Szrj 1343*38fd1498Szrj(define_insn_reservation "btver2_sse_div_sf" 14 1344*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1345*38fd1498Szrj (and (eq_attr "mode" "SF") 1346*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1347*38fd1498Szrj (eq_attr "type" "ssediv")))) 1348*38fd1498Szrj "btver2-direct,btver2-fpm*14") 1349*38fd1498Szrj 1350*38fd1498Szrj(define_insn_reservation "btver2_sse_mul" 4 1351*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1352*38fd1498Szrj (and (eq_attr "mode" "V2DF,DF,V4SF,SF") 1353*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1354*38fd1498Szrj (eq_attr "type" "ssemul")))) 1355*38fd1498Szrj "btver2-direct,btver2-fpm*2") 1356*38fd1498Szrj 1357*38fd1498Szrj(define_insn_reservation "btver2_sse_mul_sf" 2 1358*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1359*38fd1498Szrj (and (eq_attr "mode" "V2DF,DF,V4SF,SF") 1360*38fd1498Szrj (and (eq_attr "memory" "none,unknown") 1361*38fd1498Szrj (eq_attr "type" "ssemul")))) 1362*38fd1498Szrj "btver2-direct,btver2-fpm") 1363*38fd1498Szrj 1364*38fd1498Szrj(define_insn_reservation "btver2_sse_div_load" 24 1365*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1366*38fd1498Szrj (and (eq_attr "mode" "V2DF,DF,V4SF") 1367*38fd1498Szrj (and (eq_attr "memory" "load") 1368*38fd1498Szrj (eq_attr "type" "ssediv")))) 1369*38fd1498Szrj "btver2-direct,btver2-load,btver2-fpm*19") 1370*38fd1498Szrj 1371*38fd1498Szrj(define_insn_reservation "btver2_sse_div_sf_load" 19 1372*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1373*38fd1498Szrj (and (eq_attr "mode" "SF") 1374*38fd1498Szrj (and (eq_attr "memory" "load") 1375*38fd1498Szrj (eq_attr "type" "ssediv")))) 1376*38fd1498Szrj "btver2-direct,btver2-load,btver2-fpm*14") 1377*38fd1498Szrj 1378*38fd1498Szrj(define_insn_reservation "btver2_sse_mul_load" 9 1379*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1380*38fd1498Szrj (and (eq_attr "mode" "V2DF,DF,V4SF,SF") 1381*38fd1498Szrj (and (eq_attr "memory" "load") 1382*38fd1498Szrj (eq_attr "type" "ssemul")))) 1383*38fd1498Szrj "btver2-direct,btver2-load,btver2-fpm*2") 1384*38fd1498Szrj 1385*38fd1498Szrj(define_insn_reservation "btver2_sse_mul_sf_load" 7 1386*38fd1498Szrj (and (eq_attr "cpu" "btver2") 1387*38fd1498Szrj (and (eq_attr "mode" "V2DF,DF,V4SF,SF") 1388*38fd1498Szrj (and (eq_attr "memory" "load") 1389*38fd1498Szrj (eq_attr "type" "ssemul")))) 1390*38fd1498Szrj "btver2-direct,btver2-load,btver2-fpm") 1391*38fd1498Szrj 1392