1.\" 2.\" Copyright (c) 2006 The DragonFly Project. All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions and the following disclaimer. 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in 12.\" the documentation and/or other materials provided with the 13.\" distribution. 14.\" 3. Neither the name of The DragonFly Project nor the names of its 15.\" contributors may be used to endorse or promote products derived 16.\" from this software without specific, prior written permission. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20.\" LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 21.\" FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 22.\" COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 23.\" INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 24.\" BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25.\" LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 26.\" AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 27.\" OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 28.\" OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29.\" SUCH DAMAGE. 30.\" 31.Dd May 24, 2015 32.Dt ECC 4 33.Os 34.Sh NAME 35.Nm ecc 36.Nd ECC memory controller support 37.Sh SYNOPSIS 38To compile this driver into the kernel, 39place the following lines in your 40kernel configuration file: 41.Bd -ragged -offset indent 42.Cd "device dimm" 43.Cd "device coremctl" 44.Cd "device ecc" 45.Ed 46.Pp 47Alternatively, to load the driver as a 48module at boot time, place the following line in 49.Xr loader.conf 5 : 50.Bd -literal -offset indent 51ecc_load="YES" 52.Ed 53.Sh DESCRIPTION 54The 55.Nm 56provides support for ECC memory controllers. 57If ECC support is enabled in the BIOS, 58the number of ECC errors is exposed through 59.Dv HW_SENSORS 60.Xr sysctl 61tree. 62For example: 63.Bd -literal -offset indent 64% sysctl hw.sensors 65hw.sensors.dimm0.ecc0: 0 (node0 chan0 DIMM0 ecc), OK 66hw.sensors.dimm1.ecc0: 0 (node0 chan1 DIMM0 ecc), OK 67.Ed 68.Pp 69The DIMM location and configurable threshold of ECC errors 70is exposed through hw.dimminfo 71.Xr sysctl 3 72tree. 73For example: 74.Bd -literal -offset indent 75% sysctl hw.dimminfo 76hw.dimminfo.dimm0.node: 0 77hw.dimminfo.dimm0.chan: 0 78hw.dimminfo.dimm0.slot: 0 79hw.dimminfo.dimm0.ecc_thresh: 10 80hw.dimminfo.dimm1.node: 0 81hw.dimminfo.dimm1.chan: 1 82hw.dimminfo.dimm1.slot: 0 83hw.dimminfo.dimm1.ecc_thresh: 10 84.Ed 85.Pp 86If the number of ECC errors goes above the configured threshold 87(ecc_thresh), 88a notify event will be sent using 89.Xr devctl 4 . 90.Sh HARDWARE 91The 92.Nm 93driver supports the following memory controllers: 94.Pp 95.Bl -bullet -compact 96.It 97AMD 8000 memory controller 98.It 99AMD 8151 memory controller 100.It 101Intel E3 memory controller 102.It 103Intel E3 v2 memory controller 104.It 105Intel E3 v3 memory controller 106.\".It 107.\"Intel X3400 memory controller 108.It 109Intel E5 v2 memory controller 110.It 111Intel E5 v3 memory controller 112.El 113.Sh SEE ALSO 114.Xr systat 1 , 115.Xr sysctl 3 , 116.Xr devctl 4 , 117.Xr devd 8 , 118.Xr sensorsd 8 , 119.Xr sysctl 8 120.Sh HISTORY 121The 122.Nm 123device driver first appeared in 124.Dx 1.7 . 125.Sh AUTHORS 126The 127.Nm 128driver was written by 129.An Matthew Dillon . 130