1.\" Copyright (c) 1998, 1999, Nicolas Souchu 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. 9.\" 2. Redistributions in binary form must reproduce the above copyright 10.\" notice, this list of conditions and the following disclaimer in the 11.\" documentation and/or other materials provided with the distribution. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23.\" SUCH DAMAGE. 24.\" 25.\" $FreeBSD: src/share/man/man4/ppc.4,v 1.13.4.4 2001/08/17 13:08:39 ru Exp $ 26.\" 27.Dd March 5, 1998 28.Dt PPC 4 29.Os 30.Sh NAME 31.Nm ppc 32.Nd Parallel Port Chipset driver 33.Sh SYNOPSIS 34.Cd "device ppc0 at isa? port? flags 0xXX irq 7" 35.Pp 36For one or more PPBUS busses: 37.Cd "device ppbus at ppc0" 38.Sh DESCRIPTION 39The 40.Nm 41driver provides low level support to various parallel port chipsets for the 42.Xr ppbus 4 43system. 44.Pp 45During the probe phase, 46.Nm 47detects parallel port chipsets and initializes 48private data according to their operating mode: COMPATIBLE, 49NIBBLE, PS/2, EPP, ECP and other mixed modes. 50If a mode is provided at startup through the 51.Va flags 52variable of the boot 53interface, the operating mode of the chipset is forced according to 54.Va flags 55and the hardware supported modes. 56.Pp 57During the attach phase, 58.Nm 59allocates a ppbus structure, initializes it and calls the ppbus 60attach function. 61.Ss Supported flags 62.Bl -item -offset indent 63.It 64bits 0-3: chipset forced mode(s) 65.Bd -literal 66PPB_COMPATIBLE 0x0 /* Centronics compatible mode */ 67PPB_NIBBLE 0x1 /* reverse 4 bit mode */ 68PPB_PS2 0x2 /* PS/2 byte mode */ 69PPB_EPP 0x4 /* EPP mode, 32 bit */ 70PPB_ECP 0x8 /* ECP mode */ 71.Ed 72.Pp 73And any mixed values. 74.It 75bit 4: EPP protocol (0 EPP 1.9, 1 EPP 1.7) 76.It 77bit 5: activate IRQ (1 IRQ disabled, 0 IRQ enabled) 78.It 79bit 6: disable chipset specific detection 80.It 81bit 7: disable FIFO detection 82.El 83.Ss Supported chipsets 84Some parallel port chipsets are explicitly supported: 85detection and initialisation code has been written according to 86their datasheets. 87.Bl -bullet -offset indent 88.It 89SMC FDC37C665GT and FDC37C666GT chipsets 90.It 91Natsemi PC873xx-family (PC87332 and PC87306) 92.It 93Winbond W83877xx-family (W83877F and W83877AF) 94.It 95SMC-like chipsets with mixed modes (see 96.Xr ppbus 4 ) 97.El 98.Ss Adding support to a new chipset 99You may want to add support for the newest chipset your motherboard was 100sold with. 101For the ISA bus, just retrieve the specs of the chipset and write the 102corresponding 103.Fn ppc_mychipset_detect "" 104function. 105Then add an entry to the general purpose 106.Fn ppc_detect "" 107function. 108.Pp 109Your 110.Fn ppc_mychipset_detect "" 111function should ensure that if the mode field of the 112.Va flags 113boot variable is not null, then the operating 114mode is forced to the given mode and no other mode is available and 115ppb->ppb_avm field contains the available modes of the chipset. 116.Sh SEE ALSO 117.Xr ppbus 4 , 118.Xr ppi 4 119.Sh BUGS 120The chipset detection process may corrupt your chipset configuration. 121You may 122disable chipset specific detection by using the above flags. 123.Sh HISTORY 124The 125.Nm 126manual page first appeared in 127.Fx 3.0 . 128.Sh AUTHORS 129This manual page was written by 130.An Nicolas Souchu . 131