1.\" 2.\" Copyright (c) 2002, 2003, 2004 The DragonFly Project. All rights reserved. 3.\" 4.\" This code is derived from software contributed to The DragonFly Project 5.\" by Hiten Pandya <hmp@backplane.com>. 6.\" 7.\" Redistribution and use in source and binary forms, with or without 8.\" modification, are permitted provided that the following conditions 9.\" are met: 10.\" 11.\" 1. Redistributions of source code must retain the above copyright 12.\" notice, this list of conditions and the following disclaimer. 13.\" 2. Redistributions in binary form must reproduce the above copyright 14.\" notice, this list of conditions and the following disclaimer in 15.\" the documentation and/or other materials provided with the 16.\" distribution. 17.\" 3. Neither the name of The DragonFly Project nor the names of its 18.\" contributors may be used to endorse or promote products derived 19.\" from this software without specific, prior written permission. 20.\" 21.\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23.\" LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 24.\" FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 25.\" COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26.\" INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 27.\" BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28.\" LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 29.\" AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30.\" OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31.\" OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32.\" SUCH DAMAGE. 33.\" 34.\" Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 35.\" All rights reserved. 36.\" 37.\" This code is derived from software contributed to The NetBSD Foundation 38.\" by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 39.\" NASA Ames Research Center. 40.\" 41.\" Redistribution and use in source and binary forms, with or without 42.\" modification, are permitted provided that the following conditions 43.\" are met: 44.\" 1. Redistributions of source code must retain the above copyright 45.\" notice, this list of conditions and the following disclaimer. 46.\" 2. Redistributions in binary form must reproduce the above copyright 47.\" notice, this list of conditions and the following disclaimer in the 48.\" documentation and/or other materials provided with the distribution. 49.\" 3. All advertising materials mentioning features or use of this software 50.\" must display the following acknowledgment: 51.\" This product includes software developed by the NetBSD 52.\" Foundation, Inc. and its contributors. 53.\" 4. Neither the name of The NetBSD Foundation nor the names of its 54.\" contributors may be used to endorse or promote products derived 55.\" from this software without specific prior written permission. 56.\" 57.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 58.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 59.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 60.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 61.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67.\" POSSIBILITY OF SUCH DAMAGE. 68.\" 69.\" $FreeBSD: /repoman/r/ncvs/src/share/man/man9/bus_dma.9,v 1.7 2003/07/27 14:05:29 mux Exp $ 70.\" $NetBSD: bus_dma.9,v 1.25 2002/10/14 13:43:16 wiz Exp $ 71.\" 72.Dd January 11, 2010 73.Dt BUS_DMA 9 74.Os 75.Sh NAME 76.Nm bus_dma , 77.Nm bus_dma_tag_create , 78.Nm bus_dma_tag_destroy , 79.Nm bus_dmamap_create , 80.Nm bus_dmamap_destroy , 81.Nm bus_dmamap_load , 82.Nm bus_dmamap_load_mbuf , 83.Nm bus_dmamap_load_mbuf_segment , 84.Nm bus_dmamap_load_mbuf_defrag , 85.Nm bus_dmamap_load_uio , 86.Nm bus_dmamap_unload , 87.Nm bus_dmamap_sync , 88.Nm bus_dmamem_alloc , 89.Nm bus_dmamem_coherent , 90.Nm bus_dmamem_coherent_any , 91.Nm bus_dmamem_free 92.Nd Bus and Machine Independent DMA Mapping Interface 93.Sh SYNOPSIS 94.In sys/bus.h 95.Ft int 96.Fn bus_dma_tag_create "bus_dma_tag_t parent" "bus_size_t alignment" \ 97"bus_size_t boundary" "bus_addr_t lowaddr" "bus_addr_t highaddr" \ 98"bus_dma_filter_t *filtfunc" "void *filtfuncarg" "bus_size_t maxsize" \ 99"int nsegments" "bus_size_t maxsegsz" "int flags" "bus_dma_tag_t *dmat" 100.Ft int 101.Fn bus_dma_tag_destroy "bus_dma_tag_t dmat" 102.Ft int 103.Fn bus_dmamap_create "bus_dma_tag_t dmat" "int flags" "bus_dmamap_t *mapp" 104.Ft int 105.Fn bus_dmamap_destroy "bus_dma_tag_t dmat" "bus_dmamap_t map" 106.Ft int 107.Fn bus_dmamap_load "bus_dma_tag_t dmat" "bus_dmamap_t map" "void *buf" \ 108"bus_size_t buflen" "bus_dmamap_callback_t *callback" "void *callback_arg" \ 109"int flags" 110.Ft int 111.Fn bus_dmamap_load_mbuf "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 112"struct mbuf *mbuf" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 113"int flags" 114.Ft int 115.Fn bus_dmamap_load_mbuf_segment "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 116"struct mbuf *mbuf" "bus_dma_segment_t *segs" "int maxsegs" "int *nsegs" \ 117"int flags" 118.Ft int 119.Fn bus_dmamap_load_mbuf_defrag "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 120"struct mbuf **mbuf" "bus_dma_segment_t *segs" "int maxsegs" "int *nsegs" \ 121"int flags" 122.Ft int 123.Fn bus_dmamap_load_uio "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 124"struct uio *uio" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 125"int flags" 126.Ft int 127.Fn bus_dmamem_alloc "bus_dma_tag_t dmat" "void **vaddr" \ 128"int flags" "bus_dmamap_t *mapp" 129.Ft int 130.Fn bus_dmamem_coherent "bus_dma_tag_t parent" "bus_size_t alignment" \ 131"bus_size_t boundary" "bus_addr_t lowaddr" "bus_addr_t highaddr" \ 132"bus_size_t maxsize" "int flags" "bus_dmamem_t *dmem" 133.Ft void * 134.Fn bus_dmamem_coherent_any "bus_dma_tag_t parent" "bus_size_t alignment" \ 135"bus_size_t maxsize" "int flags" "bus_dma_tag_t *dtag" "bus_dmamap_t *dmap" \ 136"bus_addr_t *busaddr" 137.Ft void 138.Fn bus_dmamap_unload "bus_dma_tag_t dmat" "bus_dmamap_t map" 139.Ft void 140.Fn bus_dmamap_sync "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 141"bus_dmasync_op_t op" 142.Ft void 143.Fn bus_dmamem_free "bus_dma_tag_t dmat" "void *vaddr" \ 144"bus_dmamap_t map" 145.Sh DESCRIPTION 146Direct Memory Access (DMA) is a method of transferring data 147without involving the CPU, thus providing higher performance. 148A DMA transaction can be achieved between device to memory, 149device to device, or memory to memory. 150.Pp 151The 152.Nm 153API is a bus, device, and machine-independent (MI) interface to 154DMA mechanisms. 155It provides the client with flexibility and simplicity by 156abstracting machine dependent issues like setting up 157DMA mappings, handling cache issues, bus specific features 158and limitations. 159.Sh STRUCTURES AND TYPES 160.Bl -tag -width compact 161.It Vt bus_dma_tag_t 162A machine-dependent (MD) opaque type that describes the 163characteristics of DMA transactions. 164DMA tags are organized into a hierarchy, with each child 165tag inheriting the restrictions of its parent. 166This allows all devices along the path of DMA transactions 167to contribute to the constraints of those transactions. 168.It Vt bus_dma_filter_t 169Client specified address filter having the format: 170.Bl -tag -width compact 171.It Ft int 172.Fn "client_filter" "void *filtarg" "bus_addr_t testaddr" 173.El 174.sp 175Address filters can be specified during tag creation to allow 176for devices who's DMA address restrictions cannot be specified 177by a single window. 178The 179.Fa filtarg 180is client specified during tag creation to be passed to all 181invocations of the callback. 182The 183.Fa testaddr 184argument contains a potential starting address of a DMA mapping. 185The filter function operates on the set of addresses from 186.Fa testaddr 187to 188.Ql trunc_page(testaddr) + PAGE_SIZE - 1 , 189inclusive. 190The filter function should return zero for any mapping in this range 191that can be accommodated by the device and non-zero otherwise. 192.It Vt bus_dma_segment_t 193A machine-dependent type that describes individual 194DMA segments. 195.Bd -literal 196 bus_addr_t ds_addr; 197 bus_size_t ds_len; 198.Ed 199.sp 200The 201.Fa ds_addr 202field contains the device visible address of the DMA segment, and 203.Fa ds_len 204contains the length of the DMA segment. 205Although the DMA segments returned by a mapping call will adhere to 206all restrictions necessary for a successful DMA operation, some conversion 207(e.g. a conversion from host byte order to the device's byte order) is 208almost always required when presenting segment information to the device. 209.It Vt bus_dmamap_t 210A machine-dependent opaque type describing an individual mapping. 211Multiple DMA maps can be associated with one DMA tag. 212.It Vt bus_dmamem_t 213A machine-dependent type that describes DMA memory created by 214.Fn bus_dmamem_coherent . 215.Bd -literal 216 bus_dma_tag_t dmem_tag; 217 bus_dmamap_t dmem_map; 218 void *dmem_addr; 219 bus_addr_t dmem_busaddr; 220.Ed 221.sp 222The 223.Fa dmem_tag 224field contains the DMA tag of the DMA memory and 225.Fa dmem_map 226field contains the DMA map of the DMA memory. 227The 228.Fa dmem_addr 229field points to the allocated DMA memory in kernel virtual address space. 230The 231.Fa dmem_busaddr 232field contains the device visible address of the DMA memory. 233.It Vt bus_dmamap_callback_t 234Client specified callback for receiving mapping information resulting from 235the load of a 236.Vt bus_dmamap_t 237via 238.Fn bus_dmamap_load . 239Callbacks are of the format: 240.Bl -tag -width compact 241.It Ft void 242.Fn "client_callback" "void *callback_arg" "bus_dma_segment_t *segs" \ 243"int nseg" "int error" 244.El 245.sp 246The 247.Fa callback_arg 248is the callback argument passed to dmamap load functions. 249The 250.Fa segs 251and 252.Fa nseg 253parameters describe an array of 254.Vt bus_dma_segment_t 255structures that represent the mapping. 256This array is only valid within the scope of the callback function. 257The success or failure of the mapping is indicated by the 258.Fa error 259parameter. 260More information on the use of callbacks can be found in the 261description of the individual dmamap load functions. 262.It Vt bus_dmamap_callback2_t 263Client specified callback for receiving mapping information resulting from 264the load of a 265.Vt bus_dmamap_t 266via 267.Fn bus_dmamap_load_uio 268or 269.Fn bus_dmamap_load_mbuf . 270.sp 271Callback2s are of the format: 272.Bl -tag -width compact 273.It Ft void 274.Fn "client_callback2" "void *callback_arg" "bus_dma_segment_t *segs" \ 275"int nseg" "bus_size_t mapsize" "int error" 276.El 277.sp 278Callback2's behavior is the same as 279.Vt bus_dmamap_callback_t 280with the addition that the length of the data mapped is provided via 281.Fa mapsize . 282.It Vt bus_dmasync_op_t 283Memory synchronization operation specifier. 284Bus DMA requires explicit synchronization of memory with it's device 285visible mapping in order to guarantee memory coherency. 286The 287.Vt bus_dmasync_op_t 288allows the type of DMA operation that will be or has been performed 289to be communicated to the system so that the correct coherency measures 290are taken. 291All operations specified below are performed from the DMA engine's 292point of view: 293.Bl -tag -width BUS_DMASYNC_POSTWRITE 294.It Dv BUS_DMASYNC_PREREAD 295Perform any synchronization required after an update of memory by the CPU 296but prior to DMA read operations. 297.It Dv BUS_DMASYNC_PREWRITE 298Perform any synchronization required after an update of memory by the CPU 299but prior to DMA write operations. 300.It Dv BUS_DMASYNC_POSTREAD 301Perform any synchronization required after DMA read operations, but prior 302to CPU access of the memory. 303.It Dv BUS_DMASYNC_POSTWRITE 304Perform any synchronization required after DMA write operations, but prior 305to CPU access of the memory. 306.El 307.El 308.sp 309.Sh FUNCTIONS 310.Bl -tag -width compact 311.It Fn bus_dma_tag_create "parent" "alignment" "boundary" "lowaddr" \ 312"highaddr" "*filtfunc" "*filtfuncarg" "maxsize" "nsegments" "maxsegsz" \ 313"flags" "*dmat" 314Allocates a device specific DMA tag, and initializes it according to 315the arguments provided: 316.Bl -tag -width *filtfuncarg -compact 317.It Fa parent 318Indicates restrictions between the parent bridge, CPU memory, and the 319device. 320May be NULL, if no DMA restrictions are to be inherited. 321.It Fa alignment 322Alignment constraint, in bytes, of any mappings created using this tag. 323The alignment must be a power of 2. 324Hardware that can DMA starting at any address would specify 325.Em 1 326for byte alignment. 327Hardware requiring DMA transfers to start on a multiple of 4K 328would specify 329.Em 4096 . 330.It Fa boundary 331Boundary constraint, in bytes, of the target DMA memory region. 332The boundary indicates the set of addresses, all multiples of the 333boundary argument, that cannot be crossed by a single 334.Vt bus_dma_segment_t . 335The boundary must be either a power of 2 or 0. 336.Ql 0 337indicates that there are no boundary restrictions. 338.It Fa lowaddr 339.It Fa highaddr 340Bounds of the window of bus address space that 341.Em cannot 342be directly accessed by the device. 343The window contains all address greater than lowaddr and 344less than or equal to highaddr. 345For example, a device incapable of DMA above 4GB, would specify 346a highaddr of 347.Dv BUS_SPACE_MAXADDR 348and a lowaddr of 349.Dv BUS_SPACE_MAXADDR_32BIT . 350Similarly a device that can only dma to addresses bellow 16MB would 351specify a highaddr of 352.Dv BUS_SPACE_MAXADDR 353and a lowaddr of 354.Dv BUS_SPACE_MAXADDR_24BIT . 355Some implementations requires that some region of device visible 356address space, overlapping available host memory, be outside the 357window. 358This area of 359.Ql safe memory 360is used to bounce requests that would otherwise conflict with 361the exclusion window. 362.It Fa filtfunc 363Optional filter function (may be NULL) to be called for any attempt to 364map memory into the window described by 365.Fa lowaddr 366and 367.Fa highaddr . 368A filter function is only required when the single window described 369by 370.Fa lowaddr 371and 372.Fa highaddr 373cannot adequately describe the constraints of the device. 374The filter function will be called for every machine page 375that overlaps the exclusion window. 376.It Fa filtfuncarg 377Argument passed to all calls to the filter function for this tag. 378May be NULL. 379.It Fa maxsize 380Maximum size, in bytes, of the sum of all segment lengths in a given 381DMA mapping associated with this tag. 382.It Fa nsegments 383Number of discontinuities (scatter/gather segments) allowed 384in a DMA mapped region. 385If there is no restriction, 386.Dv BUS_SPACE_UNRESTRICTED 387may be specified. 388.It Fa maxsegsz 389Maximum size, in bytes, of a segment in any DMA mapped region associated 390with 391.Fa dmat . 392.It Fa flags 393Are as follows: 394.Bl -tag -width ".Dv BUS_DMA_PRIVBZONE" -compact 395.It Dv BUS_DMA_ALLOCNOW 396Allocate the minimum resources necessary to guarantee that all map load 397operations associated with this tag may not block. 398If sufficient resources are not available, 399.Er ENOMEM 400is returned. 401.It Dv BUS_DMA_WAITOK 402Indicates that it is OK to wait for resources. 403However, 404unlike 405.Xr kmalloc 9 , 406it is not guaranteed that the resource allocation will succeed. 407This flag is the default one, 408if 409.Dv BUS_DMA_NOWAIT 410is not supplied. 411.It Dv BUS_DMA_NOWAIT 412If the resource allocation request cannot be immediately fulfilled, 413.Er ENOMEM 414is returned. 415.It Dv BUS_DMA_ONEBPAGE 416Allocte one bounce page at most, 417even if the 418.Fa maxsize 419indicates that multiple bounce pages are needed. 420.It Dv BUS_DMA_ALIGNED 421Indicates that all memory to be loaded into the DMA maps associated 422with this DMA tag is properly aligned according to 423.Fa alignment 424constraint. 425No resources, 426e.g. bounce pages, 427will be allocated due to the 428.Fa alignment 429constraint. 430If unaligned memory was loaded into the DMA maps associated with this DMA tag, 431system will panic. 432.It Dv BUS_DMA_PRIVBZONE 433Uses a private bounce zone instead of a shared one. 434A private bounce zone will vanish if the DMA tag is destroyed. 435.It Dv BUS_DMA_ALLOCALL 436Allocate all required resources (mainly the bounce buffer). 437If any allocation fails, 438.Fn bus_dma_tag_create 439fails. 440.It Dv BUS_DMA_PROTECTED 441All of the functions called with the DMA tag are already protected by the 442caller, so the 443.Nm 444code need not protect the internal data structures. 445.El 446.It Fa dmat 447Pointer to a bus_dma_tag_t where the resulting DMA tag will 448be stored. 449.El 450.Pp 451Returns 452.Er ENOMEM 453if sufficient memory is not available for tag creation 454or allocating mapping resources. 455.It Fn bus_dma_tag_destroy "dmat" 456Deallocate the DMA tag 457.Fa dmat 458that was created by 459.Fn bus_dma_tag_create . 460.Pp 461Returns 462.Er EBUSY 463if any DMA maps remain associated with 464.Fa dmat 465or 466.Ql 0 467on success. 468.It Fn bus_dmamap_create "dmat" "flags" "*mapp" 469Allocates and initializes a DMA map. 470Arguments are as follows: 471.Bl -tag -width nsegments -compact 472.It Fa dmat 473DMA tag. 474.It Fa flags 475Are as follows: 476.Bl -tag -width ".Dv BUS_DMA_ONEBPAGE" -compact 477.It Dv BUS_DMA_WAITOK 478Indicates that it is OK to wait for resources. 479However, 480unlike 481.Xr kmalloc 9 , 482it is not guaranteed that the resource allocation will succeed. 483This flag is the default one, 484if 485.Dv BUS_DMA_NOWAIT 486is not supplied. 487.It Dv BUS_DMA_NOWAIT 488If the resource allocation request cannot be immediately fulfilled, 489.Er ENOMEM 490is returned. 491.It Dv BUS_DMA_ONEBPAGE 492Allocte one bounce page at most, 493even if the 494.Fa maxsize 495used to create the 496.Fa dmat 497indicates that multiple bounce pages are needed. 498.El 499.It Fa mapp 500Pointer to a 501.Vt bus_dmamap_t 502where the resulting DMA map will be stored. 503.El 504.Pp 505Returns 506.Er ENOMEM 507if sufficient memory is not available for creating the 508map or allocating mapping resources. 509.It Fn bus_dmamap_destroy "dmat" "map" 510Frees all resources associated with a given DMA map. 511Arguments are as follows: 512.Bl -tag -width dmat -compact 513.It Fa dmat 514DMA tag used to allocate 515.Fa map . 516.It Fa map 517The DMA map to destroy. 518.El 519.Pp 520Returns 521.Er EBUSY 522if a mapping is still active for 523.Fa map . 524.It Fn bus_dmamap_load "dmat" "map" "buf" "buflen" "*callback" "..." 525Creates a mapping in device visible address space of 526.Fa buflen 527bytes of 528.Fa buf , 529associated with the DMA map 530.Fa map . 531Arguments are as follows: 532.Bl -tag -width buflen -compact 533.It Fa dmat 534DMA tag used to allocate 535.Fa map . 536.It Fa map 537A DMA map without a currently active mapping. 538.It Fa buf 539A kernel virtual address pointer to a contiguous (in KVA) buffer, to be 540mapped into device visible address space. 541.It Fa buflen 542The size of the buffer. 543.It Fa callback Fa callback_arg 544The callback function, and its argument. 545.It Fa flags 546The value of this argument is currently undefined, and should be 547specified as 548.Ql 0 . 549.El 550.Pp 551Return values to the caller are as follows: 552.Bl -tag -width ".Er EINPROGRESS" -compact 553.It 0 554The callback has been called and completed. 555The status of the mapping has been delivered to the callback. 556.It Er EINPROGRESS 557The mapping has been deferred for lack of resources. 558The callback will be called as soon as resources are available. 559Callbacks are serviced in FIFO order. 560DMA maps created from DMA tags that are allocated with 561the 562.Dv BUS_DMA_ALLOCNOW 563flag will never return this status for a load operation. 564.It Er EINVAL 565The load request was invalid. 566The callback has not, and will not be called. 567This error value may indicate that 568.Fa dmat , 569.Fa map , 570.Fa buf , 571or 572.Fa callback 573were invalid, or 574.Fa buslen 575was larger than the 576.Fa maxsize 577argument used to create the dma tag 578.Fa dmat . 579.El 580.Pp 581When the callback is called, it is presented with an error value 582indicating the disposition of the mapping. 583Error may be one of the following: 584.Bl -tag -width ".Er EINPROGRESS" -compact 585.It 0 586The mapping was successful and the 587.Fa dm_segs 588callback argument contains an array of 589.Vt bus_dma_segment_t 590elements describing the mapping. 591This array is only valid during the scope of the callback function. 592.It Er EFBIG 593A mapping could not be achieved within the segment constraints provided 594in the tag even though the requested allocation size was less than maxsize. 595.El 596.It Fn bus_dmamap_load_mbuf "dmat" "map" "mbuf" "callback2" "callback_arg" \ 597"flags" 598This is a variation of 599.Fn bus_dmamap_load 600which maps mbuf chains 601for DMA transfers. 602A 603.Vt bus_size_t 604argument is also passed to the callback routine, which 605contains the mbuf chain's packet header length. 606.Pp 607Mbuf chains are assumed to be in kernel virtual address space. 608.Pp 609Returns 610.Er EINVAL 611if the size of the mbuf chain exceeds the maximum limit of the 612DMA tag. 613.It Fn bus_dmamap_load_mbuf_segment "dmat" "map" "mbuf" "*segs" "maxsegs" \ 614"*nsegs" "flags" 615It is like 616.Fn bus_dmamap_load_mbuf 617without callback. 618Segmentation information are saved in the 619.Fa segs 620and 621.Fa nsegs 622if the loading is successful. 623The 624.Fa maxsegs , 625which indicates the number of elements in the 626.Fa segs , 627must be set by the caller and must be at least 1 but less than the 628.Fa nsegments 629used to create the 630.Fa dmat . 631The 632.Fa flags 633must have 634.Dv BUS_DMA_NOWAIT 635turned on. 636.Pp 637This function will not block. 638When system is short of DMA resources, 639this function will return 640.Er ENOMEM , 641instead of 642.Er EINPROGRESS . 643.It Fn bus_dmamap_load_mbuf_defrag "dmat" "map" "*mbuf" "*segs" "maxsegs" \ 644"*nsegs" "flags" 645This function is like 646.Fn bus_dmamap_load_mbuf_segment , 647but it will call 648.Fn m_defrag 649on the 650.Fa *mbuf 651and try reloading, 652if low level code indicates too many fragments in the 653.Fa *mbuf ; 654the 655.Fa mbuf 656will be updated under this situation. 657However, 658.Fa *mbuf 659would not be freed by this function, 660even if 661.Fn m_defrag 662failed. 663.Pp 664Return 665.Er ENOBUFS , 666if the calling of 667.Fn m_defrag 668failed. 669.It Fn bus_dmamap_load_uio "dmat" "map" "uio" "callback2" "callback_arg" "flags" 670This is a variation of 671.Fn bus_dmamap_load 672which maps buffers pointed to by 673.Fa uio 674for DMA transfers. 675A 676.Vt bus_size_t 677argument is also passed to the callback routine, which contains the size of 678.Fa uio , 679i.e. 680.Fa uio->uio_resid . 681.Pp 682If 683.Fa uio->uio_segflg 684is 685.Dv UIO_USERSPACE , 686then it is assumed that the buffer, 687.Fa uio 688is in 689.Fa "uio->uio_td->td_proc" Ns 's 690address space. 691User space memory must be in-core and wired prior to attempting a map 692load operation. 693.It Fn bus_dmamap_unload "dmat" "map" 694Unloads a DMA map. 695Arguments are as follows: 696.Bl -tag -width dmam -compact 697.It Fa dmat 698DMA tag used to allocate 699.Fa map . 700.It Fa map 701The DMA map that is to be unloaded. 702.El 703.Pp 704.Fn bus_dmamap_unload 705will not perform any implicit synchronization of DMA buffers. 706This must be done explicitly by a call to 707.Fn bus_dmamap_sync 708prior to unloading the map. 709.It Fn bus_dmamap_sync "dmat" "map" "op" 710Performs synchronization of a device visible mapping with the CPU visible 711memory referenced by that mapping. 712Arguments are as follows: 713.Bl -tag -width dmat -compact 714.It Fa dmat 715DMA tag used to allocate 716.Fa map . 717.It Fa map 718The DMA mapping to be synchronized. 719.It Fa op 720Type of synchronization operation to perform. 721See the definition of 722.Vt bus_dmasync_op_t 723for a description of the acceptable values for 724.Fa op . 725.El 726.Pp 727.Fn bus_dmamap_sync 728is the method used to ensure that CPU and device DMA access to shared 729memory is coherent. 730For example, the CPU might be used to setup the contents of a buffer 731that is to be DMA'ed into a device. 732To ensure that the data are visible via the device's mapping of that 733memory, the buffer must be loaded and a dma sync operation of 734.Dv BUS_DMASYNC_PREREAD 735must be performed. 736Additional sync operations must be performed after every CPU write 737to this memory if additional DMA reads are to be performed. 738Conversely, for the DMA write case, the buffer must be loaded, 739and a dma sync operation of 740.Dv BUS_DMASYNC_PREWRITE 741must be performed. 742The CPU will only be able to see the results of this DMA write 743once the DMA has completed and a 744.Dv BUS_DMASYNC_POSTWRITE 745operation has been performed. 746.Pp 747If DMA read and write operations are not preceded and followed by the 748appropriate synchronization operations, behavior is undefined. 749.It Fn bus_dmamem_alloc "dmat" "**vaddr" "flags" "mapp" 750Allocates memory that is mapped into KVA at the address returned 751in 752.Fa vaddr 753that is permanently loaded into the newly created 754.Vt bus_dmamap_t 755returned via 756.Fa mapp . 757Arguments are as follows: 758.Bl -tag -width alignment -compact 759.It Fa dmat 760DMA tag describing the constraints of the DMA mapping. 761.It Fa vaddr 762Pointer to a pointer that will hold the returned KVA mapping of 763the allocated region. 764.It Fa flags 765Flags are defined as follows: 766.Bl -tag -width ".Dv BUS_DMA_NOWAIT" -compact 767.It Dv BUS_DMA_WAITOK 768The routine can safely wait (sleep) for resources. 769.It Dv BUS_DMA_NOWAIT 770The routine is not allowed to wait for resources. 771If resources are not available, 772.Er ENOMEM 773is returned. 774.It Dv BUS_DMA_COHERENT 775Attempt to map this memory such that cache sync operations are 776as cheap as possible. 777This flag is typically set on memory that will be accessed by both 778a CPU and a DMA engine, frequently. 779Use of this flag does not remove the requirement of using 780bus_dmamap_sync, but it may reduce the cost of performing 781these operations. 782.It Dv BUS_DMA_ZERO 783Causes the allocated memory to be set to all zeros. 784.El 785.It Fa mapp 786Pointer to storage for the returned DMA map. 787.El 788.Pp 789The size of memory to be allocated is 790.Fa maxsize 791as specified in 792.Fa dmat . 793.Pp 794The current implementation of 795.Fn bus_dmamem_alloc 796will allocate all requests as a single segment. 797.Pp 798Although no explicit loading is required to access the memory 799referenced by the returned map, the synchronization requirements 800as described in the 801.Fn bus_dmamap_sync 802section still apply. 803.Pp 804Returns 805.Er ENOMEM 806if sufficient memory is not available for completing 807the operation. 808.It Fn bus_dmamem_coherent "parent" "alignment" "boundary" "lowaddr" \ 809"highaddr" "maxsize" "flags" "*dmem" 810This is a convenient function to create one segment of DMA memory. 811It combines following 812.Xr bus_dma 9 813function calls: 814.Bd -literal 815 bus_dma_tag_create(..., dtag); 816 bus_dmamem_alloc(*dtag, vaddr, ..., dmap); 817 bus_dmamap_load(*dtag, *dmap, *vaddr, ..., \\ 818 callback, busaddr, ...); 819.Ed 820.sp 821The final results of the above function calls are: 822DMA tag, 823DMA map, 824DMA memory's kernel virtual address and 825its device visible address. 826.Fn bus_dmamem_coherent 827saves the results in 828.Fa *dmem . 829.Pp 830The 831.Fa parent , 832.Fa alignment , 833.Fa boundary , 834.Fa lowaddr 835and 836.Fa highaddr 837will be passed to 838.Fn bus_dma_tag_create 839as they are. 840The 841.Fa maxsize 842will be passed to 843.Fn bus_dma_tag_create 844as its 845.Fa maxsize 846and 847.Fa maxsegsz 848and 849.Ql 1 850will be passed to 851.Fn bus_dma_tag_create 852as its 853.Fa nsegments . 854When 855.Fn bus_dmamem_alloc 856is called, 857.Fa flags 858will be first or'ed with 859.Dv BUS_DMA_COHERENT 860then passed to it. 861The final results of the above three functions, 862i.e. DMA tag, 863DMA map, 864DMA memory's kernel virtual address and 865its device visible address, 866are saved in 867.Fa *dmem . 868If any of the three functions failed, 869this function will return the error code and the 870.Fa *dmem 871should not be used. 872.It Fn bus_dmamem_coherent_any "parent" "alignment" "maxsize" "flags" \ 873"*dtag" "*dmap" "*busaddr" 874This function is a simplified version of 875.Fn bus_dmamem_coherent 876with 877its 878.Fa boundary 879set to 880.Ql 0 , 881.Fa lowaddr 882set to 883.Dv BUS_SPACE_MAXADDR 884and 885.Fa highaddr 886set to 887.Dv BUS_SPACE_MAXADDR . 888The 889.Fa parent 890usually should not be NULL. 891.Pp 892Return the DMA memory's kernel virtual address. 893The DMA tag, DMA map and device visible address are returned in 894.Fa *dtag , 895.Fa *dmap , 896and 897.Fa *busaddr . 898If this function failed, 899NULL will be returned; 900.Fa *dtag , 901.Fa *dmap , 902and 903.Fa *busaddr 904are left unchanged. 905.It Fn bus_dmamem_free "dmat" "*vaddr" "map" 906Frees memory previously allocated by 907.Fn bus_dmamem_alloc . 908Any mappings 909will be invalidated. 910Arguments are as follows: 911.Bl -tag -width vaddr -compact 912.It Fa dmat 913DMA tag. 914.It Fa vaddr 915Kernel virtual address of the memory. 916.It Fa map 917DMA map to be invalidated. 918.El 919.El 920.Sh RETURN VALUES 921Behavior is undefined if invalid arguments are passed to 922any of the above functions. 923If sufficient resources cannot be allocated for a given 924transaction, 925.Er ENOMEM 926is returned. 927All 928routines that are not of type, 929.Vt void , 930will return 0 on success or an error 931code, as discussed above. 932.Pp 933All 934.Vt void 935routines will succeed if provided with valid arguments. 936.Sh SEE ALSO 937.Xr devclass 9 , 938.Xr device 9 , 939.Xr driver 9 , 940.Xr rman 9 941.Rs 942.%A "Jason R. Thorpe" 943.%T "A Machine-Independent DMA Framework for NetBSD" 944.%J "Proceedings of the Summer 1998 USENIX Technical Conference" 945.%Q "USENIX Association" 946.%D "June 1998" 947.Re 948.Sh HISTORY 949The 950.Nm 951interface first appeared in 952.Nx 1.3 . 953.Pp 954The 955.Nm 956API was adopted from 957.Nx 958for use in the CAM SCSI subsystem. 959The alterations to the original API were aimed to remove the need for 960a 961.Vt bus_dma_segment_t 962array stored in each 963.Vt bus_dmamap_t 964while allowing callers to queue up on scarce resources. 965.Sh AUTHORS 966The 967.Nm 968interface was designed and implemented by 969.An Jason R. Thorpe 970of the Numerical Aerospace Simulation Facility, NASA Ames Research Center. 971Additional input on the 972.Nm 973design was provided by 974.An -nosplit 975.An Chris Demetriou , 976.An Charles Hannum , 977.An Ross Harvey , 978.An Matthew Jacob , 979.An Jonathan Stone , 980and 981.An Matt Thomas . 982.Pp 983This manual page was written by 984.An Hiten Pandya 985and 986.An Justin T. Gibbs . 987