1.\" 2.\" Copyright (c) 2002, 2003, 2004 The DragonFly Project. All rights reserved. 3.\" 4.\" This code is derived from software contributed to The DragonFly Project 5.\" by Hiten Pandya <hmp@backplane.com>. 6.\" 7.\" Redistribution and use in source and binary forms, with or without 8.\" modification, are permitted provided that the following conditions 9.\" are met: 10.\" 11.\" 1. Redistributions of source code must retain the above copyright 12.\" notice, this list of conditions and the following disclaimer. 13.\" 2. Redistributions in binary form must reproduce the above copyright 14.\" notice, this list of conditions and the following disclaimer in 15.\" the documentation and/or other materials provided with the 16.\" distribution. 17.\" 3. Neither the name of The DragonFly Project nor the names of its 18.\" contributors may be used to endorse or promote products derived 19.\" from this software without specific, prior written permission. 20.\" 21.\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23.\" LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 24.\" FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 25.\" COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26.\" INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 27.\" BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28.\" LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 29.\" AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30.\" OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31.\" OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32.\" SUCH DAMAGE. 33.\" 34.\" Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 35.\" All rights reserved. 36.\" 37.\" This code is derived from software contributed to The NetBSD Foundation 38.\" by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 39.\" NASA Ames Research Center. 40.\" 41.\" Redistribution and use in source and binary forms, with or without 42.\" modification, are permitted provided that the following conditions 43.\" are met: 44.\" 1. Redistributions of source code must retain the above copyright 45.\" notice, this list of conditions and the following disclaimer. 46.\" 2. Redistributions in binary form must reproduce the above copyright 47.\" notice, this list of conditions and the following disclaimer in the 48.\" documentation and/or other materials provided with the distribution. 49.\" 3. All advertising materials mentioning features or use of this software 50.\" must display the following acknowledgment: 51.\" This product includes software developed by the NetBSD 52.\" Foundation, Inc. and its contributors. 53.\" 4. Neither the name of The NetBSD Foundation nor the names of its 54.\" contributors may be used to endorse or promote products derived 55.\" from this software without specific prior written permission. 56.\" 57.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 58.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 59.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 60.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 61.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67.\" POSSIBILITY OF SUCH DAMAGE. 68.\" 69.\" $FreeBSD: /repoman/r/ncvs/src/share/man/man9/bus_dma.9,v 1.7 2003/07/27 14:05:29 mux Exp $ 70.\" $NetBSD: bus_dma.9,v 1.25 2002/10/14 13:43:16 wiz Exp $ 71.\" 72.Dd March 17, 2004 73.Dt BUS_DMA 9 74.Os 75.Sh NAME 76.Nm bus_dma , 77.Nm bus_dma_tag_create , 78.Nm bus_dma_tag_destroy , 79.Nm bus_dmamap_create , 80.Nm bus_dmamap_destroy , 81.Nm bus_dmamap_load , 82.Nm bus_dmamap_load_mbuf , 83.Nm bus_dmamap_load_mbuf_segment , 84.Nm bus_dmamap_load_mbuf_defrag , 85.Nm bus_dmamap_load_uio , 86.Nm bus_dmamap_unload , 87.Nm bus_dmamap_sync , 88.Nm bus_dmamem_alloc , 89.Nm bus_dmamem_coherent , 90.Nm bus_dmamem_coherent_any , 91.Nm bus_dmamem_free 92.Nd Bus and Machine Independent DMA Mapping Interface 93.Sh SYNOPSIS 94.In sys/bus.h 95.Ft int 96.Fn bus_dma_tag_create "bus_dma_tag_t parent" "bus_size_t alignment" \ 97"bus_size_t boundary" "bus_addr_t lowaddr" "bus_addr_t highaddr" \ 98"bus_dma_filter_t *filtfunc" "void *filtfuncarg" "bus_size_t maxsize" \ 99"int nsegments" "bus_size_t maxsegsz" "int flags" "bus_dma_tag_t *dmat" 100.Ft int 101.Fn bus_dma_tag_destroy "bus_dma_tag_t dmat" 102.Ft int 103.Fn bus_dmamap_create "bus_dma_tag_t dmat" "int flags" "bus_dmamap_t *mapp" 104.Ft int 105.Fn bus_dmamap_destroy "bus_dma_tag_t dmat" "bus_dmamap_t map" 106.Ft int 107.Fn bus_dmamap_load "bus_dma_tag_t dmat" "bus_dmamap_t map" "void *buf" \ 108"bus_size_t buflen" "bus_dmamap_callback_t *callback" "void *callback_arg" \ 109"int flags" 110.Ft int 111.Fn bus_dmamap_load_mbuf "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 112"struct mbuf *mbuf" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 113"int flags" 114.Ft int 115.Fn bus_dmamap_load_mbuf_segment "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 116"struct mbuf *mbuf" "bus_dma_segment_t *segs" "int maxsegs" "int *nsegs" \ 117"int flags" 118.Ft int 119.Fn bus_dmamap_load_mbuf_defrag "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 120"struct mbuf **mbuf" "bus_dma_segment_t *segs" "int maxsegs" "int *nsegs" \ 121"int flags" 122.Ft int 123.Fn bus_dmamap_load_uio "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 124"struct uio *uio" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 125"int flags" 126.Ft int 127.Fn bus_dmamem_alloc "bus_dma_tag_t dmat" "void **vaddr" \ 128"int flags" "bus_dmamap_t *mapp" 129.Ft int 130.Fn bus_dmamem_coherent "bus_dma_tag_t parent" "bus_size_t alignment" \ 131"bus_size_t boundary" "bus_addr_t lowaddr" "bus_addr_t highaddr" \ 132"bus_size_t maxsize" "int flags" "bus_dmamem_t *dmem" 133.Ft void * 134.Fn bus_dmamem_coherent_any "bus_dma_tag_t parent" "bus_size_t alignment" \ 135"bus_size_t maxsize" "int flags" "bus_dma_tag_t *dtag" "bus_dmamap_t *dmap" \ 136"bus_addr_t *busaddr" 137.Ft void 138.Fn bus_dmamap_unload "bus_dma_tag_t dmat" "bus_dmamap_t map" 139.Ft void 140.Fn bus_dmamap_sync "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 141"bus_dmasync_op_t op" 142.Ft void 143.Fn bus_dmamem_free "bus_dma_tag_t dmat" "void *vaddr" \ 144"bus_dmamap_t map" 145.Sh DESCRIPTION 146Direct Memory Access (DMA) is a method of transferring data 147without involving the CPU, thus providing higher performance. 148A DMA transaction can be achieved between device to memory, 149device to device, or memory to memory. 150.Pp 151The 152.Nm 153API is a bus, device, and machine-independent (MI) interface to 154DMA mechanisms. 155It provides the client with flexibility and simplicity by 156abstracting machine dependent issues like setting up 157DMA mappings, handling cache issues, bus specific features 158and limitations. 159.Sh STRUCTURES AND TYPES 160.Bl -tag -width compact 161.It Vt bus_dma_tag_t 162A machine-dependent (MD) opaque type that describes the 163characteristics of DMA transactions. 164DMA tags are organized into a hierarchy, with each child 165tag inheriting the restrictions of its parent. 166This allows all devices along the path of DMA transactions 167to contribute to the constraints of those transactions. 168.It Vt bus_dma_filter_t 169Client specified address filter having the format: 170.Bl -tag -width compact 171.It Ft int 172.Fn "client_filter" "void *filtarg" "bus_addr_t testaddr" 173.El 174.sp 175Address filters can be specified during tag creation to allow 176for devices who's DMA address restrictions cannot be specified 177by a single window. 178The 179.Fa filtarg 180is client specified during tag creation to be passed to all 181invocations of the callback. 182The 183.Fa testaddr 184argument contains a potential starting address of a DMA mapping. 185The filter function operates on the set of addresses from 186.Fa testaddr 187to 188.Ql trunc_page(testaddr) + PAGE_SIZE - 1 , 189inclusive. 190The filter function should return zero for any mapping in this range 191that can be accommodated by the device and non-zero otherwise. 192.It Vt bus_dma_segment_t 193A machine-dependent type that describes individual 194DMA segments. 195.Bd -literal 196 bus_addr_t ds_addr; 197 bus_size_t ds_len; 198.Ed 199.sp 200The 201.Fa ds_addr 202field contains the device visible address of the DMA segment, and 203.Fa ds_len 204contains the length of the DMA segment. 205Although the DMA segments returned by a mapping call will adhere to 206all restrictions necessary for a successful DMA operation, some conversion 207(e.g. a conversion from host byte order to the device's byte order) is 208almost always required when presenting segment information to the device. 209.It Vt bus_dmamap_t 210A machine-dependent opaque type describing an individual mapping. 211Multiple DMA maps can be associated with one DMA tag. 212.It Vt bus_dmamem_t 213A machine-dependent type that describes DMA memory created by 214.Fn bus_dmamem_coherent . 215.Bd -literal 216 bus_dma_tag_t dmem_tag; 217 bus_dmamap_t dmem_map; 218 void *dmem_addr; 219 bus_addr_t dmem_busaddr; 220.Ed 221.sp 222The 223.Fa dmem_tag 224field contains the DMA tag of the DMA memory and 225.Fa dmem_map 226field contains the DMA map of the DMA memory. 227The 228.Fa dmem_addr 229field points to the allocated DMA memory in kernel virtual address space. 230The 231.Fa dmem_busaddr 232field contains the device visible address of the DMA memory. 233.It Vt bus_dmamap_callback_t 234Client specified callback for receiving mapping information resulting from 235the load of a 236.Vt bus_dmamap_t 237via 238.Fn bus_dmamap_load . 239Callbacks are of the format: 240.Bl -tag -width compact 241.It Ft void 242.Fn "client_callback" "void *callback_arg" "bus_dma_segment_t *segs" \ 243"int nseg" "int error" 244.El 245.sp 246The 247.Fa callback_arg 248is the callback argument passed to dmamap load functions. 249The 250.Fa segs 251and 252.Fa nseg 253parameters describe an array of 254.Vt bus_dma_segment_t 255structures that represent the mapping. 256This array is only valid within the scope of the callback function. 257The success or failure of the mapping is indicated by the 258.Fa error 259parameter. 260More information on the use of callbacks can be found in the 261description of the individual dmamap load functions. 262.It Vt bus_dmamap_callback2_t 263Client specified callback for receiving mapping information resulting from 264the load of a 265.Vt bus_dmamap_t 266via 267.Fn bus_dmamap_load_uio 268or 269.Fn bus_dmamap_load_mbuf . 270.sp 271Callback2s are of the format: 272.Bl -tag -width compact 273.It Ft void 274.Fn "client_callback2" "void *callback_arg" "bus_dma_segment_t *segs" \ 275"int nseg" "bus_size_t mapsize" "int error" 276.El 277.sp 278Callback2's behavior is the same as 279.Vt bus_dmamap_callback_t 280with the addition that the length of the data mapped is provided via 281.Fa mapsize . 282.It Vt bus_dmasync_op_t 283Memory synchronization operation specifier. 284Bus DMA requires explicit synchronization of memory with it's device 285visible mapping in order to guarantee memory coherency. 286The 287.Vt bus_dmasync_op_t 288allows the type of DMA operation that will be or has been performed 289to be communicated to the system so that the correct coherency measures 290are taken. 291All operations specified below are performed from the DMA engine's 292point of view: 293.Bl -tag -width BUS_DMASYNC_POSTWRITE 294.It Dv BUS_DMASYNC_PREREAD 295Perform any synchronization required after an update of memory by the CPU 296but prior to DMA read operations. 297.It Dv BUS_DMASYNC_PREWRITE 298Perform any synchronization required after an update of memory by the CPU 299but prior to DMA write operations. 300.It Dv BUS_DMASYNC_POSTREAD 301Perform any synchronization required after DMA read operations, but prior 302to CPU access of the memory. 303.It Dv BUS_DMASYNC_POSTWRITE 304Perform any synchronization required after DMA write operations, but prior 305to CPU access of the memory. 306.El 307.El 308.sp 309.Sh FUNCTIONS 310.Bl -tag -width compact 311.It Fn bus_dma_tag_create "parent" "alignment" "boundary" "lowaddr" \ 312"highaddr" "*filtfunc" "*filtfuncarg" "maxsize" "nsegments" "maxsegsz" \ 313"flags" "*dmat" 314Allocates a device specific DMA tag, and initializes it according to 315the arguments provided: 316.Bl -tag -width *filtfuncarg -compact 317.It Fa parent 318Indicates restrictions between the parent bridge, CPU memory, and the 319device. 320May be NULL, if no DMA restrictions are to be inherited. 321.It Fa alignment 322Alignment constraint, in bytes, of any mappings created using this tag. 323The alignment must be a power of 2. 324Hardware that can DMA starting at any address would specify 325.Em 1 326for byte alignment. 327Hardware requiring DMA transfers to start on a multiple of 4K 328would specify 329.Em 4096 . 330.It Fa boundary 331Boundary constraint, in bytes, of the target DMA memory region. 332The boundary indicates the set of addresses, all multiples of the 333boundary argument, that cannot be crossed by a single 334.Vt bus_dma_segment_t . 335The boundary must be either a power of 2 or 0. 336.Ql 0 337indicates that there are no boundary restrictions. 338.It Fa lowaddr 339.It Fa highaddr 340Bounds of the window of bus address space that 341.Em cannot 342be directly accessed by the device. 343The window contains all address greater than lowaddr and 344less than or equal to highaddr. 345For example, a device incapable of DMA above 4GB, would specify 346a highaddr of 347.Dv BUS_SPACE_MAXADDR 348and a lowaddr of 349.Dv BUS_SPACE_MAXADDR_32BIT . 350Similarly a device that can only dma to addresses bellow 16MB would 351specify a highaddr of 352.Dv BUS_SPACE_MAXADDR 353and a lowaddr of 354.Dv BUS_SPACE_MAXADDR_24BIT . 355Some implementations requires that some region of device visible 356address space, overlapping available host memory, be outside the 357window. 358This area of 359.Ql safe memory 360is used to bounce requests that would otherwise conflict with 361the exclusion window. 362.It Fa filtfunc 363Optional filter function (may be NULL) to be called for any attempt to 364map memory into the window described by 365.Fa lowaddr 366and 367.Fa highaddr . 368A filter function is only required when the single window described 369by 370.Fa lowaddr 371and 372.Fa highaddr 373cannot adequately describe the constraints of the device. 374The filter function will be called for every machine page 375that overlaps the exclusion window. 376.It Fa filtfuncarg 377Argument passed to all calls to the filter function for this tag. 378May be NULL. 379.It Fa maxsize 380Maximum size, in bytes, of the sum of all segment lengths in a given 381DMA mapping associated with this tag. 382.It Fa nsegments 383Number of discontinuities (scatter/gather segments) allowed 384in a DMA mapped region. 385If there is no restriction, 386.Dv BUS_SPACE_UNRESTRICTED 387may be specified. 388.It Fa maxsegsz 389Maximum size, in bytes, of a segment in any DMA mapped region associated 390with 391.Fa dmat . 392.It Fa flags 393Are as follows: 394.Bl -tag -width ".Dv BUS_DMA_ALLOCNOW" -compact 395.It Dv BUS_DMA_ALLOCNOW 396Allocate the minimum resources necessary to guarantee that all map load 397operations associated with this tag may not block. 398If sufficient resources are not available, 399.Er ENOMEM 400is returned. 401.It Dv BUS_DMA_WAITOK 402Indicates that it is OK to wait for resources. 403However, 404unlike 405.Xr kmalloc 9 , 406it is not guaranteed that the resource allocation will succeed. 407This flag is the default one, 408if 409.Dv BUS_DMA_NOWAIT 410is not supplied. 411.It Dv BUS_DMA_NOWAIT 412If the resource allocation request cannot be immediately fulfilled, 413.Er ENOMEM 414is returned. 415.It Dv BUS_DMA_ONEBPAGE 416Allocte one bounce page at most, 417even if the 418.Fa maxsize 419indicates that multiple bounce pages are needed. 420.It Dv BUS_DMA_ALIGNED 421Indicates that all memory to be loaded into the DMA maps associated 422with this DMA tag is properly aligned according to 423.Fa alignment 424constraint. 425No resources, 426e.g. bounce pages, 427will be allocated due to the 428.Fa alignment 429constraint. 430If unaligned memory was loaded into the DMA maps associated with this DMA tag, 431system will panic. 432.El 433.It Fa dmat 434Pointer to a bus_dma_tag_t where the resulting DMA tag will 435be stored. 436.El 437.Pp 438Returns 439.Er ENOMEM 440if sufficient memory is not available for tag creation 441or allocating mapping resources. 442.It Fn bus_dma_tag_destroy "dmat" 443Deallocate the DMA tag 444.Fa dmat 445that was created by 446.Fn bus_dma_tag_create . 447.Pp 448Returns 449.Er EBUSY 450if any DMA maps remain associated with 451.Fa dmat 452or 453.Ql 0 454on success. 455.It Fn bus_dmamap_create "dmat" "flags" "*mapp" 456Allocates and initializes a DMA map. 457Arguments are as follows: 458.Bl -tag -width nsegments -compact 459.It Fa dmat 460DMA tag. 461.It Fa flags 462Are as follows: 463.Bl -tag -width ".Dv BUS_DMA_ONEBPAGE" -compact 464.It Dv BUS_DMA_WAITOK 465Indicates that it is OK to wait for resources. 466However, 467unlike 468.Xr kmalloc 9 , 469it is not guaranteed that the resource allocation will succeed. 470This flag is the default one, 471if 472.Dv BUS_DMA_NOWAIT 473is not supplied. 474.It Dv BUS_DMA_NOWAIT 475If the resource allocation request cannot be immediately fulfilled, 476.Er ENOMEM 477is returned. 478.It Dv BUS_DMA_ONEBPAGE 479Allocte one bounce page at most, 480even if the 481.Fa maxsize 482used to create the 483.Fa dmat 484indicates that multiple bounce pages are needed. 485.El 486.It Fa mapp 487Pointer to a 488.Vt bus_dmamap_t 489where the resulting DMA map will be stored. 490.El 491.Pp 492Returns 493.Er ENOMEM 494if sufficient memory is not available for creating the 495map or allocating mapping resources. 496.It Fn bus_dmamap_destroy "dmat" "map" 497Frees all resources associated with a given DMA map. 498Arguments are as follows: 499.Bl -tag -width dmat -compact 500.It Fa dmat 501DMA tag used to allocate 502.Fa map . 503.It Fa map 504The DMA map to destroy. 505.El 506.Pp 507Returns 508.Er EBUSY 509if a mapping is still active for 510.Fa map . 511.It Fn bus_dmamap_load "dmat" "map" "buf" "buflen" "*callback" "..." 512Creates a mapping in device visible address space of 513.Fa buflen 514bytes of 515.Fa buf , 516associated with the DMA map 517.Fa map . 518Arguments are as follows: 519.Bl -tag -width buflen -compact 520.It Fa dmat 521DMA tag used to allocate 522.Fa map . 523.It Fa map 524A DMA map without a currently active mapping. 525.It Fa buf 526A kernel virtual address pointer to a contiguous (in KVA) buffer, to be 527mapped into device visible address space. 528.It Fa buflen 529The size of the buffer. 530.It Fa callback Fa callback_arg 531The callback function, and its argument. 532.It Fa flags 533The value of this argument is currently undefined, and should be 534specified as 535.Ql 0 . 536.El 537.Pp 538Return values to the caller are as follows: 539.Bl -tag -width ".Er EINPROGRESS" -compact 540.It 0 541The callback has been called and completed. 542The status of the mapping has been delivered to the callback. 543.It Er EINPROGRESS 544The mapping has been deferred for lack of resources. 545The callback will be called as soon as resources are available. 546Callbacks are serviced in FIFO order. 547DMA maps created from DMA tags that are allocated with 548the 549.Dv BUS_DMA_ALLOCNOW 550flag will never return this status for a load operation. 551.It Er EINVAL 552The load request was invalid. 553The callback has not, and will not be called. 554This error value may indicate that 555.Fa dmat , 556.Fa map , 557.Fa buf , 558or 559.Fa callback 560were invalid, or 561.Fa buslen 562was larger than the 563.Fa maxsize 564argument used to create the dma tag 565.Fa dmat . 566.El 567.Pp 568When the callback is called, it is presented with an error value 569indicating the disposition of the mapping. 570Error may be one of the following: 571.Bl -tag -width ".Er EINPROGRESS" -compact 572.It 0 573The mapping was successful and the 574.Fa dm_segs 575callback argument contains an array of 576.Vt bus_dma_segment_t 577elements describing the mapping. 578This array is only valid during the scope of the callback function. 579.It Er EFBIG 580A mapping could not be achieved within the segment constraints provided 581in the tag even though the requested allocation size was less than maxsize. 582.El 583.It Fn bus_dmamap_load_mbuf "dmat" "map" "mbuf" "callback2" "callback_arg" \ 584"flags" 585This is a variation of 586.Fn bus_dmamap_load 587which maps mbuf chains 588for DMA transfers. 589A 590.Vt bus_size_t 591argument is also passed to the callback routine, which 592contains the mbuf chain's packet header length. 593.Pp 594Mbuf chains are assumed to be in kernel virtual address space. 595.Pp 596Returns 597.Er EINVAL 598if the size of the mbuf chain exceeds the maximum limit of the 599DMA tag. 600.It Fn bus_dmamap_load_mbuf_segment "dmat" "map" "mbuf" "*segs" "maxsegs" \ 601"*nsegs" "flags" 602It is like 603.Fn bus_dmamap_load_mbuf 604without callback. 605Segmentation information are saved in the 606.Fa segs 607and 608.Fa nsegs 609if the loading is successful. 610The 611.Fa maxsegs , 612which indicates the number of elements in the 613.Fa segs , 614must be set by the caller and must be at least 1 but less than the 615.Fa nsegments 616used to create the 617.Fa dmat . 618The 619.Fa flags 620must have 621.Dv BUS_DMA_NOWAIT 622turned on. 623.Pp 624This function will not block. 625When system is short of DMA resources, 626this function will return 627.Er ENOMEM , 628instead of 629.Er EINPROGRESS . 630.It Fn bus_dmamap_load_mbuf_defrag "dmat" "map" "*mbuf" "*segs" "maxsegs" \ 631"*nsegs" "flags" 632This function is like 633.Fn bus_dmamap_load_mbuf_segment , 634but it will call 635.Fn m_defrag 636on the 637.Fa *mbuf 638and try reloading, 639if low level code indicates too many fragments in the 640.Fa *mbuf ; 641the 642.Fa mbuf 643will be updated under this situation. 644However, 645.Fa *mbuf 646would not be freed by this function, 647even if 648.Fn m_defrag 649failed. 650.Pp 651Return 652.Er ENOBUFS , 653if the calling of 654.Fn m_defrag 655failed. 656.It Fn bus_dmamap_load_uio "dmat" "map" "uio" "callback2" "callback_arg" "flags" 657This is a variation of 658.Fn bus_dmamap_load 659which maps buffers pointed to by 660.Fa uio 661for DMA transfers. 662A 663.Vt bus_size_t 664argument is also passed to the callback routine, which contains the size of 665.Fa uio , 666i.e. 667.Fa uio->uio_resid . 668.Pp 669If 670.Fa uio->uio_segflg 671is 672.Dv UIO_USERSPACE , 673then it is assumed that the buffer, 674.Fa uio 675is in 676.Fa "uio->uio_td->td_proc" Ns 's 677address space. 678User space memory must be in-core and wired prior to attempting a map 679load operation. 680.It Fn bus_dmamap_unload "dmat" "map" 681Unloads a DMA map. 682Arguments are as follows: 683.Bl -tag -width dmam -compact 684.It Fa dmat 685DMA tag used to allocate 686.Fa map . 687.It Fa map 688The DMA map that is to be unloaded. 689.El 690.Pp 691.Fn bus_dmamap_unload 692will not perform any implicit synchronization of DMA buffers. 693This must be done explicitly by a call to 694.Fn bus_dmamap_sync 695prior to unloading the map. 696.It Fn bus_dmamap_sync "dmat" "map" "op" 697Performs synchronization of a device visible mapping with the CPU visible 698memory referenced by that mapping. 699Arguments are as follows: 700.Bl -tag -width dmat -compact 701.It Fa dmat 702DMA tag used to allocate 703.Fa map . 704.It Fa map 705The DMA mapping to be synchronized. 706.It Fa op 707Type of synchronization operation to perform. 708See the definition of 709.Vt bus_dmasync_op_t 710for a description of the acceptable values for 711.Fa op . 712.El 713.Pp 714.Fn bus_dmamap_sync 715is the method used to ensure that CPU and device DMA access to shared 716memory is coherent. 717For example, the CPU might be used to setup the contents of a buffer 718that is to be DMA'ed into a device. 719To ensure that the data are visible via the device's mapping of that 720memory, the buffer must be loaded and a dma sync operation of 721.Dv BUS_DMASYNC_PREREAD 722must be performed. 723Additional sync operations must be performed after every CPU write 724to this memory if additional DMA reads are to be performed. 725Conversely, for the DMA write case, the buffer must be loaded, 726and a dma sync operation of 727.Dv BUS_DMASYNC_PREWRITE 728must be performed. 729The CPU will only be able to see the results of this DMA write 730once the DMA has completed and a 731.Dv BUS_DMASYNC_POSTWRITE 732operation has been performed. 733.Pp 734If DMA read and write operations are not preceded and followed by the 735appropriate synchronization operations, behavior is undefined. 736.It Fn bus_dmamem_alloc "dmat" "**vaddr" "flags" "mapp" 737Allocates memory that is mapped into KVA at the address returned 738in 739.Fa vaddr 740that is permanently loaded into the newly created 741.Vt bus_dmamap_t 742returned via 743.Fa mapp . 744Arguments are as follows: 745.Bl -tag -width alignment -compact 746.It Fa dmat 747DMA tag describing the constraints of the DMA mapping. 748.It Fa vaddr 749Pointer to a pointer that will hold the returned KVA mapping of 750the allocated region. 751.It Fa flags 752Flags are defined as follows: 753.Bl -tag -width ".Dv BUS_DMA_NOWAIT" -compact 754.It Dv BUS_DMA_WAITOK 755The routine can safely wait (sleep) for resources. 756.It Dv BUS_DMA_NOWAIT 757The routine is not allowed to wait for resources. 758If resources are not available, 759.Er ENOMEM 760is returned. 761.It Dv BUS_DMA_COHERENT 762Attempt to map this memory such that cache sync operations are 763as cheap as possible. 764This flag is typically set on memory that will be accessed by both 765a CPU and a DMA engine, frequently. 766Use of this flag does not remove the requirement of using 767bus_dmamap_sync, but it may reduce the cost of performing 768these operations. 769.It Dv BUS_DMA_ZERO 770Causes the allocated memory to be set to all zeros. 771.El 772.It Fa mapp 773Pointer to storage for the returned DMA map. 774.El 775.Pp 776The size of memory to be allocated is 777.Fa maxsize 778as specified in 779.Fa dmat . 780.Pp 781The current implementation of 782.Fn bus_dmamem_alloc 783will allocate all requests as a single segment. 784.Pp 785Although no explicit loading is required to access the memory 786referenced by the returned map, the synchronization requirements 787as described in the 788.Fn bus_dmamap_sync 789section still apply. 790.Pp 791Returns 792.Er ENOMEM 793if sufficient memory is not available for completing 794the operation. 795.It Fn bus_dmamem_coherent "parent" "alignment" "boundary" "lowaddr" \ 796"highaddr" "maxsize" "flags" "*dmem" 797This is a convenient function to create one segment of DMA memory. 798It combines following 799.Xr bus_dma 9 800function calls: 801.Bd -literal 802 bus_dma_tag_create(..., dtag); 803 bus_dmamem_alloc(*dtag, vaddr, ..., dmap); 804 bus_dmamap_load(*dtag, *dmap, *vaddr, ..., \\ 805 callback, busaddr, ...); 806.Ed 807.sp 808The final results of the above function calls are: 809DMA tag, 810DMA map, 811DMA memory's kernel virtual address and 812its device visible address. 813.Fn bus_dmamem_coherent 814saves the results in 815.Fa *dmem . 816.Pp 817The 818.Fa parent , 819.Fa alignment , 820.Fa boundary , 821.Fa lowaddr 822and 823.Fa highaddr 824will be passed to 825.Fn bus_dma_tag_create 826as they are. 827The 828.Fa maxsize 829will be passed to 830.Fn bus_dma_tag_create 831as its 832.Fa maxsize 833and 834.Fa maxsegsz 835and 836.Ql 1 837will be passed to 838.Fn bus_dma_tag_create 839as its 840.Fa nsegments . 841When 842.Fn bus_dmamem_alloc 843is called, 844.Fa flags 845will be first or'ed with 846.Dv BUS_DMA_COHERENT 847then passed to it. 848The final results of the above three functions, 849i.e. DMA tag, 850DMA map, 851DMA memory's kernel virtual address and 852its device visible address, 853are saved in 854.Fa *dmem . 855If any of the three functions failed, 856this function will return the error code and the 857.Fa *dmem 858should not be used. 859.It Fn bus_dmamem_coherent_any "parent" "alignment" "maxsize" "flags" \ 860"*dtag" "*dmap" "*busaddr" 861This function is a simplified version of 862.Fn bus_dmamem_coherent 863with 864its 865.Fa boundary 866set to 867.Ql 0 , 868.Fa lowaddr 869set to 870.Dv BUS_SPACE_MAXADDR 871and 872.Fa highaddr 873set to 874.Dv BUS_SPACE_MAXADDR . 875The 876.Fa parent 877usually should not be NULL. 878.Pp 879Return the DMA memory's kernel virtual address. 880The DMA tag, DMA map and device visible address are returned in 881.Fa *dtag , 882.Fa *dmap , 883and 884.Fa *busaddr . 885If this function failed, 886NULL will be returned; 887.Fa *dtag , 888.Fa *dmap , 889and 890.Fa *busaddr 891are left unchanged. 892.It Fn bus_dmamem_free "dmat" "*vaddr" "map" 893Frees memory previously allocated by 894.Fn bus_dmamem_alloc . 895Any mappings 896will be invalidated. 897Arguments are as follows: 898.Bl -tag -width vaddr -compact 899.It Fa dmat 900DMA tag. 901.It Fa vaddr 902Kernel virtual address of the memory. 903.It Fa map 904DMA map to be invalidated. 905.El 906.El 907.Sh RETURN VALUES 908Behavior is undefined if invalid arguments are passed to 909any of the above functions. 910If sufficient resources cannot be allocated for a given 911transaction, 912.Er ENOMEM 913is returned. 914All 915routines that are not of type, 916.Vt void , 917will return 0 on success or an error 918code, as discussed above. 919.Pp 920All 921.Vt void 922routines will succeed if provided with valid arguments. 923.Sh SEE ALSO 924.Xr devclass 9 , 925.Xr device 9 , 926.Xr driver 9 , 927.Xr rman 9 928.Rs 929.%A "Jason R. Thorpe" 930.%T "A Machine-Independent DMA Framework for NetBSD" 931.%J "Proceedings of the Summer 1998 USENIX Technical Conference" 932.%Q "USENIX Association" 933.%D "June 1998" 934.Re 935.Sh HISTORY 936The 937.Nm 938interface first appeared in 939.Nx 1.3 . 940.Pp 941The 942.Nm 943API was adopted from 944.Nx 945for use in the CAM SCSI subsystem. 946The alterations to the original API were aimed to remove the need for 947a 948.Vt bus_dma_segment_t 949array stored in each 950.Vt bus_dmamap_t 951while allowing callers to queue up on scarce resources. 952.Sh AUTHORS 953The 954.Nm 955interface was designed and implemented by 956.An Jason R. Thorpe 957of the Numerical Aerospace Simulation Facility, NASA Ames Research Center. 958Additional input on the 959.Nm 960design was provided by 961.An -nosplit 962.An Chris Demetriou , 963.An Charles Hannum , 964.An Ross Harvey , 965.An Matthew Jacob , 966.An Jonathan Stone , 967and 968.An Matt Thomas . 969.Pp 970This manual page was written by 971.An Hiten Pandya 972and 973.An Justin T. Gibbs . 974