1 /* 2 * Copyright (c) 2003 Hidetoshi Shimokawa 3 * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the acknowledgement as bellow: 16 * 17 * This product includes software developed by K. Kobayashi and H. Shimokawa 18 * 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 26 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 30 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 31 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: src/sys/dev/firewire/iec13213.h,v 1.1.2.4 2003/05/01 06:24:37 simokawa Exp $ 35 * $DragonFly: src/sys/bus/firewire/iec13213.h,v 1.2 2003/06/17 04:28:26 dillon Exp $ 36 * 37 */ 38 39 #define STATE_CLEAR 0x0000 40 #define STATE_SET 0x0004 41 #define NODE_IDS 0x0008 42 #define RESET_START 0x000c 43 #define SPLIT_TIMEOUT_HI 0x0018 44 #define SPLIT_TIMEOUT_LO 0x001c 45 #define CYCLE_TIME 0x0200 46 #define BUS_TIME 0x0204 47 #define BUSY_TIMEOUT 0x0210 48 #define PRIORITY_BUDGET 0x0218 49 #define BUS_MGR_ID 0x021c 50 #define BANDWIDTH_AV 0x0220 51 #define CHANNELS_AV_HI 0x0224 52 #define CHANNELS_AV_LO 0x0228 53 #define IP_CHANNELS 0x0234 54 55 #define CONF_ROM 0x0400 56 57 #define TOPO_MAP 0x1000 58 #define SPED_MAP 0x2000 59 60 #define CSRTYPE_SHIFT 6 61 #define CSRTYPE_MASK (3 << CSRTYPE_SHIFT) 62 #define CSRTYPE_I (0 << CSRTYPE_SHIFT) /* Immediate */ 63 #define CSRTYPE_C (1 << CSRTYPE_SHIFT) /* CSR offset */ 64 #define CSRTYPE_L (2 << CSRTYPE_SHIFT) /* Leaf */ 65 #define CSRTYPE_D (3 << CSRTYPE_SHIFT) /* Directory */ 66 67 #define CSRKEY_MASK 0x3f 68 #define CSRKEY_DESC 0x01 /* Descriptor */ 69 #define CSRKEY_BDINFO 0x02 /* Bus_Dependent_Info */ 70 #define CSRKEY_VENDOR 0x03 /* Vendor */ 71 #define CSRKEY_HW 0x04 /* Hardware_Version */ 72 #define CSRKEY_MODULE 0x07 /* Module */ 73 #define CSRKEY_NCAP 0x0c /* Node_Capabilities */ 74 #define CSRKEY_EUI64 0x0d /* EUI_64 */ 75 #define CSRKEY_UNIT 0x11 /* Unit */ 76 #define CSRKEY_SPEC 0x12 /* Specifier_ID */ 77 #define CSRKEY_VER 0x13 /* Version */ 78 #define CSRKEY_DINFO 0x14 /* Dependent_Info */ 79 #define CSRKEY_ULOC 0x15 /* Unit_Location */ 80 #define CSRKEY_MODEL 0x17 /* Model */ 81 #define CSRKEY_INST 0x18 /* Instance */ 82 #define CSRKEY_KEYW 0x19 /* Keyword */ 83 #define CSRKEY_FEAT 0x1a /* Feature */ 84 #define CSRKEY_EROM 0x1b /* Extended_ROM */ 85 #define CSRKEY_EKSID 0x1c /* Extended_Key_Specifier_ID */ 86 #define CSRKEY_EKEY 0x1d /* Extended_Key */ 87 #define CSRKEY_EDATA 0x1e /* Extended_Data */ 88 #define CSRKEY_MDESC 0x1f /* Modifiable_Descriptor */ 89 #define CSRKEY_DID 0x20 /* Directory_ID */ 90 #define CSRKEY_REV 0x21 /* Revision */ 91 92 #define CSRKEY_FIRM_VER 0x3c /* Firemware version */ 93 #define CSRKEY_UNIT_CH 0x3a /* Unit characteristics */ 94 #define CSRKEY_COM_SPEC 0x38 /* Command set revision */ 95 #define CSRKEY_COM_SET 0x39 /* Command set */ 96 97 #define CROM_UDIR (CSRTYPE_D | CSRKEY_UNIT) /* 0x81 Unit directory */ 98 #define CROM_TEXTLEAF (CSRTYPE_L | CSRKEY_DESC) /* 0x81 Text leaf */ 99 #define CROM_LUN (CSRTYPE_I | CSRKEY_DINFO) /* 0x14 Logical unit num. */ 100 #define CROM_MGM (CSRTYPE_C | CSRKEY_DINFO) /* 0x54 Management agent */ 101 102 #define CSRVAL_1394TA 0x00a02d 103 #define CSRVAL_ANSIT10 0x00609e 104 #define CSRVAL_IETF 0x00005e 105 106 #define CSR_PROTAVC 0x010001 107 #define CSR_PROTCAL 0x010002 108 #define CSR_PROTEHS 0x010004 109 #define CSR_PROTHAVI 0x010008 110 #define CSR_PROTCAM104 0x000100 111 #define CSR_PROTCAM120 0x000101 112 #define CSR_PROTCAM130 0x000102 113 #define CSR_PROTDPP 0x0a6be2 114 #define CSR_PROTIICP 0x4b661f 115 116 #define CSRVAL_T10SBP2 0x010483 117 #define CSRVAL_SCSI 0x0104d8 118 119 struct csrreg { 120 #if BYTE_ORDER == BIG_ENDIAN 121 u_int32_t key:8, 122 val:24; 123 #else 124 u_int32_t val:24, 125 key:8; 126 #endif 127 }; 128 struct csrhdr { 129 #if BYTE_ORDER == BIG_ENDIAN 130 u_int32_t info_len:8, 131 crc_len:8, 132 crc:16; 133 #else 134 u_int32_t crc:16, 135 crc_len:8, 136 info_len:8; 137 #endif 138 }; 139 struct csrdirectory { 140 BIT16x2(crc_len, crc); 141 struct csrreg entry[0]; 142 }; 143 struct csrtext { 144 BIT16x2(crc_len, crc); 145 #if BYTE_ORDER == BIG_ENDIAN 146 u_int32_t spec_type:8, 147 spec_id:24; 148 #else 149 u_int32_t spec_id:24, 150 spec_type:8; 151 #endif 152 u_int32_t lang_id; 153 u_int32_t text[0]; 154 }; 155 156 struct bus_info { 157 #define CSR_BUS_NAME_IEEE1394 0x31333934 158 u_int32_t bus_name; 159 u_int32_t link_spd:3, 160 :1, 161 generation:4, 162 #define MAXROM_4 0 163 #define MAXROM_64 1 164 #define MAXROM_1024 2 165 max_rom:2, 166 :2, 167 max_rec:4, /* (2 << max_rec) bytes */ 168 cyc_clk_acc:8, /* 0 <= ppm <= 100 */ 169 :3, 170 pmc:1, /* power manager capable */ 171 bmc:1, /* bus manager capable */ 172 isc:1, /* iso. operation support */ 173 cmc:1, /* cycle master capable */ 174 irmc:1; /* iso. resource manager capable */ 175 struct fw_eui64 eui64; 176 }; 177 178 #define CROM_MAX_DEPTH 10 179 struct crom_ptr { 180 struct csrdirectory *dir; 181 int index; 182 }; 183 184 struct crom_context { 185 int depth; 186 struct crom_ptr stack[CROM_MAX_DEPTH]; 187 }; 188 189 void crom_init_context(struct crom_context *, u_int32_t *); 190 struct csrreg *crom_get(struct crom_context *); 191 void crom_next(struct crom_context *); 192 void crom_parse_text(struct crom_context *, char *, int); 193 u_int16_t crom_crc(u_int32_t *r, int); 194 struct csrreg *crom_search_key(struct crom_context *, u_int8_t); 195 int crom_has_specver(u_int32_t *, u_int32_t, u_int32_t); 196 197 #ifndef _KERNEL 198 char *crom_desc(struct crom_context *, char *, int); 199 #endif 200 201 /* For CROM build */ 202 #if defined(_KERNEL) || defined(TEST) 203 #define CROM_MAX_CHUNK_LEN 20 204 struct crom_src { 205 struct csrhdr hdr; 206 struct bus_info businfo; 207 STAILQ_HEAD(, crom_chunk) chunk_list; 208 }; 209 210 struct crom_chunk { 211 STAILQ_ENTRY(crom_chunk) link; 212 struct crom_chunk *ref_chunk; 213 int ref_index; 214 int offset; 215 struct { 216 u_int32_t crc:16, 217 crc_len:16; 218 u_int32_t buf[CROM_MAX_CHUNK_LEN]; 219 } data; 220 }; 221 222 extern int crom_add_quad(struct crom_chunk *, u_int32_t); 223 extern int crom_add_entry(struct crom_chunk *, int, int); 224 extern int crom_add_chunk(struct crom_src *src, struct crom_chunk *, 225 struct crom_chunk *, int); 226 extern int crom_add_simple_text(struct crom_src *src, struct crom_chunk *, 227 struct crom_chunk *, char *); 228 extern int crom_load(struct crom_src *, u_int32_t *, int); 229 #endif 230