xref: /dragonfly/sys/bus/isa/rtc.h (revision 1de703da)
1 /*-
2  * Copyright (c) 1990 The Regents of the University of California.
3  * All rights reserved.
4  *
5  * This code is derived from software contributed to Berkeley by
6  * William Jolitz.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by the University of
19  *	California, Berkeley and its contributors.
20  * 4. Neither the name of the University nor the names of its contributors
21  *    may be used to endorse or promote products derived from this software
22  *    without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34  * SUCH DAMAGE.
35  *
36  *	from: @(#)rtc.h	7.1 (Berkeley) 5/12/91
37  * $FreeBSD: src/sys/isa/rtc.h,v 1.12 1999/08/28 00:46:01 peter Exp $
38  * $DragonFly: src/sys/bus/isa/rtc.h,v 1.2 2003/06/17 04:28:40 dillon Exp $
39  */
40 
41 #ifndef _I386_ISA_RTC_H_
42 #define _I386_ISA_RTC_H_ 1
43 
44 /*
45  * MC146818 RTC Register locations
46  */
47 
48 #define RTC_SEC		0x00	/* seconds */
49 #define RTC_SECALRM	0x01	/* seconds alarm */
50 #define RTC_MIN		0x02	/* minutes */
51 #define RTC_MINALRM	0x03	/* minutes alarm */
52 #define RTC_HRS		0x04	/* hours */
53 #define RTC_HRSALRM	0x05	/* hours alarm */
54 #define RTC_WDAY	0x06	/* week day */
55 #define RTC_DAY		0x07	/* day of month */
56 #define RTC_MONTH	0x08	/* month of year */
57 #define RTC_YEAR	0x09	/* month of year */
58 
59 #define RTC_STATUSA	0x0a	/* status register A */
60 #define  RTCSA_TUP	 0x80	/* time update, don't look now */
61 #define  RTCSA_RESET	 0x70	/* reset divider */
62 #define  RTCSA_DIVIDER   0x20   /* divider correct for 32768 Hz */
63 #define  RTCSA_8192      0x03	/* 8192 Hz interrupt */
64 #define  RTCSA_4096      0x04
65 #define  RTCSA_2048      0x05
66 #define  RTCSA_1024      0x06	/* default for profiling */
67 #define  RTCSA_PROF      RTCSA_1024
68 #define  RTC_PROFRATE    1024
69 #define  RTCSA_512       0x07
70 #define  RTCSA_256       0x08
71 #define  RTCSA_128       0x09
72 #define  RTCSA_NOPROF	 RTCSA_128
73 #define  RTC_NOPROFRATE  128
74 #define  RTCSA_64        0x0a
75 #define  RTCSA_32        0x0b	/* 32 Hz interrupt */
76 
77 #define RTC_STATUSB	0x0b	/* status register B */
78 #define	 RTCSB_DST	 0x01	/* USA Daylight Savings Time enable */
79 #define	 RTCSB_24HR	 0x02	/* 0 = 12 hours, 1 = 24	hours */
80 #define	 RTCSB_BCD	 0x04	/* 0 = BCD, 1 =	Binary coded time */
81 #define	 RTCSB_SQWE	 0x08	/* 1 = output sqare wave at SQW	pin */
82 #define	 RTCSB_UINTR	 0x10	/* 1 = enable update-ended interrupt */
83 #define	 RTCSB_AINTR	 0x20	/* 1 = enable alarm interrupt */
84 #define	 RTCSB_PINTR	 0x40	/* 1 = enable periodic clock interrupt */
85 #define  RTCSB_HALT      0x80	/* stop clock updates */
86 
87 #define RTC_INTR	0x0c	/* status register C (R) interrupt source */
88 #define  RTCIR_UPDATE	 0x10	/* update intr */
89 #define  RTCIR_ALARM	 0x20	/* alarm intr */
90 #define  RTCIR_PERIOD	 0x40	/* periodic intr */
91 #define  RTCIR_INT	 0x80	/* interrupt output signal */
92 
93 #define RTC_STATUSD	0x0d	/* status register D (R) Lost Power */
94 #define  RTCSD_PWR	 0x80	/* clock power OK */
95 
96 #define RTC_DIAG	0x0e	/* status register E - bios diagnostic */
97 #define RTCDG_BITS	"\020\010clock_battery\007ROM_cksum\006config_unit\005memory_size\004fixed_disk\003invalid_time"
98 
99 #define RTC_RESET	0x0f	/* status register F - reset code byte */
100 #define	 RTCRS_RST	 0x00		/* normal reset */
101 #define	 RTCRS_LOAD	 0x04		/* load system */
102 
103 #define RTC_FDISKETTE	0x10	/* diskette drive type in upper/lower nibble */
104 #define	 RTCFDT_NONE	 0		/* none present */
105 #define	 RTCFDT_360K	 0x10		/* 360K */
106 #define	 RTCFDT_12M	 0x20		/* 1.2M */
107 #define  RTCFDT_720K     0x30           /* 720K */
108 #define	 RTCFDT_144M	 0x40		/* 1.44M */
109 #define  RTCFDT_288M_1   0x50		/* 2.88M, some BIOSes */
110 #define	 RTCFDT_288M	 0x60		/* 2.88M */
111 
112 #define RTC_BASELO	0x15	/* low byte of basemem size */
113 #define RTC_BASEHI	0x16	/* high byte of basemem size */
114 #define RTC_EXTLO	0x17	/* low byte of extended mem size */
115 #define RTC_EXTHI	0x18	/* low byte of extended mem size */
116 
117 #define	RTC_CENTURY	0x32	/* current century */
118 #endif /* _I386_ISA_RTC_H_ */
119