1*b7d5e03cSMatthew Dillon /* 2*b7d5e03cSMatthew Dillon * Copyright (c) 2013 Qualcomm Atheros, Inc. 3*b7d5e03cSMatthew Dillon * 4*b7d5e03cSMatthew Dillon * Permission to use, copy, modify, and/or distribute this software for any 5*b7d5e03cSMatthew Dillon * purpose with or without fee is hereby granted, provided that the above 6*b7d5e03cSMatthew Dillon * copyright notice and this permission notice appear in all copies. 7*b7d5e03cSMatthew Dillon * 8*b7d5e03cSMatthew Dillon * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH 9*b7d5e03cSMatthew Dillon * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY 10*b7d5e03cSMatthew Dillon * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, 11*b7d5e03cSMatthew Dillon * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 12*b7d5e03cSMatthew Dillon * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR 13*b7d5e03cSMatthew Dillon * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 14*b7d5e03cSMatthew Dillon * PERFORMANCE OF THIS SOFTWARE. 15*b7d5e03cSMatthew Dillon */ 16*b7d5e03cSMatthew Dillon /* */ 17*b7d5e03cSMatthew Dillon /* File: /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint/top/scorpion_reg_map.h*/ 18*b7d5e03cSMatthew Dillon /* Creator: irshad */ 19*b7d5e03cSMatthew Dillon /* Time: Wednesday Feb 15, 2012 [5:06:37 pm] */ 20*b7d5e03cSMatthew Dillon /* */ 21*b7d5e03cSMatthew Dillon /* Path: /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint/top*/ 22*b7d5e03cSMatthew Dillon /* Arguments: /cad/denali/blueprint/3.7.3//Linux-64bit/blueprint -dump */ 23*b7d5e03cSMatthew Dillon /* -codegen */ 24*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/flow/blueprint/ath_ansic.codegen*/ 25*b7d5e03cSMatthew Dillon /* -ath_ansic -Wdesc -I */ 26*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint/top*/ 27*b7d5e03cSMatthew Dillon /* -I /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint */ 28*b7d5e03cSMatthew Dillon /* -I */ 29*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/flow/blueprint*/ 30*b7d5e03cSMatthew Dillon /* -I */ 31*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint/sysconfig*/ 32*b7d5e03cSMatthew Dillon /* -odir */ 33*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint/top*/ 34*b7d5e03cSMatthew Dillon /* -eval {$INCLUDE_SYSCONFIG_FILES=1} -eval */ 35*b7d5e03cSMatthew Dillon /* $WAR_EV58615_for_ansic_codegen=1 scorpion_reg.rdl */ 36*b7d5e03cSMatthew Dillon /* */ 37*b7d5e03cSMatthew Dillon /* Sources: /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint/sysconfig/mac_dcu_reg_sysconfig.rdl*/ 38*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/rtl/rtc/rtc_reg.rdl*/ 39*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/rtl/mac/rtl/mac_dma/blueprint/mac_dma_reg.rdl*/ 40*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint/sysconfig/rtc_reg_sysconfig.rdl*/ 41*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint/sysconfig/mac_pcu_reg_sysconfig.rdl*/ 42*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/rtl/mac/rtl/mac_dma/blueprint/mac_dcu_reg.rdl*/ 43*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/rtl/mac/rtl/mac_pcu/blueprint/mac_pcu_reg.rdl*/ 44*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/rtl/wmac_wrap/rtc_sync_reg.rdl*/ 45*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/rtl/mac/rtl/mac_dma/blueprint/mac_qcu_reg.rdl*/ 46*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint/sysconfig/mac_dma_reg_sysconfig.rdl*/ 47*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint/top/scorpion_reg.rdl*/ 48*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint/sysconfig/bb_reg_map_sysconfig.rdl*/ 49*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint/top/scorpion_radio_reg.rdl*/ 50*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint/sysconfig/svd_reg_sysconfig.rdl*/ 51*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint/sysconfig/radio_65_reg_sysconfig.rdl*/ 52*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/rtl/bb/blueprint/bb_reg_map.rdl*/ 53*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint/sysconfig/rtc_sync_reg_sysconfig.rdl*/ 54*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/rtl/svd/svd_reg.rdl*/ 55*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/blueprint/sysconfig/mac_qcu_reg_sysconfig.rdl*/ 56*b7d5e03cSMatthew Dillon /* /trees/irshad/irshad-scorpion/chips/scorpion/1.0/flow/blueprint/ath_ansic.pm*/ 57*b7d5e03cSMatthew Dillon /* /cad/local/lib/perl/Pinfo.pm */ 58*b7d5e03cSMatthew Dillon /* */ 59*b7d5e03cSMatthew Dillon /* Blueprint: 3.7.3 (Fri Aug 29 12:39:16 PDT 2008) */ 60*b7d5e03cSMatthew Dillon /* Machine: rupavathi.users.atheros.com */ 61*b7d5e03cSMatthew Dillon /* OS: Linux 2.6.9-89.ELsmp */ 62*b7d5e03cSMatthew Dillon /* Description: */ 63*b7d5e03cSMatthew Dillon /* */ 64*b7d5e03cSMatthew Dillon /*This Register Map contains the complete register set for scorpion. */ 65*b7d5e03cSMatthew Dillon /* */ 66*b7d5e03cSMatthew Dillon /* Copyright (C) 2012 Denali Software Inc. All rights reserved */ 67*b7d5e03cSMatthew Dillon /* THIS FILE IS AUTOMATICALLY GENERATED BY DENALI BLUEPRINT, DO NOT EDIT */ 68*b7d5e03cSMatthew Dillon /* */ 69*b7d5e03cSMatthew Dillon 70*b7d5e03cSMatthew Dillon 71*b7d5e03cSMatthew Dillon #ifndef __REG_SCORPION_REG_MAP_H__ 72*b7d5e03cSMatthew Dillon #define __REG_SCORPION_REG_MAP_H__ 73*b7d5e03cSMatthew Dillon 74*b7d5e03cSMatthew Dillon #include "scorpion_reg_map_macro.h" 75*b7d5e03cSMatthew Dillon 76*b7d5e03cSMatthew Dillon struct mac_dma_reg { 77*b7d5e03cSMatthew Dillon volatile char pad__0[0x8]; /* 0x0 - 0x8 */ 78*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_CR; /* 0x8 - 0xc */ 79*b7d5e03cSMatthew Dillon volatile char pad__1[0x8]; /* 0xc - 0x14 */ 80*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_CFG; /* 0x14 - 0x18 */ 81*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_RXBUFPTR_THRESH; /* 0x18 - 0x1c */ 82*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_TXDPPTR_THRESH; /* 0x1c - 0x20 */ 83*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_MIRT; /* 0x20 - 0x24 */ 84*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_GLOBAL_IER; /* 0x24 - 0x28 */ 85*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_TIMT; /* 0x28 - 0x2c */ 86*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_RIMT; /* 0x2c - 0x30 */ 87*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_TXCFG; /* 0x30 - 0x34 */ 88*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_RXCFG; /* 0x34 - 0x38 */ 89*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_RXJLA; /* 0x38 - 0x3c */ 90*b7d5e03cSMatthew Dillon volatile char pad__2[0x4]; /* 0x3c - 0x40 */ 91*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_MIBC; /* 0x40 - 0x44 */ 92*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_TOPS; /* 0x44 - 0x48 */ 93*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_RXNPTO; /* 0x48 - 0x4c */ 94*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_TXNPTO; /* 0x4c - 0x50 */ 95*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_RPGTO; /* 0x50 - 0x54 */ 96*b7d5e03cSMatthew Dillon volatile char pad__3[0x4]; /* 0x54 - 0x58 */ 97*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_MACMISC; /* 0x58 - 0x5c */ 98*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_INTER; /* 0x5c - 0x60 */ 99*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_DATABUF; /* 0x60 - 0x64 */ 100*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_GTT; /* 0x64 - 0x68 */ 101*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_GTTM; /* 0x68 - 0x6c */ 102*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_CST; /* 0x6c - 0x70 */ 103*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_RXDP_SIZE; /* 0x70 - 0x74 */ 104*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_RX_QUEUE_HP_RXDP; /* 0x74 - 0x78 */ 105*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_RX_QUEUE_LP_RXDP; /* 0x78 - 0x7c */ 106*b7d5e03cSMatthew Dillon volatile char pad__4[0x4]; /* 0x7c - 0x80 */ 107*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_ISR_P; /* 0x80 - 0x84 */ 108*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_ISR_S0; /* 0x84 - 0x88 */ 109*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_ISR_S1; /* 0x88 - 0x8c */ 110*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_ISR_S2; /* 0x8c - 0x90 */ 111*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_ISR_S3; /* 0x90 - 0x94 */ 112*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_ISR_S4; /* 0x94 - 0x98 */ 113*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_ISR_S5; /* 0x98 - 0x9c */ 114*b7d5e03cSMatthew Dillon volatile char pad__5[0x4]; /* 0x9c - 0xa0 */ 115*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_IMR_P; /* 0xa0 - 0xa4 */ 116*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_IMR_S0; /* 0xa4 - 0xa8 */ 117*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_IMR_S1; /* 0xa8 - 0xac */ 118*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_IMR_S2; /* 0xac - 0xb0 */ 119*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_IMR_S3; /* 0xb0 - 0xb4 */ 120*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_IMR_S4; /* 0xb4 - 0xb8 */ 121*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_IMR_S5; /* 0xb8 - 0xbc */ 122*b7d5e03cSMatthew Dillon volatile char pad__6[0x4]; /* 0xbc - 0xc0 */ 123*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_ISR_P_RAC; /* 0xc0 - 0xc4 */ 124*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_ISR_S0_S; /* 0xc4 - 0xc8 */ 125*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_ISR_S1_S; /* 0xc8 - 0xcc */ 126*b7d5e03cSMatthew Dillon volatile char pad__7[0x4]; /* 0xcc - 0xd0 */ 127*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_ISR_S2_S; /* 0xd0 - 0xd4 */ 128*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_ISR_S3_S; /* 0xd4 - 0xd8 */ 129*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_ISR_S4_S; /* 0xd8 - 0xdc */ 130*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_ISR_S5_S; /* 0xdc - 0xe0 */ 131*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_DMADBG_0; /* 0xe0 - 0xe4 */ 132*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_DMADBG_1; /* 0xe4 - 0xe8 */ 133*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_DMADBG_2; /* 0xe8 - 0xec */ 134*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_DMADBG_3; /* 0xec - 0xf0 */ 135*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_DMADBG_4; /* 0xf0 - 0xf4 */ 136*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_DMADBG_5; /* 0xf4 - 0xf8 */ 137*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_DMADBG_6; /* 0xf8 - 0xfc */ 138*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_DMADBG_7; /* 0xfc - 0x100 */ 139*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_QCU_TXDP_REMAINING_QCU_7_0; 140*b7d5e03cSMatthew Dillon /* 0x100 - 0x104 */ 141*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_QCU_TXDP_REMAINING_QCU_9_8; 142*b7d5e03cSMatthew Dillon /* 0x104 - 0x108 */ 143*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_TIMT_0; /* 0x108 - 0x10c */ 144*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_TIMT_1; /* 0x10c - 0x110 */ 145*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_TIMT_2; /* 0x110 - 0x114 */ 146*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_TIMT_3; /* 0x114 - 0x118 */ 147*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_TIMT_4; /* 0x118 - 0x11c */ 148*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_TIMT_5; /* 0x11c - 0x120 */ 149*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_TIMT_6; /* 0x120 - 0x124 */ 150*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_TIMT_7; /* 0x124 - 0x128 */ 151*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_TIMT_8; /* 0x128 - 0x12c */ 152*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DMA_TIMT_9; /* 0x12c - 0x130 */ 153*b7d5e03cSMatthew Dillon }; 154*b7d5e03cSMatthew Dillon 155*b7d5e03cSMatthew Dillon struct mac_qcu_reg { 156*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_QCU_TXDP[10]; /* 0x0 - 0x28 */ 157*b7d5e03cSMatthew Dillon volatile char pad__0[0x8]; /* 0x28 - 0x30 */ 158*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_QCU_STATUS_RING_START; /* 0x30 - 0x34 */ 159*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_QCU_STATUS_RING_END; /* 0x34 - 0x38 */ 160*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_QCU_STATUS_RING_CURRENT; /* 0x38 - 0x3c */ 161*b7d5e03cSMatthew Dillon volatile char pad__1[0x4]; /* 0x3c - 0x40 */ 162*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_QCU_TXE; /* 0x40 - 0x44 */ 163*b7d5e03cSMatthew Dillon volatile char pad__2[0x3c]; /* 0x44 - 0x80 */ 164*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_QCU_TXD; /* 0x80 - 0x84 */ 165*b7d5e03cSMatthew Dillon volatile char pad__3[0x3c]; /* 0x84 - 0xc0 */ 166*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_QCU_CBR[10]; /* 0xc0 - 0xe8 */ 167*b7d5e03cSMatthew Dillon volatile char pad__4[0x18]; /* 0xe8 - 0x100 */ 168*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_QCU_RDYTIME[10]; /* 0x100 - 0x128 */ 169*b7d5e03cSMatthew Dillon volatile char pad__5[0x18]; /* 0x128 - 0x140 */ 170*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_QCU_ONESHOT_ARM_SC; /* 0x140 - 0x144 */ 171*b7d5e03cSMatthew Dillon volatile char pad__6[0x3c]; /* 0x144 - 0x180 */ 172*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_QCU_ONESHOT_ARM_CC; /* 0x180 - 0x184 */ 173*b7d5e03cSMatthew Dillon volatile char pad__7[0x3c]; /* 0x184 - 0x1c0 */ 174*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_QCU_MISC[10]; /* 0x1c0 - 0x1e8 */ 175*b7d5e03cSMatthew Dillon volatile char pad__8[0x18]; /* 0x1e8 - 0x200 */ 176*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_QCU_CNT[10]; /* 0x200 - 0x228 */ 177*b7d5e03cSMatthew Dillon volatile char pad__9[0x18]; /* 0x228 - 0x240 */ 178*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_QCU_RDYTIME_SHDN; /* 0x240 - 0x244 */ 179*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_QCU_DESC_CRC_CHK; /* 0x244 - 0x248 */ 180*b7d5e03cSMatthew Dillon }; 181*b7d5e03cSMatthew Dillon 182*b7d5e03cSMatthew Dillon struct mac_dcu_reg { 183*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_QCUMASK[10]; /* 0x0 - 0x28 */ 184*b7d5e03cSMatthew Dillon volatile char pad__0[0x8]; /* 0x28 - 0x30 */ 185*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_GBL_IFS_SIFS; /* 0x30 - 0x34 */ 186*b7d5e03cSMatthew Dillon volatile char pad__1[0x4]; /* 0x34 - 0x38 */ 187*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU0_31_0; /* 0x38 - 0x3c */ 188*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU8_31_0; /* 0x3c - 0x40 */ 189*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_LCL_IFS[10]; /* 0x40 - 0x68 */ 190*b7d5e03cSMatthew Dillon volatile char pad__2[0x8]; /* 0x68 - 0x70 */ 191*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_GBL_IFS_SLOT; /* 0x70 - 0x74 */ 192*b7d5e03cSMatthew Dillon volatile char pad__3[0x4]; /* 0x74 - 0x78 */ 193*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU0_63_32; /* 0x78 - 0x7c */ 194*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU8_63_32; /* 0x7c - 0x80 */ 195*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_RETRY_LIMIT[10]; /* 0x80 - 0xa8 */ 196*b7d5e03cSMatthew Dillon volatile char pad__4[0x8]; /* 0xa8 - 0xb0 */ 197*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_GBL_IFS_EIFS; /* 0xb0 - 0xb4 */ 198*b7d5e03cSMatthew Dillon volatile char pad__5[0x4]; /* 0xb4 - 0xb8 */ 199*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU0_95_64; /* 0xb8 - 0xbc */ 200*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU8_95_64; /* 0xbc - 0xc0 */ 201*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_CHANNEL_TIME[10]; /* 0xc0 - 0xe8 */ 202*b7d5e03cSMatthew Dillon volatile char pad__6[0x8]; /* 0xe8 - 0xf0 */ 203*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_GBL_IFS_MISC; /* 0xf0 - 0xf4 */ 204*b7d5e03cSMatthew Dillon volatile char pad__7[0x4]; /* 0xf4 - 0xf8 */ 205*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU0_127_96; 206*b7d5e03cSMatthew Dillon /* 0xf8 - 0xfc */ 207*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU8_127_96; 208*b7d5e03cSMatthew Dillon /* 0xfc - 0x100 */ 209*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_MISC[10]; /* 0x100 - 0x128 */ 210*b7d5e03cSMatthew Dillon volatile char pad__8[0x10]; /* 0x128 - 0x138 */ 211*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU1_31_0; /* 0x138 - 0x13c */ 212*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU9_31_0; /* 0x13c - 0x140 */ 213*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_SEQ; /* 0x140 - 0x144 */ 214*b7d5e03cSMatthew Dillon volatile char pad__9[0x34]; /* 0x144 - 0x178 */ 215*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU1_63_32; /* 0x178 - 0x17c */ 216*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU9_63_32; /* 0x17c - 0x180 */ 217*b7d5e03cSMatthew Dillon volatile char pad__10[0x38]; /* 0x180 - 0x1b8 */ 218*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU1_95_64; /* 0x1b8 - 0x1bc */ 219*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU9_95_64; /* 0x1bc - 0x1c0 */ 220*b7d5e03cSMatthew Dillon volatile char pad__11[0x38]; /* 0x1c0 - 0x1f8 */ 221*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU1_127_96; 222*b7d5e03cSMatthew Dillon /* 0x1f8 - 0x1fc */ 223*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU9_127_96; 224*b7d5e03cSMatthew Dillon /* 0x1fc - 0x200 */ 225*b7d5e03cSMatthew Dillon volatile char pad__12[0x38]; /* 0x200 - 0x238 */ 226*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU2_31_0; /* 0x238 - 0x23c */ 227*b7d5e03cSMatthew Dillon volatile char pad__13[0x34]; /* 0x23c - 0x270 */ 228*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_PAUSE; /* 0x270 - 0x274 */ 229*b7d5e03cSMatthew Dillon volatile char pad__14[0x4]; /* 0x274 - 0x278 */ 230*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU2_63_32; /* 0x278 - 0x27c */ 231*b7d5e03cSMatthew Dillon volatile char pad__15[0x34]; /* 0x27c - 0x2b0 */ 232*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_WOW_KACFG; /* 0x2b0 - 0x2b4 */ 233*b7d5e03cSMatthew Dillon volatile char pad__16[0x4]; /* 0x2b4 - 0x2b8 */ 234*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU2_95_64; /* 0x2b8 - 0x2bc */ 235*b7d5e03cSMatthew Dillon volatile char pad__17[0x34]; /* 0x2bc - 0x2f0 */ 236*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXSLOT; /* 0x2f0 - 0x2f4 */ 237*b7d5e03cSMatthew Dillon volatile char pad__18[0x4]; /* 0x2f4 - 0x2f8 */ 238*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU2_127_96; 239*b7d5e03cSMatthew Dillon /* 0x2f8 - 0x2fc */ 240*b7d5e03cSMatthew Dillon volatile char pad__19[0x3c]; /* 0x2fc - 0x338 */ 241*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU3_31_0; /* 0x338 - 0x33c */ 242*b7d5e03cSMatthew Dillon volatile char pad__20[0x3c]; /* 0x33c - 0x378 */ 243*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU3_63_32; /* 0x378 - 0x37c */ 244*b7d5e03cSMatthew Dillon volatile char pad__21[0x3c]; /* 0x37c - 0x3b8 */ 245*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU3_95_64; /* 0x3b8 - 0x3bc */ 246*b7d5e03cSMatthew Dillon volatile char pad__22[0x3c]; /* 0x3bc - 0x3f8 */ 247*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU3_127_96; 248*b7d5e03cSMatthew Dillon /* 0x3f8 - 0x3fc */ 249*b7d5e03cSMatthew Dillon volatile char pad__23[0x3c]; /* 0x3fc - 0x438 */ 250*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU4_31_0; /* 0x438 - 0x43c */ 251*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_CLEAR; /* 0x43c - 0x440 */ 252*b7d5e03cSMatthew Dillon volatile char pad__24[0x38]; /* 0x440 - 0x478 */ 253*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU4_63_32; /* 0x478 - 0x47c */ 254*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_SET; /* 0x47c - 0x480 */ 255*b7d5e03cSMatthew Dillon volatile char pad__25[0x38]; /* 0x480 - 0x4b8 */ 256*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU4_95_64; /* 0x4b8 - 0x4bc */ 257*b7d5e03cSMatthew Dillon volatile char pad__26[0x3c]; /* 0x4bc - 0x4f8 */ 258*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU4_127_96; 259*b7d5e03cSMatthew Dillon /* 0x4f8 - 0x4fc */ 260*b7d5e03cSMatthew Dillon volatile char pad__27[0x3c]; /* 0x4fc - 0x538 */ 261*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU5_31_0; /* 0x538 - 0x53c */ 262*b7d5e03cSMatthew Dillon volatile char pad__28[0x3c]; /* 0x53c - 0x578 */ 263*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU5_63_32; /* 0x578 - 0x57c */ 264*b7d5e03cSMatthew Dillon volatile char pad__29[0x3c]; /* 0x57c - 0x5b8 */ 265*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU5_95_64; /* 0x5b8 - 0x5bc */ 266*b7d5e03cSMatthew Dillon volatile char pad__30[0x3c]; /* 0x5bc - 0x5f8 */ 267*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU5_127_96; 268*b7d5e03cSMatthew Dillon /* 0x5f8 - 0x5fc */ 269*b7d5e03cSMatthew Dillon volatile char pad__31[0x3c]; /* 0x5fc - 0x638 */ 270*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU6_31_0; /* 0x638 - 0x63c */ 271*b7d5e03cSMatthew Dillon volatile char pad__32[0x3c]; /* 0x63c - 0x678 */ 272*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU6_63_32; /* 0x678 - 0x67c */ 273*b7d5e03cSMatthew Dillon volatile char pad__33[0x3c]; /* 0x67c - 0x6b8 */ 274*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU6_95_64; /* 0x6b8 - 0x6bc */ 275*b7d5e03cSMatthew Dillon volatile char pad__34[0x3c]; /* 0x6bc - 0x6f8 */ 276*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU6_127_96; 277*b7d5e03cSMatthew Dillon /* 0x6f8 - 0x6fc */ 278*b7d5e03cSMatthew Dillon volatile char pad__35[0x3c]; /* 0x6fc - 0x738 */ 279*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU7_31_0; /* 0x738 - 0x73c */ 280*b7d5e03cSMatthew Dillon volatile char pad__36[0x3c]; /* 0x73c - 0x778 */ 281*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU7_63_32; /* 0x778 - 0x77c */ 282*b7d5e03cSMatthew Dillon volatile char pad__37[0x3c]; /* 0x77c - 0x7b8 */ 283*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU7_95_64; /* 0x7b8 - 0x7bc */ 284*b7d5e03cSMatthew Dillon volatile char pad__38[0x3c]; /* 0x7bc - 0x7f8 */ 285*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_DCU_TXFILTER_DCU7_127_96; 286*b7d5e03cSMatthew Dillon /* 0x7f8 - 0x7fc */ 287*b7d5e03cSMatthew Dillon volatile char pad__39[0x704]; /* 0x7fc - 0xf00 */ 288*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_SLEEP_STATUS; /* 0xf00 - 0xf04 */ 289*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_LED_CONFIG; /* 0xf04 - 0xf08 */ 290*b7d5e03cSMatthew Dillon }; 291*b7d5e03cSMatthew Dillon 292*b7d5e03cSMatthew Dillon struct rtc_reg { 293*b7d5e03cSMatthew Dillon volatile u_int32_t RESET_CONTROL; /* 0x0 - 0x4 */ 294*b7d5e03cSMatthew Dillon volatile u_int32_t XTAL_CONTROL; /* 0x4 - 0x8 */ 295*b7d5e03cSMatthew Dillon volatile u_int32_t REG_CONTROL0; /* 0x8 - 0xc */ 296*b7d5e03cSMatthew Dillon volatile u_int32_t REG_CONTROL1; /* 0xc - 0x10 */ 297*b7d5e03cSMatthew Dillon volatile u_int32_t QUADRATURE; /* 0x10 - 0x14 */ 298*b7d5e03cSMatthew Dillon volatile u_int32_t PLL_CONTROL; /* 0x14 - 0x18 */ 299*b7d5e03cSMatthew Dillon volatile u_int32_t PLL_SETTLE; /* 0x18 - 0x1c */ 300*b7d5e03cSMatthew Dillon volatile u_int32_t XTAL_SETTLE; /* 0x1c - 0x20 */ 301*b7d5e03cSMatthew Dillon volatile u_int32_t CLOCK_OUT; /* 0x20 - 0x24 */ 302*b7d5e03cSMatthew Dillon volatile u_int32_t BIAS_OVERRIDE; /* 0x24 - 0x28 */ 303*b7d5e03cSMatthew Dillon volatile u_int32_t RESET_CAUSE; /* 0x28 - 0x2c */ 304*b7d5e03cSMatthew Dillon volatile u_int32_t SYSTEM_SLEEP; /* 0x2c - 0x30 */ 305*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_SLEEP_CONTROL; /* 0x30 - 0x34 */ 306*b7d5e03cSMatthew Dillon volatile u_int32_t KEEP_AWAKE; /* 0x34 - 0x38 */ 307*b7d5e03cSMatthew Dillon volatile u_int32_t DERIVED_RTC_CLK; /* 0x38 - 0x3c */ 308*b7d5e03cSMatthew Dillon volatile u_int32_t PLL_CONTROL2; /* 0x3c - 0x40 */ 309*b7d5e03cSMatthew Dillon }; 310*b7d5e03cSMatthew Dillon 311*b7d5e03cSMatthew Dillon struct rtc_sync_reg { 312*b7d5e03cSMatthew Dillon volatile u_int32_t RTC_SYNC_RESET; /* 0x0 - 0x4 */ 313*b7d5e03cSMatthew Dillon volatile u_int32_t RTC_SYNC_STATUS; /* 0x4 - 0x8 */ 314*b7d5e03cSMatthew Dillon volatile u_int32_t RTC_SYNC_DERIVED; /* 0x8 - 0xc */ 315*b7d5e03cSMatthew Dillon volatile u_int32_t RTC_SYNC_FORCE_WAKE; /* 0xc - 0x10 */ 316*b7d5e03cSMatthew Dillon volatile u_int32_t RTC_SYNC_INTR_CAUSE; /* 0x10 - 0x14 */ 317*b7d5e03cSMatthew Dillon volatile u_int32_t RTC_SYNC_INTR_ENABLE; /* 0x14 - 0x18 */ 318*b7d5e03cSMatthew Dillon volatile u_int32_t RTC_SYNC_INTR_MASK; /* 0x18 - 0x1c */ 319*b7d5e03cSMatthew Dillon }; 320*b7d5e03cSMatthew Dillon 321*b7d5e03cSMatthew Dillon struct mac_pcu_reg { 322*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_STA_ADDR_L32; /* 0x0 - 0x4 */ 323*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_STA_ADDR_U16; /* 0x4 - 0x8 */ 324*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BSSID_L32; /* 0x8 - 0xc */ 325*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BSSID_U16; /* 0xc - 0x10 */ 326*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BCN_RSSI_AVE; /* 0x10 - 0x14 */ 327*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_ACK_CTS_TIMEOUT; /* 0x14 - 0x18 */ 328*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BCN_RSSI_CTL; /* 0x18 - 0x1c */ 329*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_USEC_LATENCY; /* 0x1c - 0x20 */ 330*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_RESET_TSF; /* 0x20 - 0x24 */ 331*b7d5e03cSMatthew Dillon volatile char pad__0[0x14]; /* 0x24 - 0x38 */ 332*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_MAX_CFP_DUR; /* 0x38 - 0x3c */ 333*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_RX_FILTER; /* 0x3c - 0x40 */ 334*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_MCAST_FILTER_L32; /* 0x40 - 0x44 */ 335*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_MCAST_FILTER_U32; /* 0x44 - 0x48 */ 336*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_DIAG_SW; /* 0x48 - 0x4c */ 337*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TSF_L32; /* 0x4c - 0x50 */ 338*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TSF_U32; /* 0x50 - 0x54 */ 339*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TST_ADDAC; /* 0x54 - 0x58 */ 340*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_DEF_ANTENNA; /* 0x58 - 0x5c */ 341*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_AES_MUTE_MASK_0; /* 0x5c - 0x60 */ 342*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_AES_MUTE_MASK_1; /* 0x60 - 0x64 */ 343*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_GATED_CLKS; /* 0x64 - 0x68 */ 344*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_OBS_BUS_2; /* 0x68 - 0x6c */ 345*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_OBS_BUS_1; /* 0x6c - 0x70 */ 346*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_DYM_MIMO_PWR_SAVE; /* 0x70 - 0x74 */ 347*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TDMA_TXFRAME_START_TIME_TRIGGER_LSB; 348*b7d5e03cSMatthew Dillon /* 0x74 - 0x78 */ 349*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TDMA_TXFRAME_START_TIME_TRIGGER_MSB; 350*b7d5e03cSMatthew Dillon /* 0x78 - 0x7c */ 351*b7d5e03cSMatthew Dillon volatile char pad__1[0x4]; /* 0x7c - 0x80 */ 352*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_LAST_BEACON_TSF; /* 0x80 - 0x84 */ 353*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_NAV; /* 0x84 - 0x88 */ 354*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_RTS_SUCCESS_CNT; /* 0x88 - 0x8c */ 355*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_RTS_FAIL_CNT; /* 0x8c - 0x90 */ 356*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_ACK_FAIL_CNT; /* 0x90 - 0x94 */ 357*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_FCS_FAIL_CNT; /* 0x94 - 0x98 */ 358*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BEACON_CNT; /* 0x98 - 0x9c */ 359*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TDMA_SLOT_ALERT_CNTL; 360*b7d5e03cSMatthew Dillon /* 0x9c - 0xa0 */ 361*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BASIC_SET; /* 0xa0 - 0xa4 */ 362*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_MGMT_SEQ; /* 0xa4 - 0xa8 */ 363*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BF_RPT1; /* 0xa8 - 0xac */ 364*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BF_RPT2; /* 0xac - 0xb0 */ 365*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TX_ANT_1; /* 0xb0 - 0xb4 */ 366*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TX_ANT_2; /* 0xb4 - 0xb8 */ 367*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TX_ANT_3; /* 0xb8 - 0xbc */ 368*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TX_ANT_4; /* 0xbc - 0xc0 */ 369*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_XRMODE; /* 0xc0 - 0xc4 */ 370*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_XRDEL; /* 0xc4 - 0xc8 */ 371*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_XRTO; /* 0xc8 - 0xcc */ 372*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_XRCRP; /* 0xcc - 0xd0 */ 373*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_XRSTMP; /* 0xd0 - 0xd4 */ 374*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_SLP1; /* 0xd4 - 0xd8 */ 375*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_SLP2; /* 0xd8 - 0xdc */ 376*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_SELF_GEN_DEFAULT; /* 0xdc - 0xe0 */ 377*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_ADDR1_MASK_L32; /* 0xe0 - 0xe4 */ 378*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_ADDR1_MASK_U16; /* 0xe4 - 0xe8 */ 379*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TPC; /* 0xe8 - 0xec */ 380*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TX_FRAME_CNT; /* 0xec - 0xf0 */ 381*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_RX_FRAME_CNT; /* 0xf0 - 0xf4 */ 382*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_RX_CLEAR_CNT; /* 0xf4 - 0xf8 */ 383*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_CYCLE_CNT; /* 0xf8 - 0xfc */ 384*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_QUIET_TIME_1; /* 0xfc - 0x100 */ 385*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_QUIET_TIME_2; /* 0x100 - 0x104 */ 386*b7d5e03cSMatthew Dillon volatile char pad__2[0x4]; /* 0x104 - 0x108 */ 387*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_QOS_NO_ACK; /* 0x108 - 0x10c */ 388*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_PHY_ERROR_MASK; /* 0x10c - 0x110 */ 389*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_XRLAT; /* 0x110 - 0x114 */ 390*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_RXBUF; /* 0x114 - 0x118 */ 391*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_MIC_QOS_CONTROL; /* 0x118 - 0x11c */ 392*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_MIC_QOS_SELECT; /* 0x11c - 0x120 */ 393*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_MISC_MODE; /* 0x120 - 0x124 */ 394*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_FILTER_OFDM_CNT; /* 0x124 - 0x128 */ 395*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_FILTER_CCK_CNT; /* 0x128 - 0x12c */ 396*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_PHY_ERR_CNT_1; /* 0x12c - 0x130 */ 397*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_PHY_ERR_CNT_1_MASK; /* 0x130 - 0x134 */ 398*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_PHY_ERR_CNT_2; /* 0x134 - 0x138 */ 399*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_PHY_ERR_CNT_2_MASK; /* 0x138 - 0x13c */ 400*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TSF_THRESHOLD; /* 0x13c - 0x140 */ 401*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_MISC_MODE4; /* 0x140 - 0x144 */ 402*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_PHY_ERROR_EIFS_MASK; /* 0x144 - 0x148 */ 403*b7d5e03cSMatthew Dillon volatile char pad__3[0x20]; /* 0x148 - 0x168 */ 404*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_PHY_ERR_CNT_3; /* 0x168 - 0x16c */ 405*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_PHY_ERR_CNT_3_MASK; /* 0x16c - 0x170 */ 406*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BLUETOOTH_MODE; /* 0x170 - 0x174 */ 407*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BLUETOOTH_WL_WEIGHTS0; 408*b7d5e03cSMatthew Dillon /* 0x174 - 0x178 */ 409*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_HCF_TIMEOUT; /* 0x178 - 0x17c */ 410*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BLUETOOTH_MODE2; /* 0x17c - 0x180 */ 411*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_GENERIC_TIMERS2[16]; /* 0x180 - 0x1c0 */ 412*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_GENERIC_TIMERS2_MODE; 413*b7d5e03cSMatthew Dillon /* 0x1c0 - 0x1c4 */ 414*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BLUETOOTH_WL_WEIGHTS1; 415*b7d5e03cSMatthew Dillon /* 0x1c4 - 0x1c8 */ 416*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BLUETOOTH_TSF_BT_ACTIVE; 417*b7d5e03cSMatthew Dillon /* 0x1c8 - 0x1cc */ 418*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BLUETOOTH_TSF_BT_PRIORITY; 419*b7d5e03cSMatthew Dillon /* 0x1cc - 0x1d0 */ 420*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TXSIFS; /* 0x1d0 - 0x1d4 */ 421*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BLUETOOTH_MODE3; /* 0x1d4 - 0x1d8 */ 422*b7d5e03cSMatthew Dillon volatile char pad__4[0x14]; /* 0x1d8 - 0x1ec */ 423*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TXOP_X; /* 0x1ec - 0x1f0 */ 424*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TXOP_0_3; /* 0x1f0 - 0x1f4 */ 425*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TXOP_4_7; /* 0x1f4 - 0x1f8 */ 426*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TXOP_8_11; /* 0x1f8 - 0x1fc */ 427*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TXOP_12_15; /* 0x1fc - 0x200 */ 428*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_GENERIC_TIMERS[16]; /* 0x200 - 0x240 */ 429*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_GENERIC_TIMERS_MODE; /* 0x240 - 0x244 */ 430*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_SLP32_MODE; /* 0x244 - 0x248 */ 431*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_SLP32_WAKE; /* 0x248 - 0x24c */ 432*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_SLP32_INC; /* 0x24c - 0x250 */ 433*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_SLP_MIB1; /* 0x250 - 0x254 */ 434*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_SLP_MIB2; /* 0x254 - 0x258 */ 435*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_SLP_MIB3; /* 0x258 - 0x25c */ 436*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_WOW1; /* 0x25c - 0x260 */ 437*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_WOW2; /* 0x260 - 0x264 */ 438*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_LOGIC_ANALYZER; /* 0x264 - 0x268 */ 439*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_LOGIC_ANALYZER_32L; /* 0x268 - 0x26c */ 440*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_LOGIC_ANALYZER_16U; /* 0x26c - 0x270 */ 441*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_WOW3_BEACON_FAIL; /* 0x270 - 0x274 */ 442*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_WOW3_BEACON; /* 0x274 - 0x278 */ 443*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_WOW3_KEEP_ALIVE; /* 0x278 - 0x27c */ 444*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_WOW_KA; /* 0x27c - 0x280 */ 445*b7d5e03cSMatthew Dillon volatile char pad__5[0x4]; /* 0x280 - 0x284 */ 446*b7d5e03cSMatthew Dillon volatile u_int32_t PCU_1US; /* 0x284 - 0x288 */ 447*b7d5e03cSMatthew Dillon volatile u_int32_t PCU_KA; /* 0x288 - 0x28c */ 448*b7d5e03cSMatthew Dillon volatile u_int32_t WOW_EXACT; /* 0x28c - 0x290 */ 449*b7d5e03cSMatthew Dillon volatile char pad__6[0x4]; /* 0x290 - 0x294 */ 450*b7d5e03cSMatthew Dillon volatile u_int32_t PCU_WOW4; /* 0x294 - 0x298 */ 451*b7d5e03cSMatthew Dillon volatile u_int32_t PCU_WOW5; /* 0x298 - 0x29c */ 452*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_PHY_ERR_CNT_MASK_CONT; 453*b7d5e03cSMatthew Dillon /* 0x29c - 0x2a0 */ 454*b7d5e03cSMatthew Dillon volatile char pad__7[0x60]; /* 0x2a0 - 0x300 */ 455*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_AZIMUTH_MODE; /* 0x300 - 0x304 */ 456*b7d5e03cSMatthew Dillon volatile char pad__8[0x10]; /* 0x304 - 0x314 */ 457*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_AZIMUTH_TIME_STAMP; /* 0x314 - 0x318 */ 458*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_20_40_MODE; /* 0x318 - 0x31c */ 459*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_H_XFER_TIMEOUT; /* 0x31c - 0x320 */ 460*b7d5e03cSMatthew Dillon volatile char pad__9[0x8]; /* 0x320 - 0x328 */ 461*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_RX_CLEAR_DIFF_CNT; /* 0x328 - 0x32c */ 462*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_SELF_GEN_ANTENNA_MASK; 463*b7d5e03cSMatthew Dillon /* 0x32c - 0x330 */ 464*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BA_BAR_CONTROL; /* 0x330 - 0x334 */ 465*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_LEGACY_PLCP_SPOOF; /* 0x334 - 0x338 */ 466*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_PHY_ERROR_MASK_CONT; /* 0x338 - 0x33c */ 467*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TX_TIMER; /* 0x33c - 0x340 */ 468*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TXBUF_CTRL; /* 0x340 - 0x344 */ 469*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_MISC_MODE2; /* 0x344 - 0x348 */ 470*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_ALT_AES_MUTE_MASK; /* 0x348 - 0x34c */ 471*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_WOW6; /* 0x34c - 0x350 */ 472*b7d5e03cSMatthew Dillon volatile u_int32_t ASYNC_FIFO_REG1; /* 0x350 - 0x354 */ 473*b7d5e03cSMatthew Dillon volatile u_int32_t ASYNC_FIFO_REG2; /* 0x354 - 0x358 */ 474*b7d5e03cSMatthew Dillon volatile u_int32_t ASYNC_FIFO_REG3; /* 0x358 - 0x35c */ 475*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_WOW5; /* 0x35c - 0x360 */ 476*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_WOW_LENGTH1; /* 0x360 - 0x364 */ 477*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_WOW_LENGTH2; /* 0x364 - 0x368 */ 478*b7d5e03cSMatthew Dillon volatile u_int32_t WOW_PATTERN_MATCH_LESS_THAN_256_BYTES; 479*b7d5e03cSMatthew Dillon /* 0x368 - 0x36c */ 480*b7d5e03cSMatthew Dillon volatile char pad__10[0x4]; /* 0x36c - 0x370 */ 481*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_WOW4; /* 0x370 - 0x374 */ 482*b7d5e03cSMatthew Dillon volatile u_int32_t WOW2_EXACT; /* 0x374 - 0x378 */ 483*b7d5e03cSMatthew Dillon volatile u_int32_t PCU_WOW6; /* 0x378 - 0x37c */ 484*b7d5e03cSMatthew Dillon volatile u_int32_t PCU_WOW7; /* 0x37c - 0x380 */ 485*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_WOW_LENGTH3; /* 0x380 - 0x384 */ 486*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_WOW_LENGTH4; /* 0x384 - 0x388 */ 487*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_LOCATION_MODE_CONTROL; 488*b7d5e03cSMatthew Dillon /* 0x388 - 0x38c */ 489*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_LOCATION_MODE_TIMER; /* 0x38c - 0x390 */ 490*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TSF2_L32; /* 0x390 - 0x394 */ 491*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TSF2_U32; /* 0x394 - 0x398 */ 492*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BSSID2_L32; /* 0x398 - 0x39c */ 493*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BSSID2_U16; /* 0x39c - 0x3a0 */ 494*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_DIRECT_CONNECT; /* 0x3a0 - 0x3a4 */ 495*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TID_TO_AC; /* 0x3a4 - 0x3a8 */ 496*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_HP_QUEUE; /* 0x3a8 - 0x3ac */ 497*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BLUETOOTH_BT_WEIGHTS0; 498*b7d5e03cSMatthew Dillon /* 0x3ac - 0x3b0 */ 499*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BLUETOOTH_BT_WEIGHTS1; 500*b7d5e03cSMatthew Dillon /* 0x3b0 - 0x3b4 */ 501*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BLUETOOTH_BT_WEIGHTS2; 502*b7d5e03cSMatthew Dillon /* 0x3b4 - 0x3b8 */ 503*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BLUETOOTH_BT_WEIGHTS3; 504*b7d5e03cSMatthew Dillon /* 0x3b8 - 0x3bc */ 505*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_AGC_SATURATION_CNT0; /* 0x3bc - 0x3c0 */ 506*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_AGC_SATURATION_CNT1; /* 0x3c0 - 0x3c4 */ 507*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_AGC_SATURATION_CNT2; /* 0x3c4 - 0x3c8 */ 508*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_HW_BCN_PROC1; /* 0x3c8 - 0x3cc */ 509*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_HW_BCN_PROC2; /* 0x3cc - 0x3d0 */ 510*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_MISC_MODE3; /* 0x3d0 - 0x3d4 */ 511*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_FILTER_RSSI_AVE; /* 0x3d4 - 0x3d8 */ 512*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_PHY_ERROR_AIFS_MASK; /* 0x3d8 - 0x3dc */ 513*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_PS_FILTER; /* 0x3dc - 0x3e0 */ 514*b7d5e03cSMatthew Dillon volatile char pad__11[0x20]; /* 0x3e0 - 0x400 */ 515*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_TXBUF_BA[64]; /* 0x400 - 0x500 */ 516*b7d5e03cSMatthew Dillon volatile char pad__12[0x300]; /* 0x500 - 0x800 */ 517*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_KEY_CACHE[1024]; /* 0x800 - 0x1800 */ 518*b7d5e03cSMatthew Dillon }; 519*b7d5e03cSMatthew Dillon 520*b7d5e03cSMatthew Dillon struct chn_reg_map { 521*b7d5e03cSMatthew Dillon volatile u_int32_t BB_timing_controls_1; /* 0x0 - 0x4 */ 522*b7d5e03cSMatthew Dillon volatile u_int32_t BB_timing_controls_2; /* 0x4 - 0x8 */ 523*b7d5e03cSMatthew Dillon volatile u_int32_t BB_timing_controls_3; /* 0x8 - 0xc */ 524*b7d5e03cSMatthew Dillon volatile u_int32_t BB_timing_control_4; /* 0xc - 0x10 */ 525*b7d5e03cSMatthew Dillon volatile u_int32_t BB_timing_control_5; /* 0x10 - 0x14 */ 526*b7d5e03cSMatthew Dillon volatile u_int32_t BB_timing_control_6; /* 0x14 - 0x18 */ 527*b7d5e03cSMatthew Dillon volatile u_int32_t BB_timing_control_11; /* 0x18 - 0x1c */ 528*b7d5e03cSMatthew Dillon volatile u_int32_t BB_spur_mask_controls; /* 0x1c - 0x20 */ 529*b7d5e03cSMatthew Dillon volatile u_int32_t BB_find_signal_low; /* 0x20 - 0x24 */ 530*b7d5e03cSMatthew Dillon volatile u_int32_t BB_sfcorr; /* 0x24 - 0x28 */ 531*b7d5e03cSMatthew Dillon volatile u_int32_t BB_self_corr_low; /* 0x28 - 0x2c */ 532*b7d5e03cSMatthew Dillon volatile u_int32_t BB_ext_chan_scorr_thr; /* 0x2c - 0x30 */ 533*b7d5e03cSMatthew Dillon volatile u_int32_t BB_ext_chan_pwr_thr_2_b0; /* 0x30 - 0x34 */ 534*b7d5e03cSMatthew Dillon volatile u_int32_t BB_radar_detection; /* 0x34 - 0x38 */ 535*b7d5e03cSMatthew Dillon volatile u_int32_t BB_radar_detection_2; /* 0x38 - 0x3c */ 536*b7d5e03cSMatthew Dillon volatile u_int32_t BB_extension_radar; /* 0x3c - 0x40 */ 537*b7d5e03cSMatthew Dillon volatile char pad__0[0x40]; /* 0x40 - 0x80 */ 538*b7d5e03cSMatthew Dillon volatile u_int32_t BB_multichain_control; /* 0x80 - 0x84 */ 539*b7d5e03cSMatthew Dillon volatile u_int32_t BB_per_chain_csd; /* 0x84 - 0x88 */ 540*b7d5e03cSMatthew Dillon volatile char pad__1[0x18]; /* 0x88 - 0xa0 */ 541*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_crc; /* 0xa0 - 0xa4 */ 542*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tstdac_constant; /* 0xa4 - 0xa8 */ 543*b7d5e03cSMatthew Dillon volatile u_int32_t BB_spur_report_b0; /* 0xa8 - 0xac */ 544*b7d5e03cSMatthew Dillon volatile char pad__2[0x4]; /* 0xac - 0xb0 */ 545*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiqcal_control_3; /* 0xb0 - 0xb4 */ 546*b7d5e03cSMatthew Dillon volatile char pad__3[0x8]; /* 0xb4 - 0xbc */ 547*b7d5e03cSMatthew Dillon volatile u_int32_t BB_green_tx_control_1; /* 0xbc - 0xc0 */ 548*b7d5e03cSMatthew Dillon volatile u_int32_t BB_iq_adc_meas_0_b0; /* 0xc0 - 0xc4 */ 549*b7d5e03cSMatthew Dillon volatile u_int32_t BB_iq_adc_meas_1_b0; /* 0xc4 - 0xc8 */ 550*b7d5e03cSMatthew Dillon volatile u_int32_t BB_iq_adc_meas_2_b0; /* 0xc8 - 0xcc */ 551*b7d5e03cSMatthew Dillon volatile u_int32_t BB_iq_adc_meas_3_b0; /* 0xcc - 0xd0 */ 552*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_phase_ramp_b0; /* 0xd0 - 0xd4 */ 553*b7d5e03cSMatthew Dillon volatile u_int32_t BB_adc_gain_dc_corr_b0; /* 0xd4 - 0xd8 */ 554*b7d5e03cSMatthew Dillon volatile char pad__4[0x4]; /* 0xd8 - 0xdc */ 555*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rx_iq_corr_b0; /* 0xdc - 0xe0 */ 556*b7d5e03cSMatthew Dillon volatile char pad__5[0x4]; /* 0xe0 - 0xe4 */ 557*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_am2am_mask; /* 0xe4 - 0xe8 */ 558*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_am2pm_mask; /* 0xe8 - 0xec */ 559*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_ht40_mask; /* 0xec - 0xf0 */ 560*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_ctrl0_b0; /* 0xf0 - 0xf4 */ 561*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_ctrl1_b0; /* 0xf4 - 0xf8 */ 562*b7d5e03cSMatthew Dillon volatile u_int32_t BB_pa_gain123_b0; /* 0xf8 - 0xfc */ 563*b7d5e03cSMatthew Dillon volatile u_int32_t BB_pa_gain45_b0; /* 0xfc - 0x100 */ 564*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_0_b0; 565*b7d5e03cSMatthew Dillon /* 0x100 - 0x104 */ 566*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_1_b0; 567*b7d5e03cSMatthew Dillon /* 0x104 - 0x108 */ 568*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_2_b0; 569*b7d5e03cSMatthew Dillon /* 0x108 - 0x10c */ 570*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_3_b0; 571*b7d5e03cSMatthew Dillon /* 0x10c - 0x110 */ 572*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_4_b0; 573*b7d5e03cSMatthew Dillon /* 0x110 - 0x114 */ 574*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_5_b0; 575*b7d5e03cSMatthew Dillon /* 0x114 - 0x118 */ 576*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_6_b0; 577*b7d5e03cSMatthew Dillon /* 0x118 - 0x11c */ 578*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_7_b0; 579*b7d5e03cSMatthew Dillon /* 0x11c - 0x120 */ 580*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_mem_tab_b0[120]; /* 0x120 - 0x300 */ 581*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chan_info_chan_tab_b0[60]; 582*b7d5e03cSMatthew Dillon /* 0x300 - 0x3f0 */ 583*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chn_tables_intf_addr; /* 0x3f0 - 0x3f4 */ 584*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chn_tables_intf_data; /* 0x3f4 - 0x3f8 */ 585*b7d5e03cSMatthew Dillon }; 586*b7d5e03cSMatthew Dillon 587*b7d5e03cSMatthew Dillon struct mrc_reg_map { 588*b7d5e03cSMatthew Dillon volatile u_int32_t BB_timing_control_3a; /* 0x0 - 0x4 */ 589*b7d5e03cSMatthew Dillon volatile u_int32_t BB_ldpc_cntl1; /* 0x4 - 0x8 */ 590*b7d5e03cSMatthew Dillon volatile u_int32_t BB_ldpc_cntl2; /* 0x8 - 0xc */ 591*b7d5e03cSMatthew Dillon volatile u_int32_t BB_pilot_spur_mask; /* 0xc - 0x10 */ 592*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chan_spur_mask; /* 0x10 - 0x14 */ 593*b7d5e03cSMatthew Dillon volatile u_int32_t BB_short_gi_delta_slope; /* 0x14 - 0x18 */ 594*b7d5e03cSMatthew Dillon volatile u_int32_t BB_ml_cntl1; /* 0x18 - 0x1c */ 595*b7d5e03cSMatthew Dillon volatile u_int32_t BB_ml_cntl2; /* 0x1c - 0x20 */ 596*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tstadc; /* 0x20 - 0x24 */ 597*b7d5e03cSMatthew Dillon }; 598*b7d5e03cSMatthew Dillon 599*b7d5e03cSMatthew Dillon struct bbb_reg_map { 600*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bbb_rx_ctrl_1; /* 0x0 - 0x4 */ 601*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bbb_rx_ctrl_2; /* 0x4 - 0x8 */ 602*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bbb_rx_ctrl_3; /* 0x8 - 0xc */ 603*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bbb_rx_ctrl_4; /* 0xc - 0x10 */ 604*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bbb_rx_ctrl_5; /* 0x10 - 0x14 */ 605*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bbb_rx_ctrl_6; /* 0x14 - 0x18 */ 606*b7d5e03cSMatthew Dillon volatile u_int32_t BB_force_clken_cck; /* 0x18 - 0x1c */ 607*b7d5e03cSMatthew Dillon }; 608*b7d5e03cSMatthew Dillon 609*b7d5e03cSMatthew Dillon struct agc_reg_map { 610*b7d5e03cSMatthew Dillon volatile u_int32_t BB_settling_time; /* 0x0 - 0x4 */ 611*b7d5e03cSMatthew Dillon volatile u_int32_t BB_gain_force_max_gains_b0; /* 0x4 - 0x8 */ 612*b7d5e03cSMatthew Dillon volatile u_int32_t BB_gains_min_offsets; /* 0x8 - 0xc */ 613*b7d5e03cSMatthew Dillon volatile u_int32_t BB_desired_sigsize; /* 0xc - 0x10 */ 614*b7d5e03cSMatthew Dillon volatile u_int32_t BB_find_signal; /* 0x10 - 0x14 */ 615*b7d5e03cSMatthew Dillon volatile u_int32_t BB_agc; /* 0x14 - 0x18 */ 616*b7d5e03cSMatthew Dillon volatile u_int32_t BB_ext_atten_switch_ctl_b0; /* 0x18 - 0x1c */ 617*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cca_b0; /* 0x1c - 0x20 */ 618*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cca_ctrl_2_b0; /* 0x20 - 0x24 */ 619*b7d5e03cSMatthew Dillon volatile u_int32_t BB_restart; /* 0x24 - 0x28 */ 620*b7d5e03cSMatthew Dillon volatile u_int32_t BB_multichain_gain_ctrl; /* 0x28 - 0x2c */ 621*b7d5e03cSMatthew Dillon volatile u_int32_t BB_ext_chan_pwr_thr_1; /* 0x2c - 0x30 */ 622*b7d5e03cSMatthew Dillon volatile u_int32_t BB_ext_chan_detect_win; /* 0x30 - 0x34 */ 623*b7d5e03cSMatthew Dillon volatile u_int32_t BB_pwr_thr_20_40_det; /* 0x34 - 0x38 */ 624*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rifs_srch; /* 0x38 - 0x3c */ 625*b7d5e03cSMatthew Dillon volatile u_int32_t BB_peak_det_ctrl_1; /* 0x3c - 0x40 */ 626*b7d5e03cSMatthew Dillon volatile u_int32_t BB_peak_det_ctrl_2; /* 0x40 - 0x44 */ 627*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rx_gain_bounds_1; /* 0x44 - 0x48 */ 628*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rx_gain_bounds_2; /* 0x48 - 0x4c */ 629*b7d5e03cSMatthew Dillon volatile u_int32_t BB_peak_det_cal_ctrl; /* 0x4c - 0x50 */ 630*b7d5e03cSMatthew Dillon volatile u_int32_t BB_agc_dig_dc_ctrl; /* 0x50 - 0x54 */ 631*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bt_coex_1; /* 0x54 - 0x58 */ 632*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bt_coex_2; /* 0x58 - 0x5c */ 633*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bt_coex_3; /* 0x5c - 0x60 */ 634*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bt_coex_4; /* 0x60 - 0x64 */ 635*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bt_coex_5; /* 0x64 - 0x68 */ 636*b7d5e03cSMatthew Dillon volatile u_int32_t BB_redpwr_ctrl_1; /* 0x68 - 0x6c */ 637*b7d5e03cSMatthew Dillon volatile u_int32_t BB_redpwr_ctrl_2; /* 0x6c - 0x70 */ 638*b7d5e03cSMatthew Dillon volatile char pad__0[0x110]; /* 0x70 - 0x180 */ 639*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rssi_b0; /* 0x180 - 0x184 */ 640*b7d5e03cSMatthew Dillon volatile u_int32_t BB_spur_est_cck_report_b0; /* 0x184 - 0x188 */ 641*b7d5e03cSMatthew Dillon volatile u_int32_t BB_agc_dig_dc_status_i_b0; /* 0x188 - 0x18c */ 642*b7d5e03cSMatthew Dillon volatile u_int32_t BB_agc_dig_dc_status_q_b0; /* 0x18c - 0x190 */ 643*b7d5e03cSMatthew Dillon volatile u_int32_t BB_dc_cal_status_b0; /* 0x190 - 0x194 */ 644*b7d5e03cSMatthew Dillon volatile char pad__1[0x2c]; /* 0x194 - 0x1c0 */ 645*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bbb_sig_detect; /* 0x1c0 - 0x1c4 */ 646*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bbb_dagc_ctrl; /* 0x1c4 - 0x1c8 */ 647*b7d5e03cSMatthew Dillon volatile u_int32_t BB_iqcorr_ctrl_cck; /* 0x1c8 - 0x1cc */ 648*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cck_spur_mit; /* 0x1cc - 0x1d0 */ 649*b7d5e03cSMatthew Dillon volatile u_int32_t BB_mrc_cck_ctrl; /* 0x1d0 - 0x1d4 */ 650*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cck_blocker_det; /* 0x1d4 - 0x1d8 */ 651*b7d5e03cSMatthew Dillon volatile char pad__2[0x28]; /* 0x1d8 - 0x200 */ 652*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rx_ocgain[128]; /* 0x200 - 0x400 */ 653*b7d5e03cSMatthew Dillon }; 654*b7d5e03cSMatthew Dillon 655*b7d5e03cSMatthew Dillon struct sm_reg_map { 656*b7d5e03cSMatthew Dillon volatile u_int32_t BB_D2_chip_id; /* 0x0 - 0x4 */ 657*b7d5e03cSMatthew Dillon volatile u_int32_t BB_gen_controls; /* 0x4 - 0x8 */ 658*b7d5e03cSMatthew Dillon volatile u_int32_t BB_modes_select; /* 0x8 - 0xc */ 659*b7d5e03cSMatthew Dillon volatile u_int32_t BB_active; /* 0xc - 0x10 */ 660*b7d5e03cSMatthew Dillon volatile char pad__0[0x10]; /* 0x10 - 0x20 */ 661*b7d5e03cSMatthew Dillon volatile u_int32_t BB_vit_spur_mask_A; /* 0x20 - 0x24 */ 662*b7d5e03cSMatthew Dillon volatile u_int32_t BB_vit_spur_mask_B; /* 0x24 - 0x28 */ 663*b7d5e03cSMatthew Dillon volatile u_int32_t BB_spectral_scan; /* 0x28 - 0x2c */ 664*b7d5e03cSMatthew Dillon volatile u_int32_t BB_radar_bw_filter; /* 0x2c - 0x30 */ 665*b7d5e03cSMatthew Dillon volatile u_int32_t BB_search_start_delay; /* 0x30 - 0x34 */ 666*b7d5e03cSMatthew Dillon volatile u_int32_t BB_max_rx_length; /* 0x34 - 0x38 */ 667*b7d5e03cSMatthew Dillon volatile u_int32_t BB_frame_control; /* 0x38 - 0x3c */ 668*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rfbus_request; /* 0x3c - 0x40 */ 669*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rfbus_grant; /* 0x40 - 0x44 */ 670*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rifs; /* 0x44 - 0x48 */ 671*b7d5e03cSMatthew Dillon volatile u_int32_t BB_spectral_scan_2; /* 0x48 - 0x4c */ 672*b7d5e03cSMatthew Dillon volatile char pad__1[0x4]; /* 0x4c - 0x50 */ 673*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rx_clear_delay; /* 0x50 - 0x54 */ 674*b7d5e03cSMatthew Dillon volatile u_int32_t BB_analog_power_on_time; /* 0x54 - 0x58 */ 675*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_timing_1; /* 0x58 - 0x5c */ 676*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_timing_2; /* 0x5c - 0x60 */ 677*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_timing_3; /* 0x60 - 0x64 */ 678*b7d5e03cSMatthew Dillon volatile u_int32_t BB_xpa_timing_control; /* 0x64 - 0x68 */ 679*b7d5e03cSMatthew Dillon volatile char pad__2[0x18]; /* 0x68 - 0x80 */ 680*b7d5e03cSMatthew Dillon volatile u_int32_t BB_misc_pa_control; /* 0x80 - 0x84 */ 681*b7d5e03cSMatthew Dillon volatile u_int32_t BB_switch_table_chn_b0; /* 0x84 - 0x88 */ 682*b7d5e03cSMatthew Dillon volatile u_int32_t BB_switch_table_com1; /* 0x88 - 0x8c */ 683*b7d5e03cSMatthew Dillon volatile u_int32_t BB_switch_table_com2; /* 0x8c - 0x90 */ 684*b7d5e03cSMatthew Dillon volatile char pad__3[0x10]; /* 0x90 - 0xa0 */ 685*b7d5e03cSMatthew Dillon volatile u_int32_t BB_multichain_enable; /* 0xa0 - 0xa4 */ 686*b7d5e03cSMatthew Dillon volatile char pad__4[0x1c]; /* 0xa4 - 0xc0 */ 687*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cal_chain_mask; /* 0xc0 - 0xc4 */ 688*b7d5e03cSMatthew Dillon volatile u_int32_t BB_agc_control; /* 0xc4 - 0xc8 */ 689*b7d5e03cSMatthew Dillon volatile u_int32_t BB_iq_adc_cal_mode; /* 0xc8 - 0xcc */ 690*b7d5e03cSMatthew Dillon volatile u_int32_t BB_fcal_1; /* 0xcc - 0xd0 */ 691*b7d5e03cSMatthew Dillon volatile u_int32_t BB_fcal_2_b0; /* 0xd0 - 0xd4 */ 692*b7d5e03cSMatthew Dillon volatile u_int32_t BB_dft_tone_ctrl_b0; /* 0xd4 - 0xd8 */ 693*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_cal_ctrl; /* 0xd8 - 0xdc */ 694*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_0_b0; /* 0xdc - 0xe0 */ 695*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_1_b0; /* 0xe0 - 0xe4 */ 696*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_2_b0; /* 0xe4 - 0xe8 */ 697*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_3_b0; /* 0xe8 - 0xec */ 698*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_pal_0_b0; /* 0xec - 0xf0 */ 699*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_pal_1_b0; /* 0xf0 - 0xf4 */ 700*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_pal_2_b0; /* 0xf4 - 0xf8 */ 701*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_pal_3_b0; /* 0xf8 - 0xfc */ 702*b7d5e03cSMatthew Dillon volatile char pad__5[0x4]; /* 0xfc - 0x100 */ 703*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_tab_b0[16]; /* 0x100 - 0x140 */ 704*b7d5e03cSMatthew Dillon volatile u_int32_t BB_synth_control; /* 0x140 - 0x144 */ 705*b7d5e03cSMatthew Dillon volatile u_int32_t BB_addac_clk_select; /* 0x144 - 0x148 */ 706*b7d5e03cSMatthew Dillon volatile u_int32_t BB_pll_cntl; /* 0x148 - 0x14c */ 707*b7d5e03cSMatthew Dillon volatile u_int32_t BB_analog_swap; /* 0x14c - 0x150 */ 708*b7d5e03cSMatthew Dillon volatile u_int32_t BB_addac_parallel_control; /* 0x150 - 0x154 */ 709*b7d5e03cSMatthew Dillon volatile char pad__6[0x4]; /* 0x154 - 0x158 */ 710*b7d5e03cSMatthew Dillon volatile u_int32_t BB_force_analog; /* 0x158 - 0x15c */ 711*b7d5e03cSMatthew Dillon volatile char pad__7[0x4]; /* 0x15c - 0x160 */ 712*b7d5e03cSMatthew Dillon volatile u_int32_t BB_test_controls; /* 0x160 - 0x164 */ 713*b7d5e03cSMatthew Dillon volatile u_int32_t BB_test_controls_status; /* 0x164 - 0x168 */ 714*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tstdac; /* 0x168 - 0x16c */ 715*b7d5e03cSMatthew Dillon volatile u_int32_t BB_channel_status; /* 0x16c - 0x170 */ 716*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chaninfo_ctrl; /* 0x170 - 0x174 */ 717*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chan_info_noise_pwr; /* 0x174 - 0x178 */ 718*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chan_info_gain_diff; /* 0x178 - 0x17c */ 719*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chan_info_fine_timing; /* 0x17c - 0x180 */ 720*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chan_info_gain_b0; /* 0x180 - 0x184 */ 721*b7d5e03cSMatthew Dillon volatile char pad__8[0xc]; /* 0x184 - 0x190 */ 722*b7d5e03cSMatthew Dillon volatile u_int32_t BB_scrambler_seed; /* 0x190 - 0x194 */ 723*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bbb_tx_ctrl; /* 0x194 - 0x198 */ 724*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bbb_txfir_0; /* 0x198 - 0x19c */ 725*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bbb_txfir_1; /* 0x19c - 0x1a0 */ 726*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bbb_txfir_2; /* 0x1a0 - 0x1a4 */ 727*b7d5e03cSMatthew Dillon volatile u_int32_t BB_heavy_clip_ctrl; /* 0x1a4 - 0x1a8 */ 728*b7d5e03cSMatthew Dillon volatile u_int32_t BB_heavy_clip_20; /* 0x1a8 - 0x1ac */ 729*b7d5e03cSMatthew Dillon volatile u_int32_t BB_heavy_clip_40; /* 0x1ac - 0x1b0 */ 730*b7d5e03cSMatthew Dillon volatile u_int32_t BB_illegal_tx_rate; /* 0x1b0 - 0x1b4 */ 731*b7d5e03cSMatthew Dillon volatile char pad__9[0xc]; /* 0x1b4 - 0x1c0 */ 732*b7d5e03cSMatthew Dillon volatile u_int32_t BB_powertx_rate1; /* 0x1c0 - 0x1c4 */ 733*b7d5e03cSMatthew Dillon volatile u_int32_t BB_powertx_rate2; /* 0x1c4 - 0x1c8 */ 734*b7d5e03cSMatthew Dillon volatile u_int32_t BB_powertx_rate3; /* 0x1c8 - 0x1cc */ 735*b7d5e03cSMatthew Dillon volatile u_int32_t BB_powertx_rate4; /* 0x1cc - 0x1d0 */ 736*b7d5e03cSMatthew Dillon volatile u_int32_t BB_powertx_rate5; /* 0x1d0 - 0x1d4 */ 737*b7d5e03cSMatthew Dillon volatile u_int32_t BB_powertx_rate6; /* 0x1d4 - 0x1d8 */ 738*b7d5e03cSMatthew Dillon volatile u_int32_t BB_powertx_rate7; /* 0x1d8 - 0x1dc */ 739*b7d5e03cSMatthew Dillon volatile u_int32_t BB_powertx_rate8; /* 0x1dc - 0x1e0 */ 740*b7d5e03cSMatthew Dillon volatile u_int32_t BB_powertx_rate9; /* 0x1e0 - 0x1e4 */ 741*b7d5e03cSMatthew Dillon volatile u_int32_t BB_powertx_rate10; /* 0x1e4 - 0x1e8 */ 742*b7d5e03cSMatthew Dillon volatile u_int32_t BB_powertx_rate11; /* 0x1e8 - 0x1ec */ 743*b7d5e03cSMatthew Dillon volatile u_int32_t BB_powertx_rate12; /* 0x1ec - 0x1f0 */ 744*b7d5e03cSMatthew Dillon volatile u_int32_t BB_powertx_max; /* 0x1f0 - 0x1f4 */ 745*b7d5e03cSMatthew Dillon volatile u_int32_t BB_powertx_sub; /* 0x1f4 - 0x1f8 */ 746*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_1; /* 0x1f8 - 0x1fc */ 747*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_2; /* 0x1fc - 0x200 */ 748*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_3; /* 0x200 - 0x204 */ 749*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_4_b0; /* 0x204 - 0x208 */ 750*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_5_b0; /* 0x208 - 0x20c */ 751*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_6_b0; /* 0x20c - 0x210 */ 752*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_7; /* 0x210 - 0x214 */ 753*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_8; /* 0x214 - 0x218 */ 754*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_9; /* 0x218 - 0x21c */ 755*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_10; /* 0x21c - 0x220 */ 756*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_11_b0; /* 0x220 - 0x224 */ 757*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_12; /* 0x224 - 0x228 */ 758*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_13; /* 0x228 - 0x22c */ 759*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_14; /* 0x22c - 0x230 */ 760*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_15; /* 0x230 - 0x234 */ 761*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_16; /* 0x234 - 0x238 */ 762*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_17; /* 0x238 - 0x23c */ 763*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_18; /* 0x23c - 0x240 */ 764*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_19_b0; /* 0x240 - 0x244 */ 765*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_20; /* 0x244 - 0x248 */ 766*b7d5e03cSMatthew Dillon volatile u_int32_t BB_therm_adc_1; /* 0x248 - 0x24c */ 767*b7d5e03cSMatthew Dillon volatile u_int32_t BB_therm_adc_2; /* 0x24c - 0x250 */ 768*b7d5e03cSMatthew Dillon volatile u_int32_t BB_therm_adc_3; /* 0x250 - 0x254 */ 769*b7d5e03cSMatthew Dillon volatile u_int32_t BB_therm_adc_4; /* 0x254 - 0x258 */ 770*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_forced_gain; /* 0x258 - 0x25c */ 771*b7d5e03cSMatthew Dillon volatile char pad__10[0x24]; /* 0x25c - 0x280 */ 772*b7d5e03cSMatthew Dillon volatile u_int32_t BB_pdadc_tab_b0[32]; /* 0x280 - 0x300 */ 773*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_1; /* 0x300 - 0x304 */ 774*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_2; /* 0x304 - 0x308 */ 775*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_3; /* 0x308 - 0x30c */ 776*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_4; /* 0x30c - 0x310 */ 777*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_5; /* 0x310 - 0x314 */ 778*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_6; /* 0x314 - 0x318 */ 779*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_7; /* 0x318 - 0x31c */ 780*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_8; /* 0x31c - 0x320 */ 781*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_9; /* 0x320 - 0x324 */ 782*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_10; /* 0x324 - 0x328 */ 783*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_11; /* 0x328 - 0x32c */ 784*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_12; /* 0x32c - 0x330 */ 785*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_13; /* 0x330 - 0x334 */ 786*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_14; /* 0x334 - 0x338 */ 787*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_15; /* 0x338 - 0x33c */ 788*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_16; /* 0x33c - 0x340 */ 789*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_17; /* 0x340 - 0x344 */ 790*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_18; /* 0x344 - 0x348 */ 791*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_19; /* 0x348 - 0x34c */ 792*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_20; /* 0x34c - 0x350 */ 793*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_21; /* 0x350 - 0x354 */ 794*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_22; /* 0x354 - 0x358 */ 795*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_23; /* 0x358 - 0x35c */ 796*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_24; /* 0x35c - 0x360 */ 797*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_25; /* 0x360 - 0x364 */ 798*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_26; /* 0x364 - 0x368 */ 799*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_27; /* 0x368 - 0x36c */ 800*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_28; /* 0x36c - 0x370 */ 801*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_29; /* 0x370 - 0x374 */ 802*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_30; /* 0x374 - 0x378 */ 803*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_31; /* 0x378 - 0x37c */ 804*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_gain_tab_32; /* 0x37c - 0x380 */ 805*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rtt_ctrl; /* 0x380 - 0x384 */ 806*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rtt_table_sw_intf_b0; /* 0x384 - 0x388 */ 807*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rtt_table_sw_intf_1_b0; /* 0x388 - 0x38c */ 808*b7d5e03cSMatthew Dillon volatile char pad__11[0x74]; /* 0x38c - 0x400 */ 809*b7d5e03cSMatthew Dillon volatile u_int32_t BB_caltx_gain_set_0; /* 0x400 - 0x404 */ 810*b7d5e03cSMatthew Dillon volatile u_int32_t BB_caltx_gain_set_2; /* 0x404 - 0x408 */ 811*b7d5e03cSMatthew Dillon volatile u_int32_t BB_caltx_gain_set_4; /* 0x408 - 0x40c */ 812*b7d5e03cSMatthew Dillon volatile u_int32_t BB_caltx_gain_set_6; /* 0x40c - 0x410 */ 813*b7d5e03cSMatthew Dillon volatile u_int32_t BB_caltx_gain_set_8; /* 0x410 - 0x414 */ 814*b7d5e03cSMatthew Dillon volatile u_int32_t BB_caltx_gain_set_10; /* 0x414 - 0x418 */ 815*b7d5e03cSMatthew Dillon volatile u_int32_t BB_caltx_gain_set_12; /* 0x418 - 0x41c */ 816*b7d5e03cSMatthew Dillon volatile u_int32_t BB_caltx_gain_set_14; /* 0x41c - 0x420 */ 817*b7d5e03cSMatthew Dillon volatile u_int32_t BB_caltx_gain_set_16; /* 0x420 - 0x424 */ 818*b7d5e03cSMatthew Dillon volatile u_int32_t BB_caltx_gain_set_18; /* 0x424 - 0x428 */ 819*b7d5e03cSMatthew Dillon volatile u_int32_t BB_caltx_gain_set_20; /* 0x428 - 0x42c */ 820*b7d5e03cSMatthew Dillon volatile u_int32_t BB_caltx_gain_set_22; /* 0x42c - 0x430 */ 821*b7d5e03cSMatthew Dillon volatile u_int32_t BB_caltx_gain_set_24; /* 0x430 - 0x434 */ 822*b7d5e03cSMatthew Dillon volatile u_int32_t BB_caltx_gain_set_26; /* 0x434 - 0x438 */ 823*b7d5e03cSMatthew Dillon volatile u_int32_t BB_caltx_gain_set_28; /* 0x438 - 0x43c */ 824*b7d5e03cSMatthew Dillon volatile u_int32_t BB_caltx_gain_set_30; /* 0x43c - 0x440 */ 825*b7d5e03cSMatthew Dillon volatile char pad__12[0x4]; /* 0x440 - 0x444 */ 826*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiqcal_control_0; /* 0x444 - 0x448 */ 827*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiqcal_control_1; /* 0x448 - 0x44c */ 828*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiqcal_control_2; /* 0x44c - 0x450 */ 829*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_01_b0; /* 0x450 - 0x454 */ 830*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_23_b0; /* 0x454 - 0x458 */ 831*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_45_b0; /* 0x458 - 0x45c */ 832*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_67_b0; /* 0x45c - 0x460 */ 833*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_89_b0; /* 0x460 - 0x464 */ 834*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_ab_b0; /* 0x464 - 0x468 */ 835*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_cd_b0; /* 0x468 - 0x46c */ 836*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_ef_b0; /* 0x46c - 0x470 */ 837*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cal_rxbb_gain_tbl_0; /* 0x470 - 0x474 */ 838*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cal_rxbb_gain_tbl_4; /* 0x474 - 0x478 */ 839*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cal_rxbb_gain_tbl_8; /* 0x478 - 0x47c */ 840*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cal_rxbb_gain_tbl_12; /* 0x47c - 0x480 */ 841*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cal_rxbb_gain_tbl_16; /* 0x480 - 0x484 */ 842*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cal_rxbb_gain_tbl_20; /* 0x484 - 0x488 */ 843*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cal_rxbb_gain_tbl_24; /* 0x488 - 0x48c */ 844*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiqcal_status_b0; /* 0x48c - 0x490 */ 845*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_trainer_cntl1; /* 0x490 - 0x494 */ 846*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_trainer_cntl2; /* 0x494 - 0x498 */ 847*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_trainer_cntl3; /* 0x498 - 0x49c */ 848*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_trainer_cntl4; /* 0x49c - 0x4a0 */ 849*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_trainer_stat1; /* 0x4a0 - 0x4a4 */ 850*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_trainer_stat2; /* 0x4a4 - 0x4a8 */ 851*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_trainer_stat3; /* 0x4a8 - 0x4ac */ 852*b7d5e03cSMatthew Dillon volatile char pad__13[0x114]; /* 0x4ac - 0x5c0 */ 853*b7d5e03cSMatthew Dillon volatile u_int32_t BB_watchdog_status; /* 0x5c0 - 0x5c4 */ 854*b7d5e03cSMatthew Dillon volatile u_int32_t BB_watchdog_ctrl_1; /* 0x5c4 - 0x5c8 */ 855*b7d5e03cSMatthew Dillon volatile u_int32_t BB_watchdog_ctrl_2; /* 0x5c8 - 0x5cc */ 856*b7d5e03cSMatthew Dillon volatile u_int32_t BB_bluetooth_cntl; /* 0x5cc - 0x5d0 */ 857*b7d5e03cSMatthew Dillon volatile u_int32_t BB_phyonly_warm_reset; /* 0x5d0 - 0x5d4 */ 858*b7d5e03cSMatthew Dillon volatile u_int32_t BB_phyonly_control; /* 0x5d4 - 0x5d8 */ 859*b7d5e03cSMatthew Dillon volatile char pad__14[0x4]; /* 0x5d8 - 0x5dc */ 860*b7d5e03cSMatthew Dillon volatile u_int32_t BB_eco_ctrl; /* 0x5dc - 0x5e0 */ 861*b7d5e03cSMatthew Dillon volatile char pad__15[0x10]; /* 0x5e0 - 0x5f0 */ 862*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tables_intf_addr_b0; /* 0x5f0 - 0x5f4 */ 863*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tables_intf_data_b0; /* 0x5f4 - 0x5f8 */ 864*b7d5e03cSMatthew Dillon }; 865*b7d5e03cSMatthew Dillon 866*b7d5e03cSMatthew Dillon struct chn1_reg_map { 867*b7d5e03cSMatthew Dillon volatile char pad__0[0x30]; /* 0x0 - 0x30 */ 868*b7d5e03cSMatthew Dillon volatile u_int32_t BB_ext_chan_pwr_thr_2_b1; /* 0x30 - 0x34 */ 869*b7d5e03cSMatthew Dillon volatile char pad__1[0x74]; /* 0x34 - 0xa8 */ 870*b7d5e03cSMatthew Dillon volatile u_int32_t BB_spur_report_b1; /* 0xa8 - 0xac */ 871*b7d5e03cSMatthew Dillon volatile char pad__2[0x14]; /* 0xac - 0xc0 */ 872*b7d5e03cSMatthew Dillon volatile u_int32_t BB_iq_adc_meas_0_b1; /* 0xc0 - 0xc4 */ 873*b7d5e03cSMatthew Dillon volatile u_int32_t BB_iq_adc_meas_1_b1; /* 0xc4 - 0xc8 */ 874*b7d5e03cSMatthew Dillon volatile u_int32_t BB_iq_adc_meas_2_b1; /* 0xc8 - 0xcc */ 875*b7d5e03cSMatthew Dillon volatile u_int32_t BB_iq_adc_meas_3_b1; /* 0xcc - 0xd0 */ 876*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_phase_ramp_b1; /* 0xd0 - 0xd4 */ 877*b7d5e03cSMatthew Dillon volatile u_int32_t BB_adc_gain_dc_corr_b1; /* 0xd4 - 0xd8 */ 878*b7d5e03cSMatthew Dillon volatile char pad__3[0x4]; /* 0xd8 - 0xdc */ 879*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rx_iq_corr_b1; /* 0xdc - 0xe0 */ 880*b7d5e03cSMatthew Dillon volatile char pad__4[0x10]; /* 0xe0 - 0xf0 */ 881*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_ctrl0_b1; /* 0xf0 - 0xf4 */ 882*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_ctrl1_b1; /* 0xf4 - 0xf8 */ 883*b7d5e03cSMatthew Dillon volatile u_int32_t BB_pa_gain123_b1; /* 0xf8 - 0xfc */ 884*b7d5e03cSMatthew Dillon volatile u_int32_t BB_pa_gain45_b1; /* 0xfc - 0x100 */ 885*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_0_b1; 886*b7d5e03cSMatthew Dillon /* 0x100 - 0x104 */ 887*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_1_b1; 888*b7d5e03cSMatthew Dillon /* 0x104 - 0x108 */ 889*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_2_b1; 890*b7d5e03cSMatthew Dillon /* 0x108 - 0x10c */ 891*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_3_b1; 892*b7d5e03cSMatthew Dillon /* 0x10c - 0x110 */ 893*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_4_b1; 894*b7d5e03cSMatthew Dillon /* 0x110 - 0x114 */ 895*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_5_b1; 896*b7d5e03cSMatthew Dillon /* 0x114 - 0x118 */ 897*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_6_b1; 898*b7d5e03cSMatthew Dillon /* 0x118 - 0x11c */ 899*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_7_b1; 900*b7d5e03cSMatthew Dillon /* 0x11c - 0x120 */ 901*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_mem_tab_b1[120]; /* 0x120 - 0x300 */ 902*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chan_info_chan_tab_b1[60]; 903*b7d5e03cSMatthew Dillon /* 0x300 - 0x3f0 */ 904*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chn1_tables_intf_addr; /* 0x3f0 - 0x3f4 */ 905*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chn1_tables_intf_data; /* 0x3f4 - 0x3f8 */ 906*b7d5e03cSMatthew Dillon }; 907*b7d5e03cSMatthew Dillon 908*b7d5e03cSMatthew Dillon struct agc1_reg_map { 909*b7d5e03cSMatthew Dillon volatile char pad__0[0x4]; /* 0x0 - 0x4 */ 910*b7d5e03cSMatthew Dillon volatile u_int32_t BB_gain_force_max_gains_b1; /* 0x4 - 0x8 */ 911*b7d5e03cSMatthew Dillon volatile char pad__1[0x10]; /* 0x8 - 0x18 */ 912*b7d5e03cSMatthew Dillon volatile u_int32_t BB_ext_atten_switch_ctl_b1; /* 0x18 - 0x1c */ 913*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cca_b1; /* 0x1c - 0x20 */ 914*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cca_ctrl_2_b1; /* 0x20 - 0x24 */ 915*b7d5e03cSMatthew Dillon volatile char pad__2[0x15c]; /* 0x24 - 0x180 */ 916*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rssi_b1; /* 0x180 - 0x184 */ 917*b7d5e03cSMatthew Dillon volatile u_int32_t BB_spur_est_cck_report_b1; /* 0x184 - 0x188 */ 918*b7d5e03cSMatthew Dillon volatile u_int32_t BB_agc_dig_dc_status_i_b1; /* 0x188 - 0x18c */ 919*b7d5e03cSMatthew Dillon volatile u_int32_t BB_agc_dig_dc_status_q_b1; /* 0x18c - 0x190 */ 920*b7d5e03cSMatthew Dillon volatile u_int32_t BB_dc_cal_status_b1; /* 0x190 - 0x194 */ 921*b7d5e03cSMatthew Dillon volatile char pad__3[0x6c]; /* 0x194 - 0x200 */ 922*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rx_ocgain2[128]; /* 0x200 - 0x400 */ 923*b7d5e03cSMatthew Dillon }; 924*b7d5e03cSMatthew Dillon 925*b7d5e03cSMatthew Dillon struct sm1_reg_map { 926*b7d5e03cSMatthew Dillon volatile char pad__0[0x84]; /* 0x0 - 0x84 */ 927*b7d5e03cSMatthew Dillon volatile u_int32_t BB_switch_table_chn_b1; /* 0x84 - 0x88 */ 928*b7d5e03cSMatthew Dillon volatile char pad__1[0x48]; /* 0x88 - 0xd0 */ 929*b7d5e03cSMatthew Dillon volatile u_int32_t BB_fcal_2_b1; /* 0xd0 - 0xd4 */ 930*b7d5e03cSMatthew Dillon volatile u_int32_t BB_dft_tone_ctrl_b1; /* 0xd4 - 0xd8 */ 931*b7d5e03cSMatthew Dillon volatile char pad__2[0x4]; /* 0xd8 - 0xdc */ 932*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_0_b1; /* 0xdc - 0xe0 */ 933*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_1_b1; /* 0xe0 - 0xe4 */ 934*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_2_b1; /* 0xe4 - 0xe8 */ 935*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_3_b1; /* 0xe8 - 0xec */ 936*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_pal_0_b1; /* 0xec - 0xf0 */ 937*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_pal_1_b1; /* 0xf0 - 0xf4 */ 938*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_pal_2_b1; /* 0xf4 - 0xf8 */ 939*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_pal_3_b1; /* 0xf8 - 0xfc */ 940*b7d5e03cSMatthew Dillon volatile char pad__3[0x4]; /* 0xfc - 0x100 */ 941*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_tab_b1[16]; /* 0x100 - 0x140 */ 942*b7d5e03cSMatthew Dillon volatile char pad__4[0x40]; /* 0x140 - 0x180 */ 943*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chan_info_gain_b1; /* 0x180 - 0x184 */ 944*b7d5e03cSMatthew Dillon volatile char pad__5[0x80]; /* 0x184 - 0x204 */ 945*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_4_b1; /* 0x204 - 0x208 */ 946*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_5_b1; /* 0x208 - 0x20c */ 947*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_6_b1; /* 0x20c - 0x210 */ 948*b7d5e03cSMatthew Dillon volatile char pad__6[0x10]; /* 0x210 - 0x220 */ 949*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_11_b1; /* 0x220 - 0x224 */ 950*b7d5e03cSMatthew Dillon volatile char pad__7[0x1c]; /* 0x224 - 0x240 */ 951*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_19_b1; /* 0x240 - 0x244 */ 952*b7d5e03cSMatthew Dillon volatile char pad__8[0x3c]; /* 0x244 - 0x280 */ 953*b7d5e03cSMatthew Dillon volatile u_int32_t BB_pdadc_tab_b1[32]; /* 0x280 - 0x300 */ 954*b7d5e03cSMatthew Dillon volatile char pad__9[0x84]; /* 0x300 - 0x384 */ 955*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rtt_table_sw_intf_b1; /* 0x384 - 0x388 */ 956*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rtt_table_sw_intf_1_b1; /* 0x388 - 0x38c */ 957*b7d5e03cSMatthew Dillon volatile char pad__10[0xc4]; /* 0x38c - 0x450 */ 958*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_01_b1; /* 0x450 - 0x454 */ 959*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_23_b1; /* 0x454 - 0x458 */ 960*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_45_b1; /* 0x458 - 0x45c */ 961*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_67_b1; /* 0x45c - 0x460 */ 962*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_89_b1; /* 0x460 - 0x464 */ 963*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_ab_b1; /* 0x464 - 0x468 */ 964*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_cd_b1; /* 0x468 - 0x46c */ 965*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_ef_b1; /* 0x46c - 0x470 */ 966*b7d5e03cSMatthew Dillon volatile char pad__11[0x1c]; /* 0x470 - 0x48c */ 967*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiqcal_status_b1; /* 0x48c - 0x490 */ 968*b7d5e03cSMatthew Dillon volatile char pad__12[0x160]; /* 0x490 - 0x5f0 */ 969*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tables_intf_addr_b1; /* 0x5f0 - 0x5f4 */ 970*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tables_intf_data_b1; /* 0x5f4 - 0x5f8 */ 971*b7d5e03cSMatthew Dillon }; 972*b7d5e03cSMatthew Dillon 973*b7d5e03cSMatthew Dillon struct chn2_reg_map { 974*b7d5e03cSMatthew Dillon volatile char pad__0[0x30]; /* 0x0 - 0x30 */ 975*b7d5e03cSMatthew Dillon volatile u_int32_t BB_ext_chan_pwr_thr_2_b2; /* 0x30 - 0x34 */ 976*b7d5e03cSMatthew Dillon volatile char pad__1[0x74]; /* 0x34 - 0xa8 */ 977*b7d5e03cSMatthew Dillon volatile u_int32_t BB_spur_report_b2; /* 0xa8 - 0xac */ 978*b7d5e03cSMatthew Dillon volatile char pad__2[0x14]; /* 0xac - 0xc0 */ 979*b7d5e03cSMatthew Dillon volatile u_int32_t BB_iq_adc_meas_0_b2; /* 0xc0 - 0xc4 */ 980*b7d5e03cSMatthew Dillon volatile u_int32_t BB_iq_adc_meas_1_b2; /* 0xc4 - 0xc8 */ 981*b7d5e03cSMatthew Dillon volatile u_int32_t BB_iq_adc_meas_2_b2; /* 0xc8 - 0xcc */ 982*b7d5e03cSMatthew Dillon volatile u_int32_t BB_iq_adc_meas_3_b2; /* 0xcc - 0xd0 */ 983*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tx_phase_ramp_b2; /* 0xd0 - 0xd4 */ 984*b7d5e03cSMatthew Dillon volatile u_int32_t BB_adc_gain_dc_corr_b2; /* 0xd4 - 0xd8 */ 985*b7d5e03cSMatthew Dillon volatile char pad__3[0x4]; /* 0xd8 - 0xdc */ 986*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rx_iq_corr_b2; /* 0xdc - 0xe0 */ 987*b7d5e03cSMatthew Dillon volatile char pad__4[0x10]; /* 0xe0 - 0xf0 */ 988*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_ctrl0_b2; /* 0xf0 - 0xf4 */ 989*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_ctrl1_b2; /* 0xf4 - 0xf8 */ 990*b7d5e03cSMatthew Dillon volatile u_int32_t BB_pa_gain123_b2; /* 0xf8 - 0xfc */ 991*b7d5e03cSMatthew Dillon volatile u_int32_t BB_pa_gain45_b2; /* 0xfc - 0x100 */ 992*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_0_b2; 993*b7d5e03cSMatthew Dillon /* 0x100 - 0x104 */ 994*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_1_b2; 995*b7d5e03cSMatthew Dillon /* 0x104 - 0x108 */ 996*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_2_b2; 997*b7d5e03cSMatthew Dillon /* 0x108 - 0x10c */ 998*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_3_b2; 999*b7d5e03cSMatthew Dillon /* 0x10c - 0x110 */ 1000*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_4_b2; 1001*b7d5e03cSMatthew Dillon /* 0x110 - 0x114 */ 1002*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_5_b2; 1003*b7d5e03cSMatthew Dillon /* 0x114 - 0x118 */ 1004*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_6_b2; 1005*b7d5e03cSMatthew Dillon /* 0x118 - 0x11c */ 1006*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_pre_post_scale_7_b2; 1007*b7d5e03cSMatthew Dillon /* 0x11c - 0x120 */ 1008*b7d5e03cSMatthew Dillon volatile u_int32_t BB_paprd_mem_tab_b2[120]; /* 0x120 - 0x300 */ 1009*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chan_info_chan_tab_b2[60]; 1010*b7d5e03cSMatthew Dillon /* 0x300 - 0x3f0 */ 1011*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chn2_tables_intf_addr; /* 0x3f0 - 0x3f4 */ 1012*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chn2_tables_intf_data; /* 0x3f4 - 0x3f8 */ 1013*b7d5e03cSMatthew Dillon }; 1014*b7d5e03cSMatthew Dillon 1015*b7d5e03cSMatthew Dillon struct agc2_reg_map { 1016*b7d5e03cSMatthew Dillon volatile char pad__0[0x4]; /* 0x0 - 0x4 */ 1017*b7d5e03cSMatthew Dillon volatile u_int32_t BB_gain_force_max_gains_b2; /* 0x4 - 0x8 */ 1018*b7d5e03cSMatthew Dillon volatile char pad__1[0x10]; /* 0x8 - 0x18 */ 1019*b7d5e03cSMatthew Dillon volatile u_int32_t BB_ext_atten_switch_ctl_b2; /* 0x18 - 0x1c */ 1020*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cca_b2; /* 0x1c - 0x20 */ 1021*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cca_ctrl_2_b2; /* 0x20 - 0x24 */ 1022*b7d5e03cSMatthew Dillon volatile char pad__2[0x15c]; /* 0x24 - 0x180 */ 1023*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rssi_b2; /* 0x180 - 0x184 */ 1024*b7d5e03cSMatthew Dillon volatile char pad__3[0x4]; /* 0x184 - 0x188 */ 1025*b7d5e03cSMatthew Dillon volatile u_int32_t BB_agc_dig_dc_status_i_b2; /* 0x188 - 0x18c */ 1026*b7d5e03cSMatthew Dillon volatile u_int32_t BB_agc_dig_dc_status_q_b2; /* 0x18c - 0x190 */ 1027*b7d5e03cSMatthew Dillon volatile u_int32_t BB_dc_cal_status_b2; /* 0x190 - 0x194 */ 1028*b7d5e03cSMatthew Dillon }; 1029*b7d5e03cSMatthew Dillon 1030*b7d5e03cSMatthew Dillon struct sm2_reg_map { 1031*b7d5e03cSMatthew Dillon volatile char pad__0[0x84]; /* 0x0 - 0x84 */ 1032*b7d5e03cSMatthew Dillon volatile u_int32_t BB_switch_table_chn_b2; /* 0x84 - 0x88 */ 1033*b7d5e03cSMatthew Dillon volatile char pad__1[0x48]; /* 0x88 - 0xd0 */ 1034*b7d5e03cSMatthew Dillon volatile u_int32_t BB_fcal_2_b2; /* 0xd0 - 0xd4 */ 1035*b7d5e03cSMatthew Dillon volatile u_int32_t BB_dft_tone_ctrl_b2; /* 0xd4 - 0xd8 */ 1036*b7d5e03cSMatthew Dillon volatile char pad__2[0x4]; /* 0xd8 - 0xdc */ 1037*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_0_b2; /* 0xdc - 0xe0 */ 1038*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_1_b2; /* 0xe0 - 0xe4 */ 1039*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_2_b2; /* 0xe4 - 0xe8 */ 1040*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_3_b2; /* 0xe8 - 0xec */ 1041*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_pal_0_b2; /* 0xec - 0xf0 */ 1042*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_pal_1_b2; /* 0xf0 - 0xf4 */ 1043*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_pal_2_b2; /* 0xf4 - 0xf8 */ 1044*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_map_pal_3_b2; /* 0xf8 - 0xfc */ 1045*b7d5e03cSMatthew Dillon volatile char pad__3[0x4]; /* 0xfc - 0x100 */ 1046*b7d5e03cSMatthew Dillon volatile u_int32_t BB_cl_tab_b2[16]; /* 0x100 - 0x140 */ 1047*b7d5e03cSMatthew Dillon volatile char pad__4[0x40]; /* 0x140 - 0x180 */ 1048*b7d5e03cSMatthew Dillon volatile u_int32_t BB_chan_info_gain_b2; /* 0x180 - 0x184 */ 1049*b7d5e03cSMatthew Dillon volatile char pad__5[0x80]; /* 0x184 - 0x204 */ 1050*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_4_b2; /* 0x204 - 0x208 */ 1051*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_5_b2; /* 0x208 - 0x20c */ 1052*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_6_b2; /* 0x20c - 0x210 */ 1053*b7d5e03cSMatthew Dillon volatile char pad__6[0x10]; /* 0x210 - 0x220 */ 1054*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_11_b2; /* 0x220 - 0x224 */ 1055*b7d5e03cSMatthew Dillon volatile char pad__7[0x1c]; /* 0x224 - 0x240 */ 1056*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tpc_19_b2; /* 0x240 - 0x244 */ 1057*b7d5e03cSMatthew Dillon volatile char pad__8[0x3c]; /* 0x244 - 0x280 */ 1058*b7d5e03cSMatthew Dillon volatile u_int32_t BB_pdadc_tab_b2[32]; /* 0x280 - 0x300 */ 1059*b7d5e03cSMatthew Dillon volatile char pad__9[0x84]; /* 0x300 - 0x384 */ 1060*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rtt_table_sw_intf_b2; /* 0x384 - 0x388 */ 1061*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rtt_table_sw_intf_1_b2; /* 0x388 - 0x38c */ 1062*b7d5e03cSMatthew Dillon volatile char pad__10[0xc4]; /* 0x38c - 0x450 */ 1063*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_01_b2; /* 0x450 - 0x454 */ 1064*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_23_b2; /* 0x454 - 0x458 */ 1065*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_45_b2; /* 0x458 - 0x45c */ 1066*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_67_b2; /* 0x45c - 0x460 */ 1067*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_89_b2; /* 0x460 - 0x464 */ 1068*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_ab_b2; /* 0x464 - 0x468 */ 1069*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_cd_b2; /* 0x468 - 0x46c */ 1070*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiq_corr_coeff_ef_b2; /* 0x46c - 0x470 */ 1071*b7d5e03cSMatthew Dillon volatile char pad__11[0x1c]; /* 0x470 - 0x48c */ 1072*b7d5e03cSMatthew Dillon volatile u_int32_t BB_txiqcal_status_b2; /* 0x48c - 0x490 */ 1073*b7d5e03cSMatthew Dillon volatile char pad__12[0x160]; /* 0x490 - 0x5f0 */ 1074*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tables_intf_addr_b2; /* 0x5f0 - 0x5f4 */ 1075*b7d5e03cSMatthew Dillon volatile u_int32_t BB_tables_intf_data_b2; /* 0x5f4 - 0x5f8 */ 1076*b7d5e03cSMatthew Dillon }; 1077*b7d5e03cSMatthew Dillon 1078*b7d5e03cSMatthew Dillon struct chn3_reg_map { 1079*b7d5e03cSMatthew Dillon volatile u_int32_t BB_dummy1[256]; /* 0x0 - 0x400 */ 1080*b7d5e03cSMatthew Dillon }; 1081*b7d5e03cSMatthew Dillon 1082*b7d5e03cSMatthew Dillon struct agc3_reg_map { 1083*b7d5e03cSMatthew Dillon volatile u_int32_t BB_dummy; /* 0x0 - 0x4 */ 1084*b7d5e03cSMatthew Dillon volatile char pad__0[0x17c]; /* 0x4 - 0x180 */ 1085*b7d5e03cSMatthew Dillon volatile u_int32_t BB_rssi_b3; /* 0x180 - 0x184 */ 1086*b7d5e03cSMatthew Dillon }; 1087*b7d5e03cSMatthew Dillon 1088*b7d5e03cSMatthew Dillon struct sm3_reg_map { 1089*b7d5e03cSMatthew Dillon volatile u_int32_t BB_dummy2[384]; /* 0x0 - 0x600 */ 1090*b7d5e03cSMatthew Dillon }; 1091*b7d5e03cSMatthew Dillon 1092*b7d5e03cSMatthew Dillon struct bb_reg_map { 1093*b7d5e03cSMatthew Dillon struct chn_reg_map bb_chn_reg_map; /* 0x0 - 0x3f8 */ 1094*b7d5e03cSMatthew Dillon volatile char pad__0[0x8]; /* 0x3f8 - 0x400 */ 1095*b7d5e03cSMatthew Dillon struct mrc_reg_map bb_mrc_reg_map; /* 0x400 - 0x424 */ 1096*b7d5e03cSMatthew Dillon volatile char pad__1[0xdc]; /* 0x424 - 0x500 */ 1097*b7d5e03cSMatthew Dillon struct bbb_reg_map bb_bbb_reg_map; /* 0x500 - 0x51c */ 1098*b7d5e03cSMatthew Dillon volatile char pad__2[0xe4]; /* 0x51c - 0x600 */ 1099*b7d5e03cSMatthew Dillon struct agc_reg_map bb_agc_reg_map; /* 0x600 - 0xa00 */ 1100*b7d5e03cSMatthew Dillon struct sm_reg_map bb_sm_reg_map; /* 0xa00 - 0xff8 */ 1101*b7d5e03cSMatthew Dillon volatile char pad__3[0x8]; /* 0xff8 - 0x1000 */ 1102*b7d5e03cSMatthew Dillon struct chn1_reg_map bb_chn1_reg_map; /* 0x1000 - 0x13c8 */ 1103*b7d5e03cSMatthew Dillon volatile char pad__4[0x238]; /* 0x13c8 - 0x1600 */ 1104*b7d5e03cSMatthew Dillon struct agc1_reg_map bb_agc1_reg_map; /* 0x1600 - 0x19fc */ 1105*b7d5e03cSMatthew Dillon volatile char pad__5[0x4]; /* 0x19fc - 0x1a00 */ 1106*b7d5e03cSMatthew Dillon struct sm1_reg_map bb_sm1_reg_map; /* 0x1a00 - 0x1f74 */ 1107*b7d5e03cSMatthew Dillon volatile char pad__6[0x8c]; /* 0x1f74 - 0x2000 */ 1108*b7d5e03cSMatthew Dillon struct chn2_reg_map bb_chn2_reg_map; /* 0x2000 - 0x23c8 */ 1109*b7d5e03cSMatthew Dillon volatile char pad__7[0x238]; /* 0x23c8 - 0x2600 */ 1110*b7d5e03cSMatthew Dillon struct agc2_reg_map bb_agc2_reg_map; /* 0x2600 - 0x2790 */ 1111*b7d5e03cSMatthew Dillon volatile char pad__8[0x270]; /* 0x2790 - 0x2a00 */ 1112*b7d5e03cSMatthew Dillon struct sm2_reg_map bb_sm2_reg_map; /* 0x2a00 - 0x2f74 */ 1113*b7d5e03cSMatthew Dillon volatile char pad__9[0x8c]; /* 0x2f74 - 0x3000 */ 1114*b7d5e03cSMatthew Dillon struct chn3_reg_map bb_chn3_reg_map; /* 0x3000 - 0x3400 */ 1115*b7d5e03cSMatthew Dillon volatile char pad__10[0x200]; /* 0x3400 - 0x3600 */ 1116*b7d5e03cSMatthew Dillon struct agc3_reg_map bb_agc3_reg_map; /* 0x3600 - 0x3784 */ 1117*b7d5e03cSMatthew Dillon volatile char pad__11[0x27c]; /* 0x3784 - 0x3a00 */ 1118*b7d5e03cSMatthew Dillon struct sm3_reg_map bb_sm3_reg_map; /* 0x3a00 - 0x4000 */ 1119*b7d5e03cSMatthew Dillon }; 1120*b7d5e03cSMatthew Dillon 1121*b7d5e03cSMatthew Dillon struct mac_pcu_buf_reg { 1122*b7d5e03cSMatthew Dillon volatile u_int32_t MAC_PCU_BUF[2048]; /* 0x0 - 0x2000 */ 1123*b7d5e03cSMatthew Dillon }; 1124*b7d5e03cSMatthew Dillon 1125*b7d5e03cSMatthew Dillon struct svd_reg { 1126*b7d5e03cSMatthew Dillon volatile u_int32_t TXBF_DBG; /* 0x0 - 0x4 */ 1127*b7d5e03cSMatthew Dillon volatile u_int32_t TXBF; /* 0x4 - 0x8 */ 1128*b7d5e03cSMatthew Dillon volatile u_int32_t TXBF_TIMER; /* 0x8 - 0xc */ 1129*b7d5e03cSMatthew Dillon volatile u_int32_t TXBF_SW; /* 0xc - 0x10 */ 1130*b7d5e03cSMatthew Dillon volatile u_int32_t TXBF_SM; /* 0x10 - 0x14 */ 1131*b7d5e03cSMatthew Dillon volatile u_int32_t TXBF1_CNTL; /* 0x14 - 0x18 */ 1132*b7d5e03cSMatthew Dillon volatile u_int32_t TXBF2_CNTL; /* 0x18 - 0x1c */ 1133*b7d5e03cSMatthew Dillon volatile u_int32_t TXBF3_CNTL; /* 0x1c - 0x20 */ 1134*b7d5e03cSMatthew Dillon volatile u_int32_t TXBF4_CNTL; /* 0x20 - 0x24 */ 1135*b7d5e03cSMatthew Dillon volatile u_int32_t TXBF5_CNTL; /* 0x24 - 0x28 */ 1136*b7d5e03cSMatthew Dillon volatile u_int32_t TXBF6_CNTL; /* 0x28 - 0x2c */ 1137*b7d5e03cSMatthew Dillon volatile u_int32_t TXBF7_CNTL; /* 0x2c - 0x30 */ 1138*b7d5e03cSMatthew Dillon volatile u_int32_t TXBF8_CNTL; /* 0x30 - 0x34 */ 1139*b7d5e03cSMatthew Dillon volatile char pad__0[0xfcc]; /* 0x34 - 0x1000 */ 1140*b7d5e03cSMatthew Dillon volatile u_int32_t RC0[118]; /* 0x1000 - 0x11d8 */ 1141*b7d5e03cSMatthew Dillon volatile char pad__1[0x28]; /* 0x11d8 - 0x1200 */ 1142*b7d5e03cSMatthew Dillon volatile u_int32_t RC1[118]; /* 0x1200 - 0x13d8 */ 1143*b7d5e03cSMatthew Dillon volatile char pad__2[0x28]; /* 0x13d8 - 0x1400 */ 1144*b7d5e03cSMatthew Dillon volatile u_int32_t SVD_MEM0[114]; /* 0x1400 - 0x15c8 */ 1145*b7d5e03cSMatthew Dillon volatile char pad__3[0x38]; /* 0x15c8 - 0x1600 */ 1146*b7d5e03cSMatthew Dillon volatile u_int32_t SVD_MEM1[114]; /* 0x1600 - 0x17c8 */ 1147*b7d5e03cSMatthew Dillon volatile char pad__4[0x38]; /* 0x17c8 - 0x1800 */ 1148*b7d5e03cSMatthew Dillon volatile u_int32_t SVD_MEM2[114]; /* 0x1800 - 0x19c8 */ 1149*b7d5e03cSMatthew Dillon volatile char pad__5[0x38]; /* 0x19c8 - 0x1a00 */ 1150*b7d5e03cSMatthew Dillon volatile u_int32_t SVD_MEM3[114]; /* 0x1a00 - 0x1bc8 */ 1151*b7d5e03cSMatthew Dillon volatile char pad__6[0x38]; /* 0x1bc8 - 0x1c00 */ 1152*b7d5e03cSMatthew Dillon volatile u_int32_t SVD_MEM4[114]; /* 0x1c00 - 0x1dc8 */ 1153*b7d5e03cSMatthew Dillon volatile char pad__7[0x638]; /* 0x1dc8 - 0x2400 */ 1154*b7d5e03cSMatthew Dillon volatile u_int32_t CVCACHE[512]; /* 0x2400 - 0x2c00 */ 1155*b7d5e03cSMatthew Dillon }; 1156*b7d5e03cSMatthew Dillon 1157*b7d5e03cSMatthew Dillon struct radio65_reg { 1158*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_RXRF_BIAS1; /* 0x0 - 0x4 */ 1159*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_RXRF_BIAS2; /* 0x4 - 0x8 */ 1160*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_RXRF_GAINSTAGES; /* 0x8 - 0xc */ 1161*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_RXRF_AGC; /* 0xc - 0x10 */ 1162*b7d5e03cSMatthew Dillon volatile char pad__0[0x30]; /* 0x10 - 0x40 */ 1163*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_TXRF1; /* 0x40 - 0x44 */ 1164*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_TXRF2; /* 0x44 - 0x48 */ 1165*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_TXRF3; /* 0x48 - 0x4c */ 1166*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_TXRF4; /* 0x4c - 0x50 */ 1167*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_TXRF5; /* 0x50 - 0x54 */ 1168*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_TXRF6; /* 0x54 - 0x58 */ 1169*b7d5e03cSMatthew Dillon volatile char pad__1[0x28]; /* 0x58 - 0x80 */ 1170*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_SYNTH1; /* 0x80 - 0x84 */ 1171*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_SYNTH2; /* 0x84 - 0x88 */ 1172*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_SYNTH3; /* 0x88 - 0x8c */ 1173*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_SYNTH4; /* 0x8c - 0x90 */ 1174*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_SYNTH5; /* 0x90 - 0x94 */ 1175*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_SYNTH6; /* 0x94 - 0x98 */ 1176*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_SYNTH7; /* 0x98 - 0x9c */ 1177*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_SYNTH8; /* 0x9c - 0xa0 */ 1178*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_SYNTH9; /* 0xa0 - 0xa4 */ 1179*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_SYNTH10; /* 0xa4 - 0xa8 */ 1180*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_SYNTH11; /* 0xa8 - 0xac */ 1181*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_SYNTH12; /* 0xac - 0xb0 */ 1182*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_SYNTH13; /* 0xb0 - 0xb4 */ 1183*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_SYNTH14; /* 0xb4 - 0xb8 */ 1184*b7d5e03cSMatthew Dillon volatile char pad__2[0x8]; /* 0xb8 - 0xc0 */ 1185*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_BIAS1; /* 0xc0 - 0xc4 */ 1186*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_BIAS2; /* 0xc4 - 0xc8 */ 1187*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_BIAS3; /* 0xc8 - 0xcc */ 1188*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_BIAS4; /* 0xcc - 0xd0 */ 1189*b7d5e03cSMatthew Dillon volatile char pad__3[0x30]; /* 0xd0 - 0x100 */ 1190*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_RXTX1; /* 0x100 - 0x104 */ 1191*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_RXTX2; /* 0x104 - 0x108 */ 1192*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_RXTX3; /* 0x108 - 0x10c */ 1193*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_RXTX4; /* 0x10c - 0x110 */ 1194*b7d5e03cSMatthew Dillon volatile char pad__4[0x30]; /* 0x110 - 0x140 */ 1195*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_BB1; /* 0x140 - 0x144 */ 1196*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_BB2; /* 0x144 - 0x148 */ 1197*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_BB3; /* 0x148 - 0x14c */ 1198*b7d5e03cSMatthew Dillon volatile char pad__5[0x34]; /* 0x14c - 0x180 */ 1199*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_BB_PLL; /* 0x180 - 0x184 */ 1200*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_BB_PLL2; /* 0x184 - 0x188 */ 1201*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_BB_PLL3; /* 0x188 - 0x18c */ 1202*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_BB_PLL4; /* 0x18c - 0x190 */ 1203*b7d5e03cSMatthew Dillon volatile char pad__6[0x30]; /* 0x190 - 0x1c0 */ 1204*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_CPU_PLL; /* 0x1c0 - 0x1c4 */ 1205*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_CPU_PLL2; /* 0x1c4 - 0x1c8 */ 1206*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_CPU_PLL3; /* 0x1c8 - 0x1cc */ 1207*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_CPU_PLL4; /* 0x1cc - 0x1d0 */ 1208*b7d5e03cSMatthew Dillon volatile char pad__7[0x30]; /* 0x1d0 - 0x200 */ 1209*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_AUDIO_PLL; /* 0x200 - 0x204 */ 1210*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_AUDIO_PLL2; /* 0x204 - 0x208 */ 1211*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_AUDIO_PLL3; /* 0x208 - 0x20c */ 1212*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_AUDIO_PLL4; /* 0x20c - 0x210 */ 1213*b7d5e03cSMatthew Dillon volatile char pad__8[0x30]; /* 0x210 - 0x240 */ 1214*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_DDR_PLL; /* 0x240 - 0x244 */ 1215*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_DDR_PLL2; /* 0x244 - 0x248 */ 1216*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_DDR_PLL3; /* 0x248 - 0x24c */ 1217*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_DDR_PLL4; /* 0x24c - 0x250 */ 1218*b7d5e03cSMatthew Dillon volatile char pad__9[0x30]; /* 0x250 - 0x280 */ 1219*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_TOP; /* 0x280 - 0x284 */ 1220*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_TOP2; /* 0x284 - 0x288 */ 1221*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_TOP3; /* 0x288 - 0x28c */ 1222*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_THERM; /* 0x28c - 0x290 */ 1223*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_XTAL; /* 0x290 - 0x294 */ 1224*b7d5e03cSMatthew Dillon volatile char pad__10[0xec]; /* 0x294 - 0x380 */ 1225*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_rbist_cntrl; /* 0x380 - 0x384 */ 1226*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_tx_dc_offset; /* 0x384 - 0x388 */ 1227*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_tx_tonegen0; /* 0x388 - 0x38c */ 1228*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_tx_tonegen1; /* 0x38c - 0x390 */ 1229*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_tx_lftonegen0; /* 0x390 - 0x394 */ 1230*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_tx_linear_ramp_i; /* 0x394 - 0x398 */ 1231*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_tx_linear_ramp_q; /* 0x398 - 0x39c */ 1232*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_tx_prbs_mag; /* 0x39c - 0x3a0 */ 1233*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_tx_prbs_seed_i; /* 0x3a0 - 0x3a4 */ 1234*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_tx_prbs_seed_q; /* 0x3a4 - 0x3a8 */ 1235*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_cmac_dc_cancel; /* 0x3a8 - 0x3ac */ 1236*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_cmac_dc_offset; /* 0x3ac - 0x3b0 */ 1237*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_cmac_corr; /* 0x3b0 - 0x3b4 */ 1238*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_cmac_power; /* 0x3b4 - 0x3b8 */ 1239*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_cmac_cross_corr; /* 0x3b8 - 0x3bc */ 1240*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_cmac_i2q2; /* 0x3bc - 0x3c0 */ 1241*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_cmac_power_hpf; /* 0x3c0 - 0x3c4 */ 1242*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_rxdac_set1; /* 0x3c4 - 0x3c8 */ 1243*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_rxdac_set2; /* 0x3c8 - 0x3cc */ 1244*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_rxdac_long_shift; /* 0x3cc - 0x3d0 */ 1245*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_cmac_results_i; /* 0x3d0 - 0x3d4 */ 1246*b7d5e03cSMatthew Dillon volatile u_int32_t ch0_cmac_results_q; /* 0x3d4 - 0x3d8 */ 1247*b7d5e03cSMatthew Dillon volatile char pad__11[0x28]; /* 0x3d8 - 0x400 */ 1248*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_RXRF_BIAS1; /* 0x400 - 0x404 */ 1249*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_RXRF_BIAS2; /* 0x404 - 0x408 */ 1250*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_RXRF_GAINSTAGES; /* 0x408 - 0x40c */ 1251*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_RXRF_AGC; /* 0x40c - 0x410 */ 1252*b7d5e03cSMatthew Dillon volatile char pad__12[0x30]; /* 0x410 - 0x440 */ 1253*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_TXRF1; /* 0x440 - 0x444 */ 1254*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_TXRF2; /* 0x444 - 0x448 */ 1255*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_TXRF3; /* 0x448 - 0x44c */ 1256*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_TXRF4; /* 0x44c - 0x450 */ 1257*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_TXRF5; /* 0x450 - 0x454 */ 1258*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_TXRF6; /* 0x454 - 0x458 */ 1259*b7d5e03cSMatthew Dillon volatile char pad__13[0xa8]; /* 0x458 - 0x500 */ 1260*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_RXTX1; /* 0x500 - 0x504 */ 1261*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_RXTX2; /* 0x504 - 0x508 */ 1262*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_RXTX3; /* 0x508 - 0x50c */ 1263*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_RXTX4; /* 0x50c - 0x510 */ 1264*b7d5e03cSMatthew Dillon volatile char pad__14[0x30]; /* 0x510 - 0x540 */ 1265*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_BB1; /* 0x540 - 0x544 */ 1266*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_BB2; /* 0x544 - 0x548 */ 1267*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_BB3; /* 0x548 - 0x54c */ 1268*b7d5e03cSMatthew Dillon volatile char pad__15[0x234]; /* 0x54c - 0x780 */ 1269*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_rbist_cntrl; /* 0x780 - 0x784 */ 1270*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_tx_dc_offset; /* 0x784 - 0x788 */ 1271*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_tx_tonegen0; /* 0x788 - 0x78c */ 1272*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_tx_tonegen1; /* 0x78c - 0x790 */ 1273*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_tx_lftonegen0; /* 0x790 - 0x794 */ 1274*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_tx_linear_ramp_i; /* 0x794 - 0x798 */ 1275*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_tx_linear_ramp_q; /* 0x798 - 0x79c */ 1276*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_tx_prbs_mag; /* 0x79c - 0x7a0 */ 1277*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_tx_prbs_seed_i; /* 0x7a0 - 0x7a4 */ 1278*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_tx_prbs_seed_q; /* 0x7a4 - 0x7a8 */ 1279*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_cmac_dc_cancel; /* 0x7a8 - 0x7ac */ 1280*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_cmac_dc_offset; /* 0x7ac - 0x7b0 */ 1281*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_cmac_corr; /* 0x7b0 - 0x7b4 */ 1282*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_cmac_power; /* 0x7b4 - 0x7b8 */ 1283*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_cmac_cross_corr; /* 0x7b8 - 0x7bc */ 1284*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_cmac_i2q2; /* 0x7bc - 0x7c0 */ 1285*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_cmac_power_hpf; /* 0x7c0 - 0x7c4 */ 1286*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_rxdac_set1; /* 0x7c4 - 0x7c8 */ 1287*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_rxdac_set2; /* 0x7c8 - 0x7cc */ 1288*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_rxdac_long_shift; /* 0x7cc - 0x7d0 */ 1289*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_cmac_results_i; /* 0x7d0 - 0x7d4 */ 1290*b7d5e03cSMatthew Dillon volatile u_int32_t ch1_cmac_results_q; /* 0x7d4 - 0x7d8 */ 1291*b7d5e03cSMatthew Dillon volatile char pad__16[0x28]; /* 0x7d8 - 0x800 */ 1292*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_RXRF_BIAS1; /* 0x800 - 0x804 */ 1293*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_RXRF_BIAS2; /* 0x804 - 0x808 */ 1294*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_RXRF_GAINSTAGES; /* 0x808 - 0x80c */ 1295*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_RXRF_AGC; /* 0x80c - 0x810 */ 1296*b7d5e03cSMatthew Dillon volatile char pad__17[0x30]; /* 0x810 - 0x840 */ 1297*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_TXRF1; /* 0x840 - 0x844 */ 1298*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_TXRF2; /* 0x844 - 0x848 */ 1299*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_TXRF3; /* 0x848 - 0x84c */ 1300*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_TXRF4; /* 0x84c - 0x850 */ 1301*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_TXRF5; /* 0x850 - 0x854 */ 1302*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_TXRF6; /* 0x854 - 0x858 */ 1303*b7d5e03cSMatthew Dillon volatile char pad__18[0xa8]; /* 0x858 - 0x900 */ 1304*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_RXTX1; /* 0x900 - 0x904 */ 1305*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_RXTX2; /* 0x904 - 0x908 */ 1306*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_RXTX3; /* 0x908 - 0x90c */ 1307*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_RXTX4; /* 0x90c - 0x910 */ 1308*b7d5e03cSMatthew Dillon volatile char pad__19[0x30]; /* 0x910 - 0x940 */ 1309*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_BB1; /* 0x940 - 0x944 */ 1310*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_BB2; /* 0x944 - 0x948 */ 1311*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_BB3; /* 0x948 - 0x94c */ 1312*b7d5e03cSMatthew Dillon volatile char pad__20[0x234]; /* 0x94c - 0xb80 */ 1313*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_rbist_cntrl; /* 0xb80 - 0xb84 */ 1314*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_tx_dc_offset; /* 0xb84 - 0xb88 */ 1315*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_tx_tonegen0; /* 0xb88 - 0xb8c */ 1316*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_tx_tonegen1; /* 0xb8c - 0xb90 */ 1317*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_tx_lftonegen0; /* 0xb90 - 0xb94 */ 1318*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_tx_linear_ramp_i; /* 0xb94 - 0xb98 */ 1319*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_tx_linear_ramp_q; /* 0xb98 - 0xb9c */ 1320*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_tx_prbs_mag; /* 0xb9c - 0xba0 */ 1321*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_tx_prbs_seed_i; /* 0xba0 - 0xba4 */ 1322*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_tx_prbs_seed_q; /* 0xba4 - 0xba8 */ 1323*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_cmac_dc_cancel; /* 0xba8 - 0xbac */ 1324*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_cmac_dc_offset; /* 0xbac - 0xbb0 */ 1325*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_cmac_corr; /* 0xbb0 - 0xbb4 */ 1326*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_cmac_power; /* 0xbb4 - 0xbb8 */ 1327*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_cmac_cross_corr; /* 0xbb8 - 0xbbc */ 1328*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_cmac_i2q2; /* 0xbbc - 0xbc0 */ 1329*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_cmac_power_hpf; /* 0xbc0 - 0xbc4 */ 1330*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_rxdac_set1; /* 0xbc4 - 0xbc8 */ 1331*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_rxdac_set2; /* 0xbc8 - 0xbcc */ 1332*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_rxdac_long_shift; /* 0xbcc - 0xbd0 */ 1333*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_cmac_results_i; /* 0xbd0 - 0xbd4 */ 1334*b7d5e03cSMatthew Dillon volatile u_int32_t ch2_cmac_results_q; /* 0xbd4 - 0xbd8 */ 1335*b7d5e03cSMatthew Dillon }; 1336*b7d5e03cSMatthew Dillon 1337*b7d5e03cSMatthew Dillon struct scorpion_reg_map { 1338*b7d5e03cSMatthew Dillon struct mac_dma_reg mac_dma_reg_map; /* 0x0 - 0x128 */ 1339*b7d5e03cSMatthew Dillon volatile char pad__0[0x6d8]; /* 0x128 - 0x800 */ 1340*b7d5e03cSMatthew Dillon struct mac_qcu_reg mac_qcu_reg_map; /* 0x800 - 0xa48 */ 1341*b7d5e03cSMatthew Dillon volatile char pad__1[0x5b8]; /* 0xa48 - 0x1000 */ 1342*b7d5e03cSMatthew Dillon struct mac_dcu_reg mac_dcu_reg_map; /* 0x1000 - 0x1f08 */ 1343*b7d5e03cSMatthew Dillon volatile char pad__2[0x50f8]; /* 0x1f08 - 0x7000 */ 1344*b7d5e03cSMatthew Dillon struct rtc_reg rtc_reg_map; /* 0x7000 - 0x7040 */ 1345*b7d5e03cSMatthew Dillon struct rtc_sync_reg rtc_sync_reg_map; /* 0x7040 - 0x705c */ 1346*b7d5e03cSMatthew Dillon volatile char pad__3[0xfa4]; /* 0x705c - 0x8000 */ 1347*b7d5e03cSMatthew Dillon struct mac_pcu_reg mac_pcu_reg_map; /* 0x8000 - 0x9800 */ 1348*b7d5e03cSMatthew Dillon struct bb_reg_map bb_reg_map; /* 0x9800 - 0xd800 */ 1349*b7d5e03cSMatthew Dillon volatile char pad__4[0x800]; /* 0xd800 - 0xe000 */ 1350*b7d5e03cSMatthew Dillon struct mac_pcu_buf_reg mac_pcu_buf_reg_map; /* 0xe000 - 0x10000 */ 1351*b7d5e03cSMatthew Dillon struct svd_reg svd_reg_map; /* 0x10000 - 0x12c00 */ 1352*b7d5e03cSMatthew Dillon volatile char pad__5[0x3400]; /* 0x12c00 - 0x16000 */ 1353*b7d5e03cSMatthew Dillon struct radio65_reg radio65_reg_map; /* 0x16000 - 0x16bd8 */ 1354*b7d5e03cSMatthew Dillon }; 1355*b7d5e03cSMatthew Dillon 1356*b7d5e03cSMatthew Dillon #endif /* __REG_SCORPION_REG_MAP_H__ */ 1357