1 /*- 2 * Copyright (c) 1998 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/i386/include/atomic.h,v 1.9.2.1 2000/07/07 00:38:47 obrien Exp $ 27 */ 28 #ifndef _CPU_ATOMIC_H_ 29 #define _CPU_ATOMIC_H_ 30 31 #ifndef _SYS_TYPES_H_ 32 #include <sys/types.h> 33 #endif 34 35 /* 36 * Various simple arithmetic on memory which is atomic in the presence 37 * of interrupts and multiple processors. 38 * 39 * atomic_set_char(P, V) (*(u_char*)(P) |= (V)) 40 * atomic_clear_char(P, V) (*(u_char*)(P) &= ~(V)) 41 * atomic_add_char(P, V) (*(u_char*)(P) += (V)) 42 * atomic_subtract_char(P, V) (*(u_char*)(P) -= (V)) 43 * 44 * atomic_set_short(P, V) (*(u_short*)(P) |= (V)) 45 * atomic_clear_short(P, V) (*(u_short*)(P) &= ~(V)) 46 * atomic_add_short(P, V) (*(u_short*)(P) += (V)) 47 * atomic_subtract_short(P, V) (*(u_short*)(P) -= (V)) 48 * 49 * atomic_set_int(P, V) (*(u_int*)(P) |= (V)) 50 * atomic_clear_int(P, V) (*(u_int*)(P) &= ~(V)) 51 * atomic_add_int(P, V) (*(u_int*)(P) += (V)) 52 * atomic_subtract_int(P, V) (*(u_int*)(P) -= (V)) 53 * 54 * atomic_set_long(P, V) (*(u_long*)(P) |= (V)) 55 * atomic_clear_long(P, V) (*(u_long*)(P) &= ~(V)) 56 * atomic_add_long(P, V) (*(u_long*)(P) += (V)) 57 * atomic_subtract_long(P, V) (*(u_long*)(P) -= (V)) 58 * atomic_readandclear_long(P) (return (*(u_long*)(P)); *(u_long*)(P) = 0;) 59 * atomic_readandclear_int(P) (return (*(u_int*)(P)); *(u_int*)(P) = 0;) 60 */ 61 62 /* 63 * The above functions are expanded inline in the statically-linked 64 * kernel. Lock prefixes are generated if an SMP kernel is being 65 * built, or if user code is using these functions. 66 * 67 * Kernel modules call real functions which are built into the kernel. 68 * This allows kernel modules to be portable between UP and SMP systems. 69 */ 70 #if defined(KLD_MODULE) 71 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \ 72 extern void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v); \ 73 extern void atomic_##NAME##_##TYPE##_nonlocked(volatile u_##TYPE *p, u_##TYPE v); 74 #else /* !KLD_MODULE */ 75 #define MPLOCKED "lock ; " 76 77 /* 78 * The assembly is volatilized to demark potential before-and-after side 79 * effects if an interrupt or SMP collision were to occur. The primary 80 * atomic instructions are MP safe, the nonlocked instructions are 81 * local-interrupt-safe (so we don't depend on C 'X |= Y' generating an 82 * atomic instruction). 83 * 84 * +m - memory is read and written (=m - memory is only written) 85 * iq - integer constant or %ax/%bx/%cx/%dx (ir = int constant or any reg) 86 * (Note: byte instructions only work on %ax,%bx,%cx, or %dx). iq 87 * is good enough for our needs so don't get fancy. 88 * r - any register. 89 * 90 * NOTE: 64-bit immediate values are not supported for most x86-64 91 * instructions so we have to use "r". 92 */ 93 94 /* egcs 1.1.2+ version */ 95 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \ 96 static __inline void \ 97 atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\ 98 { \ 99 __asm __volatile(MPLOCKED OP \ 100 : "+m" (*p) \ 101 : CONS (V)); \ 102 } \ 103 static __inline void \ 104 atomic_##NAME##_##TYPE##_nonlocked(volatile u_##TYPE *p, u_##TYPE v)\ 105 { \ 106 __asm __volatile(OP \ 107 : "+m" (*p) \ 108 : CONS (V)); \ 109 } 110 111 #endif /* KLD_MODULE */ 112 113 /* egcs 1.1.2+ version */ 114 ATOMIC_ASM(set, char, "orb %b1,%0", "iq", v) 115 ATOMIC_ASM(clear, char, "andb %b1,%0", "iq", ~v) 116 ATOMIC_ASM(add, char, "addb %b1,%0", "iq", v) 117 ATOMIC_ASM(subtract, char, "subb %b1,%0", "iq", v) 118 119 ATOMIC_ASM(set, short, "orw %w1,%0", "iq", v) 120 ATOMIC_ASM(clear, short, "andw %w1,%0", "iq", ~v) 121 ATOMIC_ASM(add, short, "addw %w1,%0", "iq", v) 122 ATOMIC_ASM(subtract, short, "subw %w1,%0", "iq", v) 123 124 ATOMIC_ASM(set, int, "orl %1,%0", "iq", v) 125 ATOMIC_ASM(clear, int, "andl %1,%0", "iq", ~v) 126 ATOMIC_ASM(add, int, "addl %1,%0", "iq", v) 127 ATOMIC_ASM(subtract, int, "subl %1,%0", "iq", v) 128 129 ATOMIC_ASM(set, long, "orq %1,%0", "r", v) 130 ATOMIC_ASM(clear, long, "andq %1,%0", "r", ~v) 131 ATOMIC_ASM(add, long, "addq %1,%0", "r", v) 132 ATOMIC_ASM(subtract, long, "subq %1,%0", "r", v) 133 134 #if defined(KLD_MODULE) 135 136 u_long atomic_readandclear_long(volatile u_long *addr); 137 u_int atomic_readandclear_int(volatile u_int *addr); 138 139 #else /* !KLD_MODULE */ 140 141 static __inline u_long 142 atomic_readandclear_long(volatile u_long *addr) 143 { 144 u_long res; 145 146 res = 0; 147 __asm __volatile( 148 " xchgq %1,%0 ; " 149 "# atomic_readandclear_long" 150 : "+r" (res), /* 0 */ 151 "=m" (*addr) /* 1 */ 152 : "m" (*addr)); 153 154 return (res); 155 } 156 157 static __inline u_int 158 atomic_readandclear_int(volatile u_int *addr) 159 { 160 u_int res; 161 162 res = 0; 163 __asm __volatile( 164 " xchgl %1,%0 ; " 165 "# atomic_readandclear_int" 166 : "+r" (res), /* 0 */ 167 "=m" (*addr) /* 1 */ 168 : "m" (*addr)); 169 170 return (res); 171 } 172 173 #endif /* KLD_MODULE */ 174 175 /* 176 * atomic_poll_acquire_int(P) Returns non-zero on success, 0 if the lock 177 * has already been acquired. 178 * atomic_poll_release_int(P) 179 * 180 * These support the NDIS driver and are also used for IPIQ interlocks 181 * between cpus. Both the acquisition and release must be 182 * cache-synchronizing instructions. 183 */ 184 185 #if defined(KLD_MODULE) 186 187 extern int atomic_swap_int(volatile int *addr, int value); 188 extern int atomic_poll_acquire_int(volatile u_int *p); 189 extern void atomic_poll_release_int(volatile u_int *p); 190 191 #else 192 193 static __inline int 194 atomic_swap_int(volatile int *addr, int value) 195 { 196 __asm __volatile("xchgl %0, %1" : 197 "=r" (value), "=m" (*addr) : "0" (value) : "memory"); 198 return (value); 199 } 200 201 static __inline 202 int 203 atomic_poll_acquire_int(volatile u_int *p) 204 { 205 u_int data; 206 207 __asm __volatile(MPLOCKED "btsl $0,%0; setnc %%al; andl $255,%%eax" : "+m" (*p), "=a" (data)); 208 return(data); 209 } 210 211 static __inline 212 void 213 atomic_poll_release_int(volatile u_int *p) 214 { 215 __asm __volatile(MPLOCKED "btrl $0,%0" : "+m" (*p)); 216 } 217 218 #endif 219 220 /* 221 * These functions operate on a 32 bit interrupt interlock which is defined 222 * as follows: 223 * 224 * bit 0-30 interrupt handler disabled bits (counter) 225 * bit 31 interrupt handler currently running bit (1 = run) 226 * 227 * atomic_intr_cond_test(P) Determine if the interlock is in an 228 * acquired state. Returns 0 if it not 229 * acquired, non-zero if it is. 230 * 231 * atomic_intr_cond_try(P) 232 * Increment the request counter and attempt to 233 * set bit 31 to acquire the interlock. If 234 * we are unable to set bit 31 the request 235 * counter is decremented and we return -1, 236 * otherwise we return 0. 237 * 238 * atomic_intr_cond_enter(P, func, arg) 239 * Increment the request counter and attempt to 240 * set bit 31 to acquire the interlock. If 241 * we are unable to set bit 31 func(arg) is 242 * called in a loop until we are able to set 243 * bit 31. 244 * 245 * atomic_intr_cond_exit(P, func, arg) 246 * Decrement the request counter and clear bit 247 * 31. If the request counter is still non-zero 248 * call func(arg) once. 249 * 250 * atomic_intr_handler_disable(P) 251 * Set bit 30, indicating that the interrupt 252 * handler has been disabled. Must be called 253 * after the hardware is disabled. 254 * 255 * Returns bit 31 indicating whether a serialized 256 * accessor is active (typically the interrupt 257 * handler is running). 0 == not active, 258 * non-zero == active. 259 * 260 * atomic_intr_handler_enable(P) 261 * Clear bit 30, indicating that the interrupt 262 * handler has been enabled. Must be called 263 * before the hardware is actually enabled. 264 * 265 * atomic_intr_handler_is_enabled(P) 266 * Returns bit 30, 0 indicates that the handler 267 * is enabled, non-zero indicates that it is 268 * disabled. The request counter portion of 269 * the field is ignored. 270 */ 271 272 #if defined(KLD_MODULE) 273 274 void atomic_intr_init(__atomic_intr_t *p); 275 int atomic_intr_handler_disable(__atomic_intr_t *p); 276 void atomic_intr_handler_enable(__atomic_intr_t *p); 277 int atomic_intr_handler_is_enabled(__atomic_intr_t *p); 278 int atomic_intr_cond_test(__atomic_intr_t *p); 279 int atomic_intr_cond_try(__atomic_intr_t *p); 280 void atomic_intr_cond_enter(__atomic_intr_t *p, void (*func)(void *), void *arg); 281 void atomic_intr_cond_exit(__atomic_intr_t *p, void (*func)(void *), void *arg); 282 283 #else 284 285 static __inline 286 void 287 atomic_intr_init(__atomic_intr_t *p) 288 { 289 *p = 0; 290 } 291 292 static __inline 293 int 294 atomic_intr_handler_disable(__atomic_intr_t *p) 295 { 296 int data; 297 298 __asm __volatile(MPLOCKED "orl $0x40000000,%1; movl %1,%%eax; " \ 299 "andl $0x80000000,%%eax" \ 300 : "=a"(data) , "+m"(*p)); 301 return(data); 302 } 303 304 static __inline 305 void 306 atomic_intr_handler_enable(__atomic_intr_t *p) 307 { 308 __asm __volatile(MPLOCKED "andl $0xBFFFFFFF,%0" : "+m" (*p)); 309 } 310 311 static __inline 312 int 313 atomic_intr_handler_is_enabled(__atomic_intr_t *p) 314 { 315 int data; 316 317 __asm __volatile("movl %1,%%eax; andl $0x40000000,%%eax" \ 318 : "=a"(data) : "m"(*p)); 319 return(data); 320 } 321 322 static __inline 323 void 324 atomic_intr_cond_enter(__atomic_intr_t *p, void (*func)(void *), void *arg) 325 { 326 __asm __volatile(MPLOCKED "incl %0; " \ 327 "1: ;" \ 328 MPLOCKED "btsl $31,%0; jnc 2f; " \ 329 "movq %2,%%rdi; call *%1; " \ 330 "jmp 1b; " \ 331 "2: ;" \ 332 : "+m" (*p) \ 333 : "r"(func), "m"(arg) \ 334 : "ax", "cx", "dx", "rsi", "rdi", "r8", "r9", "r10", "r11"); 335 /* YYY the function call may clobber even more registers? */ 336 } 337 338 /* 339 * Attempt to enter the interrupt condition variable. Returns zero on 340 * success, 1 on failure. 341 */ 342 static __inline 343 int 344 atomic_intr_cond_try(__atomic_intr_t *p) 345 { 346 int ret; 347 348 __asm __volatile(MPLOCKED "incl %0; " \ 349 "1: ;" \ 350 "subl %%eax,%%eax; " \ 351 MPLOCKED "btsl $31,%0; jnc 2f; " \ 352 MPLOCKED "decl %0; " \ 353 "movl $1,%%eax;" \ 354 "2: ;" 355 : "+m" (*p), "=&a"(ret) 356 : : "cx", "dx"); 357 return (ret); 358 } 359 360 361 static __inline 362 int 363 atomic_intr_cond_test(__atomic_intr_t *p) 364 { 365 return((int)(*p & 0x80000000)); 366 } 367 368 static __inline 369 void 370 atomic_intr_cond_exit(__atomic_intr_t *p, void (*func)(void *), void *arg) 371 { 372 __asm __volatile(MPLOCKED "decl %0; " \ 373 MPLOCKED "btrl $31,%0; " \ 374 "testl $0x3FFFFFFF,%0; jz 1f; " \ 375 "movq %2,%%rdi; call *%1; " \ 376 "1: ;" \ 377 : "+m" (*p) \ 378 : "r"(func), "m"(arg) \ 379 : "ax", "cx", "dx", "rsi", "rdi", "r8", "r9", "r10", "r11"); 380 /* YYY the function call may clobber even more registers? */ 381 } 382 383 #endif 384 385 /* 386 * Atomic compare and set 387 * 388 * if (*_dst == _old) *_dst = _new (all 32 bit words) 389 * 390 * Returns 0 on failure, non-zero on success. The inline is designed to 391 * allow the compiler to optimize the common case where the caller calls 392 * these functions from inside a conditional. 393 */ 394 #if defined(KLD_MODULE) 395 396 extern int atomic_cmpset_int(volatile u_int *_dst, u_int _old, u_int _new); 397 extern long atomic_cmpset_long(volatile u_long *_dst, u_long _exp, u_long _src); 398 extern u_int atomic_fetchadd_int(volatile u_int *_p, u_int _v); 399 extern u_long atomic_fetchadd_long(volatile u_long *_p, u_long _v); 400 401 #else 402 403 static __inline int 404 atomic_cmpset_int(volatile u_int *_dst, u_int _old, u_int _new) 405 { 406 u_int res = _old; 407 408 __asm __volatile(MPLOCKED "cmpxchgl %2,%1; " \ 409 : "+a" (res), "=m" (*_dst) \ 410 : "r" (_new), "m" (*_dst) \ 411 : "memory"); 412 return (res == _old); 413 } 414 415 static __inline long 416 atomic_cmpset_long(volatile u_long *_dst, u_long _old, u_long _new) 417 { 418 u_long res = _old; 419 420 __asm __volatile(MPLOCKED "cmpxchgq %2,%1; " \ 421 : "+a" (res), "=m" (*_dst) \ 422 : "r" (_new), "m" (*_dst) \ 423 : "memory"); 424 return (res == _old); 425 } 426 427 /* 428 * Atomically add the value of v to the integer pointed to by p and return 429 * the previous value of *p. 430 */ 431 static __inline u_int 432 atomic_fetchadd_int(volatile u_int *_p, u_int _v) 433 { 434 __asm __volatile(MPLOCKED "xaddl %0,%1; " \ 435 : "+r" (_v), "=m" (*_p) \ 436 : "m" (*_p) \ 437 : "memory"); 438 return (_v); 439 } 440 441 static __inline u_long 442 atomic_fetchadd_long(volatile u_long *_p, u_long _v) 443 { 444 __asm __volatile(MPLOCKED "xaddq %0,%1; " \ 445 : "+r" (_v), "=m" (*_p) \ 446 : "m" (*_p) \ 447 : "memory"); 448 return (_v); 449 } 450 451 #endif /* KLD_MODULE */ 452 453 #if defined(KLD_MODULE) 454 455 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \ 456 extern u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p); \ 457 extern void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v); 458 459 #else /* !KLD_MODULE */ 460 461 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \ 462 static __inline u_##TYPE \ 463 atomic_load_acq_##TYPE(volatile u_##TYPE *p) \ 464 { \ 465 u_##TYPE res; \ 466 \ 467 __asm __volatile(MPLOCKED LOP \ 468 : "=a" (res), /* 0 */ \ 469 "=m" (*p) /* 1 */ \ 470 : "m" (*p) /* 2 */ \ 471 : "memory"); \ 472 \ 473 return (res); \ 474 } \ 475 \ 476 /* \ 477 * The XCHG instruction asserts LOCK automagically. \ 478 */ \ 479 static __inline void \ 480 atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\ 481 { \ 482 __asm __volatile(SOP \ 483 : "=m" (*p), /* 0 */ \ 484 "+r" (v) /* 1 */ \ 485 : "m" (*p)); /* 2 */ \ 486 } \ 487 struct __hack 488 489 #endif /* !KLD_MODULE */ 490 491 ATOMIC_STORE_LOAD(char, "cmpxchgb %b0,%1", "xchgb %b1,%0"); 492 ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0"); 493 ATOMIC_STORE_LOAD(int, "cmpxchgl %0,%1", "xchgl %1,%0"); 494 ATOMIC_STORE_LOAD(long, "cmpxchgq %0,%1", "xchgq %1,%0"); 495 496 #undef ATOMIC_ASM 497 #undef ATOMIC_STORE_LOAD 498 499 /* Acquire and release variants are identical to the normal ones. */ 500 #define atomic_set_acq_char atomic_set_char 501 #define atomic_set_rel_char atomic_set_char 502 #define atomic_clear_acq_char atomic_clear_char 503 #define atomic_clear_rel_char atomic_clear_char 504 #define atomic_add_acq_char atomic_add_char 505 #define atomic_add_rel_char atomic_add_char 506 #define atomic_subtract_acq_char atomic_subtract_char 507 #define atomic_subtract_rel_char atomic_subtract_char 508 509 #define atomic_set_acq_short atomic_set_short 510 #define atomic_set_rel_short atomic_set_short 511 #define atomic_clear_acq_short atomic_clear_short 512 #define atomic_clear_rel_short atomic_clear_short 513 #define atomic_add_acq_short atomic_add_short 514 #define atomic_add_rel_short atomic_add_short 515 #define atomic_subtract_acq_short atomic_subtract_short 516 #define atomic_subtract_rel_short atomic_subtract_short 517 518 #define atomic_set_acq_int atomic_set_int 519 #define atomic_set_rel_int atomic_set_int 520 #define atomic_clear_acq_int atomic_clear_int 521 #define atomic_clear_rel_int atomic_clear_int 522 #define atomic_add_acq_int atomic_add_int 523 #define atomic_add_rel_int atomic_add_int 524 #define atomic_subtract_acq_int atomic_subtract_int 525 #define atomic_subtract_rel_int atomic_subtract_int 526 #define atomic_cmpset_acq_int atomic_cmpset_int 527 #define atomic_cmpset_rel_int atomic_cmpset_int 528 529 #define atomic_set_acq_long atomic_set_long 530 #define atomic_set_rel_long atomic_set_long 531 #define atomic_clear_acq_long atomic_clear_long 532 #define atomic_clear_rel_long atomic_clear_long 533 #define atomic_add_acq_long atomic_add_long 534 #define atomic_add_rel_long atomic_add_long 535 #define atomic_subtract_acq_long atomic_subtract_long 536 #define atomic_subtract_rel_long atomic_subtract_long 537 #define atomic_cmpset_acq_long atomic_cmpset_long 538 #define atomic_cmpset_rel_long atomic_cmpset_long 539 540 /* cpumask_t is 64-bits on x86-64 */ 541 #define atomic_set_cpumask atomic_set_long 542 #define atomic_clear_cpumask atomic_clear_long 543 #define atomic_cmpset_cpumask atomic_cmpset_long 544 545 /* Operations on 8-bit bytes. */ 546 #define atomic_set_8 atomic_set_char 547 #define atomic_set_acq_8 atomic_set_acq_char 548 #define atomic_set_rel_8 atomic_set_rel_char 549 #define atomic_clear_8 atomic_clear_char 550 #define atomic_clear_acq_8 atomic_clear_acq_char 551 #define atomic_clear_rel_8 atomic_clear_rel_char 552 #define atomic_add_8 atomic_add_char 553 #define atomic_add_acq_8 atomic_add_acq_char 554 #define atomic_add_rel_8 atomic_add_rel_char 555 #define atomic_subtract_8 atomic_subtract_char 556 #define atomic_subtract_acq_8 atomic_subtract_acq_char 557 #define atomic_subtract_rel_8 atomic_subtract_rel_char 558 #define atomic_load_acq_8 atomic_load_acq_char 559 #define atomic_store_rel_8 atomic_store_rel_char 560 561 /* Operations on 16-bit words. */ 562 #define atomic_set_16 atomic_set_short 563 #define atomic_set_acq_16 atomic_set_acq_short 564 #define atomic_set_rel_16 atomic_set_rel_short 565 #define atomic_clear_16 atomic_clear_short 566 #define atomic_clear_acq_16 atomic_clear_acq_short 567 #define atomic_clear_rel_16 atomic_clear_rel_short 568 #define atomic_add_16 atomic_add_short 569 #define atomic_add_acq_16 atomic_add_acq_short 570 #define atomic_add_rel_16 atomic_add_rel_short 571 #define atomic_subtract_16 atomic_subtract_short 572 #define atomic_subtract_acq_16 atomic_subtract_acq_short 573 #define atomic_subtract_rel_16 atomic_subtract_rel_short 574 #define atomic_load_acq_16 atomic_load_acq_short 575 #define atomic_store_rel_16 atomic_store_rel_short 576 577 /* Operations on 32-bit double words. */ 578 #define atomic_set_32 atomic_set_int 579 #define atomic_set_acq_32 atomic_set_acq_int 580 #define atomic_set_rel_32 atomic_set_rel_int 581 #define atomic_clear_32 atomic_clear_int 582 #define atomic_clear_acq_32 atomic_clear_acq_int 583 #define atomic_clear_rel_32 atomic_clear_rel_int 584 #define atomic_add_32 atomic_add_int 585 #define atomic_add_acq_32 atomic_add_acq_int 586 #define atomic_add_rel_32 atomic_add_rel_int 587 #define atomic_subtract_32 atomic_subtract_int 588 #define atomic_subtract_acq_32 atomic_subtract_acq_int 589 #define atomic_subtract_rel_32 atomic_subtract_rel_int 590 #define atomic_load_acq_32 atomic_load_acq_int 591 #define atomic_store_rel_32 atomic_store_rel_int 592 #define atomic_cmpset_32 atomic_cmpset_int 593 #define atomic_cmpset_acq_32 atomic_cmpset_acq_int 594 #define atomic_cmpset_rel_32 atomic_cmpset_rel_int 595 #define atomic_readandclear_32 atomic_readandclear_int 596 #define atomic_fetchadd_32 atomic_fetchadd_int 597 598 /* Operations on pointers. */ 599 #define atomic_set_ptr(p, v) \ 600 atomic_set_long((volatile u_long *)(p), (u_long)(v)) 601 #define atomic_set_acq_ptr(p, v) \ 602 atomic_set_acq_long((volatile u_long *)(p), (u_long)(v)) 603 #define atomic_set_rel_ptr(p, v) \ 604 atomic_set_rel_long((volatile u_long *)(p), (u_long)(v)) 605 #define atomic_clear_ptr(p, v) \ 606 atomic_clear_long((volatile u_long *)(p), (u_long)(v)) 607 #define atomic_clear_acq_ptr(p, v) \ 608 atomic_clear_acq_long((volatile u_long *)(p), (u_long)(v)) 609 #define atomic_clear_rel_ptr(p, v) \ 610 atomic_clear_rel_long((volatile u_long *)(p), (u_long)(v)) 611 #define atomic_add_ptr(p, v) \ 612 atomic_add_long((volatile u_long *)(p), (u_long)(v)) 613 #define atomic_add_acq_ptr(p, v) \ 614 atomic_add_acq_long((volatile u_long *)(p), (u_long)(v)) 615 #define atomic_add_rel_ptr(p, v) \ 616 atomic_add_rel_long((volatile u_long *)(p), (u_long)(v)) 617 #define atomic_subtract_ptr(p, v) \ 618 atomic_subtract_long((volatile u_long *)(p), (u_long)(v)) 619 #define atomic_subtract_acq_ptr(p, v) \ 620 atomic_subtract_acq_long((volatile u_long *)(p), (u_long)(v)) 621 #define atomic_subtract_rel_ptr(p, v) \ 622 atomic_subtract_rel_long((volatile u_long *)(p), (u_long)(v)) 623 #define atomic_load_acq_ptr(p) \ 624 atomic_load_acq_long((volatile u_long *)(p)) 625 #define atomic_store_rel_ptr(p, v) \ 626 atomic_store_rel_long((volatile u_long *)(p), (v)) 627 #define atomic_cmpset_ptr(dst, old, new) \ 628 atomic_cmpset_long((volatile u_long *)(dst), (u_long)(old), \ 629 (u_long)(new)) 630 #define atomic_cmpset_acq_ptr(dst, old, new) \ 631 atomic_cmpset_acq_long((volatile u_long *)(dst), (u_long)(old), \ 632 (u_long)(new)) 633 #define atomic_cmpset_rel_ptr(dst, old, new) \ 634 atomic_cmpset_rel_long((volatile u_long *)(dst), (u_long)(old), \ 635 (u_long)(new)) 636 #define atomic_readandclear_ptr(p) \ 637 atomic_readandclear_long((volatile u_long *)(p)) 638 639 #endif /* ! _CPU_ATOMIC_H_ */ 640