xref: /dragonfly/sys/dev/agp/agp_via.c (revision 8a7bdfea)
1 /*-
2  * Copyright (c) 2000 Doug Rabson
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  *	$FreeBSD: src/sys/dev/agp/agp_via.c,v 1.26 2007/11/12 21:51:37 jhb Exp $
27  *	$DragonFly: src/sys/dev/agp/agp_via.c,v 1.8 2008/01/07 01:34:58 corecode Exp $
28  */
29 
30 #include "opt_bus.h"
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/malloc.h>
35 #include <sys/kernel.h>
36 #include <sys/bus.h>
37 #include <sys/lock.h>
38 
39 #include <bus/pci/pcivar.h>
40 #include <bus/pci/pcireg.h>
41 #include "agppriv.h"
42 #include "agpreg.h"
43 
44 #include <vm/vm.h>
45 #include <vm/vm_object.h>
46 #include <vm/pmap.h>
47 
48 #define	REG_GARTCTRL	0
49 #define	REG_APSIZE	1
50 #define	REG_ATTBASE	2
51 
52 struct agp_via_softc {
53 	struct agp_softc agp;
54 	u_int32_t	initial_aperture; /* aperture size at startup */
55 	struct agp_gatt *gatt;
56 	int		*regs;
57 };
58 
59 static int via_v2_regs[] = { AGP_VIA_GARTCTRL, AGP_VIA_APSIZE,
60     AGP_VIA_ATTBASE };
61 static int via_v3_regs[] = { AGP3_VIA_GARTCTRL, AGP3_VIA_APSIZE,
62     AGP3_VIA_ATTBASE };
63 
64 static const char*
65 agp_via_match(device_t dev)
66 {
67 	if (pci_get_class(dev) != PCIC_BRIDGE
68 	    || pci_get_subclass(dev) != PCIS_BRIDGE_HOST)
69 		return NULL;
70 
71 	if (agp_find_caps(dev) == 0)
72 		return NULL;
73 
74 	switch (pci_get_devid(dev)) {
75 	case 0x01981106:
76 		return ("VIA 8763 (P4X600) host to PCI bridge");
77 	case 0x02591106:
78 		return ("VIA PM800/PN800/PM880/PN880 host to PCI bridge");
79 	case 0x02691106:
80 		return ("VIA KT880 host to PCI bridge");
81 	case 0x02961106:
82 		return ("VIA 3296 (P4M800) host to PCI bridge");
83 	case 0x03051106:
84 		return ("VIA 82C8363 (Apollo KT133x/KM133) host to PCI bridge");
85 	case 0x03911106:
86 		return ("VIA 8371 (Apollo KX133) host to PCI bridge");
87 	case 0x05011106:
88 		return ("VIA 8501 (Apollo MVP4) host to PCI bridge");
89 	case 0x05971106:
90 		return ("VIA 82C597 (Apollo VP3) host to PCI bridge");
91 	case 0x05981106:
92 		return ("VIA 82C598 (Apollo MVP3) host to PCI bridge");
93 	case 0x06011106:
94 		return ("VIA 8601 (Apollo ProMedia/PLE133Ta) host to PCI bridge");
95 	case 0x06051106:
96 		return ("VIA 82C694X (Apollo Pro 133A) host to PCI bridge");
97 	case 0x06911106:
98 		return ("VIA 82C691 (Apollo Pro) host to PCI bridge");
99 	case 0x30911106:
100 		return ("VIA 8633 (Pro 266) host to PCI bridge");
101 	case 0x30991106:
102 		return ("VIA 8367 (KT266/KY266x/KT333) host to PCI bridge");
103 	case 0x31011106:
104 		return ("VIA 8653 (Pro266T) host to PCI bridge");
105 	case 0x31121106:
106 		return ("VIA 8361 (KLE133) host to PCI bridge");
107 	case 0x31161106:
108 		return ("VIA XM266 (PM266/KM266) host to PCI bridge");
109 	case 0x31231106:
110 		return ("VIA 862x (CLE266) host to PCI bridge");
111 	case 0x31281106:
112 		return ("VIA 8753 (P4X266) host to PCI bridge");
113 	case 0x31481106:
114 		return ("VIA 8703 (P4M266x/P4N266) host to PCI bridge");
115 	case 0x31561106:
116 		return ("VIA XN266 (Apollo Pro266) host to PCI bridge");
117 	case 0x31681106:
118 		return ("VIA 8754 (PT800) host to PCI bridge");
119 	case 0x31891106:
120 		return ("VIA 8377 (Apollo KT400/KT400A/KT600) host to PCI bridge");
121 	case 0x32051106:
122 		return ("VIA 8235/8237 (Apollo KM400/KM400A) host to PCI bridge");
123 	case 0x32081106:
124 		return ("VIA 8783 (PT890) host to PCI bridge");
125 	case 0x32581106:
126 		return ("VIA PT880 host to PCI bridge");
127 	case 0xb1981106:
128 		return ("VIA VT83xx/VT87xx/KTxxx/Px8xx host to PCI bridge");
129 	};
130 
131 	return NULL;
132 }
133 
134 static int
135 agp_via_probe(device_t dev)
136 {
137 	const char *desc;
138 
139 	if (resource_disabled("agp", device_get_unit(dev)))
140 		return (ENXIO);
141 	desc = agp_via_match(dev);
142 	if (desc) {
143 		device_verbose(dev);
144 		device_set_desc(dev, desc);
145 		return BUS_PROBE_DEFAULT;
146 	}
147 
148 	return ENXIO;
149 }
150 
151 static int
152 agp_via_attach(device_t dev)
153 {
154 	struct agp_via_softc *sc = device_get_softc(dev);
155 	struct agp_gatt *gatt;
156 	int error;
157 	u_int32_t agpsel;
158 
159 	/* XXX: This should be keying off of whether the bridge is AGP3 capable,
160 	 * rather than a bunch of device ids for chipsets that happen to do 8x.
161 	 */
162 	switch (pci_get_devid(dev)) {
163 	case 0x01981106:
164 	case 0x02591106:
165 	case 0x02691106:
166 	case 0x02961106:
167 	case 0x31231106:
168 	case 0x31681106:
169 	case 0x31891106:
170 	case 0x32051106:
171 	case 0x32581106:
172 	case 0xb1981106:
173 		/* The newer VIA chipsets will select the AGP version based on
174 		 * what AGP versions the card supports.  We still have to
175 		 * program it using the v2 registers if it has chosen to use
176 		 * compatibility mode.
177 		 */
178 		agpsel = pci_read_config(dev, AGP_VIA_AGPSEL, 1);
179 		if ((agpsel & (1 << 1)) == 0)
180 			sc->regs = via_v3_regs;
181 		else
182 			sc->regs = via_v2_regs;
183 		break;
184 	default:
185 		sc->regs = via_v2_regs;
186 		break;
187 	}
188 
189 	error = agp_generic_attach(dev);
190 	if (error)
191 		return error;
192 
193 	sc->initial_aperture = AGP_GET_APERTURE(dev);
194 	if (sc->initial_aperture == 0) {
195 		device_printf(dev, "bad initial aperture size, disabling\n");
196 		return ENXIO;
197 	}
198 
199 	for (;;) {
200 		gatt = agp_alloc_gatt(dev);
201 		if (gatt)
202 			break;
203 
204 		/*
205 		 * Probably contigmalloc failure. Try reducing the
206 		 * aperture so that the gatt size reduces.
207 		 */
208 		if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) {
209 			agp_generic_detach(dev);
210 			return ENOMEM;
211 		}
212 	}
213 	sc->gatt = gatt;
214 
215 	if (sc->regs == via_v2_regs) {
216 		/* Install the gatt. */
217 		pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical | 3, 4);
218 
219 		/* Enable the aperture. */
220 		pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4);
221 	} else {
222 		u_int32_t gartctrl;
223 
224 		/* Install the gatt. */
225 		pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical, 4);
226 
227 		/* Enable the aperture. */
228 		gartctrl = pci_read_config(dev, sc->regs[REG_ATTBASE], 4);
229 		pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl | (3 << 7), 4);
230 	}
231 
232 	return 0;
233 }
234 
235 static int
236 agp_via_detach(device_t dev)
237 {
238 	struct agp_via_softc *sc = device_get_softc(dev);
239 
240 	agp_free_cdev(dev);
241 
242 	pci_write_config(dev, sc->regs[REG_GARTCTRL], 0, 4);
243 	pci_write_config(dev, sc->regs[REG_ATTBASE], 0, 4);
244 	AGP_SET_APERTURE(dev, sc->initial_aperture);
245 	agp_free_gatt(sc->gatt);
246 	agp_free_res(dev);
247 
248 	return 0;
249 }
250 
251 static u_int32_t
252 agp_via_get_aperture(device_t dev)
253 {
254 	struct agp_via_softc *sc = device_get_softc(dev);
255 	u_int32_t apsize;
256 
257 	apsize = pci_read_config(dev, sc->regs[REG_APSIZE], 1) & 0x1f;
258 
259 	/*
260 	 * The size is determined by the number of low bits of
261 	 * register APBASE which are forced to zero. The low 20 bits
262 	 * are always forced to zero and each zero bit in the apsize
263 	 * field just read forces the corresponding bit in the 27:20
264 	 * to be zero. We calculate the aperture size accordingly.
265 	 */
266 	return (((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1;
267 }
268 
269 static int
270 agp_via_set_aperture(device_t dev, u_int32_t aperture)
271 {
272 	struct agp_via_softc *sc = device_get_softc(dev);
273 	u_int32_t apsize;
274 
275 	/*
276 	 * Reverse the magic from get_aperture.
277 	 */
278 	apsize = ((aperture - 1) >> 20) ^ 0xff;
279 
280 	/*
281 	 * Double check for sanity.
282 	 */
283 	if ((((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1 != aperture)
284 		return EINVAL;
285 
286 	pci_write_config(dev, sc->regs[REG_APSIZE], apsize, 1);
287 
288 	return 0;
289 }
290 
291 static int
292 agp_via_bind_page(device_t dev, int offset, vm_offset_t physical)
293 {
294 	struct agp_via_softc *sc = device_get_softc(dev);
295 
296 	if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
297 		return EINVAL;
298 
299 	sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical;
300 	return 0;
301 }
302 
303 static int
304 agp_via_unbind_page(device_t dev, int offset)
305 {
306 	struct agp_via_softc *sc = device_get_softc(dev);
307 
308 	if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
309 		return EINVAL;
310 
311 	sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
312 	return 0;
313 }
314 
315 static void
316 agp_via_flush_tlb(device_t dev)
317 {
318 	struct agp_via_softc *sc = device_get_softc(dev);
319 	u_int32_t gartctrl;
320 
321 	if (sc->regs == via_v2_regs) {
322 		pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x8f, 4);
323 		pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4);
324 	} else {
325 		gartctrl = pci_read_config(dev, sc->regs[REG_GARTCTRL], 4);
326 		pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl &
327 		    ~(1 << 7), 4);
328 		pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl, 4);
329 	}
330 
331 }
332 
333 static device_method_t agp_via_methods[] = {
334 	/* Device interface */
335 	DEVMETHOD(device_probe,		agp_via_probe),
336 	DEVMETHOD(device_attach,	agp_via_attach),
337 	DEVMETHOD(device_detach,	agp_via_detach),
338 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
339 	DEVMETHOD(device_suspend,	bus_generic_suspend),
340 	DEVMETHOD(device_resume,	bus_generic_resume),
341 
342 	/* AGP interface */
343 	DEVMETHOD(agp_get_aperture,	agp_via_get_aperture),
344 	DEVMETHOD(agp_set_aperture,	agp_via_set_aperture),
345 	DEVMETHOD(agp_bind_page,	agp_via_bind_page),
346 	DEVMETHOD(agp_unbind_page,	agp_via_unbind_page),
347 	DEVMETHOD(agp_flush_tlb,	agp_via_flush_tlb),
348 	DEVMETHOD(agp_enable,		agp_generic_enable),
349 	DEVMETHOD(agp_alloc_memory,	agp_generic_alloc_memory),
350 	DEVMETHOD(agp_free_memory,	agp_generic_free_memory),
351 	DEVMETHOD(agp_bind_memory,	agp_generic_bind_memory),
352 	DEVMETHOD(agp_unbind_memory,	agp_generic_unbind_memory),
353 
354 	{ 0, 0 }
355 };
356 
357 static driver_t agp_via_driver = {
358 	"agp",
359 	agp_via_methods,
360 	sizeof(struct agp_via_softc),
361 };
362 
363 static devclass_t agp_devclass;
364 
365 DRIVER_MODULE(agp_via, pci, agp_via_driver, agp_devclass, 0, 0);
366 MODULE_DEPEND(agp_via, agp, 1, 1, 1);
367 MODULE_DEPEND(agp_via, pci, 1, 1, 1);
368