1 /*- 2 * Copyright (c) 1998 - 2006 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/dev/ata/ata-pci.c,v 1.121 2007/02/23 12:18:33 piso Exp $ 27 * $DragonFly: src/sys/dev/disk/nata/ata-pci.c,v 1.10 2008/03/28 11:03:44 sephe Exp $ 28 */ 29 30 #include "opt_ata.h" 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/bus_resource.h> 35 #include <sys/malloc.h> 36 #include <sys/module.h> 37 #include <sys/nata.h> 38 #include <sys/rman.h> 39 #include <sys/systm.h> 40 41 #include <bus/pci/pcireg.h> 42 #include <bus/pci/pcivar.h> 43 44 #include "ata-all.h" 45 #include "ata-pci.h" 46 #include "ata_if.h" 47 48 /* local vars */ 49 static MALLOC_DEFINE(M_ATAPCI, "ata_pci", "ATA driver PCI"); 50 51 /* misc defines */ 52 #define IOMASK 0xfffffffc 53 #define ATA_PROBE_OK -10 54 55 static const struct none_atapci { 56 uint16_t vendor; 57 uint16_t device; 58 uint16_t subvendor; 59 uint16_t subdevice; 60 } none_atapci_table[] = { 61 /* Appears on Intel PRO/1000 PM */ 62 { ATA_INTEL_ID, 0x108d, ATA_INTEL_ID, 0x0000 }, 63 { 0xffff, 0, 0, 0 } 64 }; 65 66 int 67 ata_legacy(device_t dev) 68 { 69 return (((pci_read_config(dev, PCIR_PROGIF, 1)&PCIP_STORAGE_IDE_MASTERDEV)&& 70 ((pci_read_config(dev, PCIR_PROGIF, 1) & 71 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC)) != 72 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC))) || 73 (!pci_read_config(dev, PCIR_BAR(0), 4) && 74 !pci_read_config(dev, PCIR_BAR(1), 4) && 75 !pci_read_config(dev, PCIR_BAR(2), 4) && 76 !pci_read_config(dev, PCIR_BAR(3), 4) && 77 !pci_read_config(dev, PCIR_BAR(5), 4))); 78 } 79 80 int 81 ata_pci_probe(device_t dev) 82 { 83 if (pci_get_class(dev) != PCIC_STORAGE) 84 return ENXIO; 85 86 /* if this is an AHCI chipset grab it */ 87 if (pci_get_subclass(dev) == PCIS_STORAGE_SATA) { 88 if (!ata_ahci_ident(dev)) 89 return ATA_PROBE_OK; 90 } 91 92 /* run through the vendor specific drivers */ 93 switch (pci_get_vendor(dev)) { 94 case ATA_ACARD_ID: 95 if (!ata_acard_ident(dev)) 96 return ATA_PROBE_OK; 97 break; 98 case ATA_ACER_LABS_ID: 99 if (!ata_ali_ident(dev)) 100 return ATA_PROBE_OK; 101 break; 102 case ATA_AMD_ID: 103 if (!ata_amd_ident(dev)) 104 return ATA_PROBE_OK; 105 break; 106 case ATA_ATI_ID: 107 if (!ata_ati_ident(dev)) 108 return ATA_PROBE_OK; 109 break; 110 case ATA_CYRIX_ID: 111 if (!ata_cyrix_ident(dev)) 112 return ATA_PROBE_OK; 113 break; 114 case ATA_CYPRESS_ID: 115 if (!ata_cypress_ident(dev)) 116 return ATA_PROBE_OK; 117 break; 118 case ATA_HIGHPOINT_ID: 119 if (!ata_highpoint_ident(dev)) 120 return ATA_PROBE_OK; 121 break; 122 case ATA_INTEL_ID: 123 if (!ata_intel_ident(dev)) 124 return ATA_PROBE_OK; 125 break; 126 case ATA_ITE_ID: 127 if (!ata_ite_ident(dev)) 128 return ATA_PROBE_OK; 129 break; 130 case ATA_JMICRON_ID: 131 if (!ata_jmicron_ident(dev)) 132 return ATA_PROBE_OK; 133 break; 134 case ATA_MARVELL_ID: 135 if (!ata_marvell_ident(dev)) 136 return ATA_PROBE_OK; 137 break; 138 case ATA_NATIONAL_ID: 139 if (!ata_national_ident(dev)) 140 return ATA_PROBE_OK; 141 break; 142 case ATA_NETCELL_ID: 143 if (!ata_netcell_ident(dev)) 144 return ATA_PROBE_OK; 145 break; 146 case ATA_NVIDIA_ID: 147 if (!ata_nvidia_ident(dev)) 148 return ATA_PROBE_OK; 149 break; 150 case ATA_PROMISE_ID: 151 if (!ata_promise_ident(dev)) 152 return ATA_PROBE_OK; 153 break; 154 case ATA_SERVERWORKS_ID: 155 if (!ata_serverworks_ident(dev)) 156 return ATA_PROBE_OK; 157 break; 158 case ATA_SILICON_IMAGE_ID: 159 if (!ata_sii_ident(dev)) 160 return ATA_PROBE_OK; 161 break; 162 case ATA_SIS_ID: 163 if (!ata_sis_ident(dev)) 164 return ATA_PROBE_OK; 165 break; 166 case ATA_VIA_ID: 167 if (!ata_via_ident(dev)) 168 return ATA_PROBE_OK; 169 break; 170 case ATA_CENATEK_ID: 171 if (pci_get_devid(dev) == ATA_CENATEK_ROCKET) { 172 ata_generic_ident(dev); 173 device_set_desc(dev, "Cenatek Rocket Drive controller"); 174 return ATA_PROBE_OK; 175 } 176 break; 177 case ATA_MICRON_ID: 178 if (pci_get_devid(dev) == ATA_MICRON_RZ1000 || 179 pci_get_devid(dev) == ATA_MICRON_RZ1001) { 180 ata_generic_ident(dev); 181 device_set_desc(dev, 182 "RZ 100? ATA controller !WARNING! data loss/corruption risk"); 183 return ATA_PROBE_OK; 184 } 185 break; 186 } 187 188 /* unknown chipset, try generic AHCI or DMA if it seems possible */ 189 if (pci_get_subclass(dev) == PCIS_STORAGE_IDE) { 190 uint16_t vendor, device, subvendor, subdevice; 191 const struct none_atapci *e; 192 193 vendor = pci_get_vendor(dev); 194 device = pci_get_device(dev); 195 subvendor = pci_get_subvendor(dev); 196 subdevice = pci_get_subdevice(dev); 197 for (e = none_atapci_table; e->vendor != 0xffff; ++e) { 198 if (e->vendor == vendor && e->device == device && 199 e->subvendor == subvendor && e->subdevice == subdevice) 200 return ENXIO; 201 } 202 203 if (!ata_generic_ident(dev)) 204 return ATA_PROBE_OK; 205 } 206 return ENXIO; 207 } 208 209 int 210 ata_pci_attach(device_t dev) 211 { 212 struct ata_pci_controller *ctlr = device_get_softc(dev); 213 u_int32_t cmd; 214 int unit; 215 216 /* do chipset specific setups only needed once */ 217 ctlr->legacy = ata_legacy(dev); 218 if (ctlr->legacy || pci_read_config(dev, PCIR_BAR(2), 4) & IOMASK) 219 ctlr->channels = 2; 220 else 221 ctlr->channels = 1; 222 ctlr->allocate = ata_pci_allocate; 223 ctlr->dev = dev; 224 225 /* if needed try to enable busmastering */ 226 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 227 if (!(cmd & PCIM_CMD_BUSMASTEREN)) { 228 pci_write_config(dev, PCIR_COMMAND, cmd | PCIM_CMD_BUSMASTEREN, 2); 229 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 230 } 231 232 /* if busmastering mode "stuck" use it */ 233 if ((cmd & PCIM_CMD_BUSMASTEREN) == PCIM_CMD_BUSMASTEREN) { 234 ctlr->r_type1 = SYS_RES_IOPORT; 235 ctlr->r_rid1 = ATA_BMADDR_RID; 236 ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1, &ctlr->r_rid1, 237 RF_ACTIVE); 238 /* Only set a dma init function if the device actually supports it. */ 239 ctlr->dmainit = ata_pci_dmainit; 240 } 241 242 if (ctlr->chipinit(dev)) 243 return ENXIO; 244 245 /* attach all channels on this controller */ 246 for (unit = 0; unit < ctlr->channels; unit++) { 247 int freeunit = 2; 248 if ((unit == 0 || unit == 1) && ctlr->legacy) { 249 device_add_child(dev, "ata", unit); 250 continue; 251 } 252 /* XXX TGEN devclass_find_free_unit() implementation */ 253 while (freeunit < devclass_get_maxunit(ata_devclass) && 254 devclass_get_device(ata_devclass, freeunit) != NULL) 255 freeunit++; 256 device_add_child(dev, "ata", freeunit); 257 } 258 bus_generic_attach(dev); 259 return 0; 260 } 261 262 int 263 ata_pci_detach(device_t dev) 264 { 265 struct ata_pci_controller *ctlr = device_get_softc(dev); 266 device_t *children; 267 int nchildren, i; 268 269 /* detach & delete all children */ 270 if (!device_get_children(dev, &children, &nchildren)) { 271 for (i = 0; i < nchildren; i++) 272 device_delete_child(dev, children[i]); 273 kfree(children, M_TEMP); 274 } 275 276 if (ctlr->r_irq) { 277 bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle); 278 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ctlr->r_irq); 279 } 280 if (ctlr->r_res2) 281 bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2); 282 if (ctlr->r_res1) 283 bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1, ctlr->r_res1); 284 285 return 0; 286 } 287 288 struct resource * 289 ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, 290 u_long start, u_long end, u_long count, u_int flags) 291 { 292 struct ata_pci_controller *controller = device_get_softc(dev); 293 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 294 struct resource *res = NULL; 295 int myrid; 296 297 if (type == SYS_RES_IOPORT) { 298 switch (*rid) { 299 case ATA_IOADDR_RID: 300 if (controller->legacy) { 301 start = (unit ? ATA_SECONDARY : ATA_PRIMARY); 302 count = ATA_IOSIZE; 303 end = start + count - 1; 304 } 305 myrid = PCIR_BAR(0) + (unit << 3); 306 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 307 SYS_RES_IOPORT, &myrid, 308 start, end, count, flags); 309 break; 310 311 case ATA_CTLADDR_RID: 312 if (controller->legacy) { 313 start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + ATA_CTLOFFSET; 314 count = ATA_CTLIOSIZE; 315 end = start + count - 1; 316 } 317 myrid = PCIR_BAR(1) + (unit << 3); 318 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 319 SYS_RES_IOPORT, &myrid, 320 start, end, count, flags); 321 break; 322 } 323 } 324 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) { 325 if (controller->legacy) { 326 int irq = (unit == 0 ? 14 : 15); 327 328 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 329 SYS_RES_IRQ, rid, irq, irq, 1, flags); 330 } 331 else 332 res = controller->r_irq; 333 } 334 return res; 335 } 336 337 int 338 ata_pci_release_resource(device_t dev, device_t child, int type, int rid, 339 struct resource *r) 340 { 341 struct ata_pci_controller *controller = device_get_softc(dev); 342 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 343 344 if (type == SYS_RES_IOPORT) { 345 switch (rid) { 346 case ATA_IOADDR_RID: 347 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 348 SYS_RES_IOPORT, 349 PCIR_BAR(0) + (unit << 3), r); 350 break; 351 352 case ATA_CTLADDR_RID: 353 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 354 SYS_RES_IOPORT, 355 PCIR_BAR(1) + (unit << 3), r); 356 break; 357 default: 358 return ENOENT; 359 } 360 } 361 if (type == SYS_RES_IRQ) { 362 if (rid != ATA_IRQ_RID) 363 return ENOENT; 364 365 if (controller->legacy) { 366 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 367 SYS_RES_IRQ, rid, r); 368 } 369 else 370 return 0; 371 } 372 return EINVAL; 373 } 374 375 int 376 ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq, 377 int flags, driver_intr_t *function, void *argument, 378 void **cookiep) 379 { 380 struct ata_pci_controller *controller = device_get_softc(dev); 381 382 if (controller->legacy) { 383 return BUS_SETUP_INTR(device_get_parent(dev), child, irq, 384 flags, function, argument, cookiep, NULL); 385 } 386 else { 387 struct ata_pci_controller *controller = device_get_softc(dev); 388 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 389 390 controller->interrupt[unit].function = function; 391 controller->interrupt[unit].argument = argument; 392 *cookiep = controller; 393 return 0; 394 } 395 } 396 397 int 398 ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, 399 void *cookie) 400 { 401 struct ata_pci_controller *controller = device_get_softc(dev); 402 403 if (controller->legacy) { 404 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie); 405 } 406 else { 407 struct ata_pci_controller *controller = device_get_softc(dev); 408 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 409 410 controller->interrupt[unit].function = NULL; 411 controller->interrupt[unit].argument = NULL; 412 return 0; 413 } 414 } 415 416 int 417 ata_pci_allocate(device_t dev) 418 { 419 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 420 struct ata_channel *ch = device_get_softc(dev); 421 struct resource *io = NULL, *ctlio = NULL; 422 int i, rid; 423 424 rid = ATA_IOADDR_RID; 425 if (!(io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE))) 426 return ENXIO; 427 428 rid = ATA_CTLADDR_RID; 429 if (!(ctlio = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,RF_ACTIVE))){ 430 bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io); 431 return ENXIO; 432 } 433 434 for (i = ATA_DATA; i <= ATA_COMMAND; i ++) { 435 ch->r_io[i].res = io; 436 ch->r_io[i].offset = i; 437 } 438 ch->r_io[ATA_CONTROL].res = ctlio; 439 ch->r_io[ATA_CONTROL].offset = ctlr->legacy ? 0 : 2; 440 ch->r_io[ATA_IDX_ADDR].res = io; 441 ata_default_registers(dev); 442 if (ctlr->r_res1) { 443 for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) { 444 ch->r_io[i].res = ctlr->r_res1; 445 ch->r_io[i].offset = (i - ATA_BMCMD_PORT) + (ch->unit*ATA_BMIOSIZE); 446 } 447 } 448 449 ata_pci_hw(dev); 450 return 0; 451 } 452 453 void 454 ata_pci_hw(device_t dev) 455 { 456 struct ata_channel *ch = device_get_softc(dev); 457 458 ata_generic_hw(dev); 459 ch->hw.status = ata_pci_status; 460 } 461 462 int 463 ata_pci_status(device_t dev) 464 { 465 struct ata_pci_controller *controller = 466 device_get_softc(device_get_parent(dev)); 467 struct ata_channel *ch = device_get_softc(dev); 468 469 if ((dumping || !controller->legacy) && 470 ch->dma && ((ch->flags & ATA_ALWAYS_DMASTAT) || 471 (ch->dma->flags & ATA_DMA_ACTIVE))) { 472 int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 473 474 /* 475 * Strictly speaking the DMA engine should already be stopped 476 * once we receive the interrupt. 477 * However at least ICH controllers seem to have the habbit 478 * of not clearing the active bit even though the interrupt 479 * is valid. 480 * To make sure we wait a little bit (to make sure that other 481 * buggy systems actually have a chance of finishing their 482 * DMA transaction) and then ignore the active bit. 483 */ 484 if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) == 485 (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) { 486 DELAY(100); 487 bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 488 } 489 if ((bmstat & ATA_BMSTAT_INTERRUPT) == 0) 490 return 0; 491 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR); 492 DELAY(1); 493 } 494 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) { 495 DELAY(100); 496 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) 497 return 0; 498 } 499 return 1; 500 } 501 502 static int 503 ata_pci_dmastart(device_t dev) 504 { 505 struct ata_channel *ch = device_get_softc(device_get_parent(dev)); 506 u_int8_t val; 507 508 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) | 509 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); 510 ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, ch->dma->sg_bus); 511 ch->dma->flags |= ATA_DMA_ACTIVE; 512 val = ATA_IDX_INB(ch, ATA_BMCMD_PORT); 513 if (ch->dma->flags & ATA_DMA_READ) 514 val |= ATA_BMCMD_WRITE_READ; 515 else 516 val &= ~ATA_BMCMD_WRITE_READ; 517 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, val); 518 519 /* 520 * Issue the start command separately from configuration setup, 521 * in case the hardware latches portions of the configuration. 522 */ 523 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, val | ATA_BMCMD_START_STOP); 524 525 return 0; 526 } 527 528 static int 529 ata_pci_dmastop(device_t dev) 530 { 531 struct ata_channel *ch = device_get_softc(device_get_parent(dev)); 532 int error; 533 534 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, 535 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 536 ch->dma->flags &= ~ATA_DMA_ACTIVE; 537 error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 538 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); 539 return error; 540 } 541 542 static void 543 ata_pci_dmareset(device_t dev) 544 { 545 struct ata_channel *ch = device_get_softc(dev); 546 547 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, 548 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 549 ch->dma->flags &= ~ATA_DMA_ACTIVE; 550 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); 551 ch->dma->unload(dev); 552 } 553 554 void 555 ata_pci_dmainit(device_t dev) 556 { 557 struct ata_channel *ch = device_get_softc(dev); 558 559 ata_dmainit(dev); 560 if (ch->dma) { 561 ch->dma->start = ata_pci_dmastart; 562 ch->dma->stop = ata_pci_dmastop; 563 ch->dma->reset = ata_pci_dmareset; 564 } 565 } 566 567 char * 568 ata_pcivendor2str(device_t dev) 569 { 570 switch (pci_get_vendor(dev)) { 571 case ATA_ACARD_ID: return "Acard"; 572 case ATA_ACER_LABS_ID: return "AcerLabs"; 573 case ATA_AMD_ID: return "AMD"; 574 case ATA_ATI_ID: return "ATI"; 575 case ATA_CYRIX_ID: return "Cyrix"; 576 case ATA_CYPRESS_ID: return "Cypress"; 577 case ATA_HIGHPOINT_ID: return "HighPoint"; 578 case ATA_INTEL_ID: return "Intel"; 579 case ATA_ITE_ID: return "ITE"; 580 case ATA_JMICRON_ID: return "JMicron"; 581 case ATA_MARVELL_ID: return "Marvell"; 582 case ATA_NATIONAL_ID: return "National"; 583 case ATA_NETCELL_ID: return "Netcell"; 584 case ATA_NVIDIA_ID: return "nVidia"; 585 case ATA_PROMISE_ID: return "Promise"; 586 case ATA_SERVERWORKS_ID: return "ServerWorks"; 587 case ATA_SILICON_IMAGE_ID: return "SiI"; 588 case ATA_SIS_ID: return "SiS"; 589 case ATA_VIA_ID: return "VIA"; 590 case ATA_CENATEK_ID: return "Cenatek"; 591 case ATA_MICRON_ID: return "Micron"; 592 default: return "Generic"; 593 } 594 } 595 596 static device_method_t ata_pci_methods[] = { 597 /* device interface */ 598 DEVMETHOD(device_probe, ata_pci_probe), 599 DEVMETHOD(device_attach, ata_pci_attach), 600 DEVMETHOD(device_detach, ata_pci_detach), 601 DEVMETHOD(device_shutdown, bus_generic_shutdown), 602 DEVMETHOD(device_suspend, bus_generic_suspend), 603 DEVMETHOD(device_resume, bus_generic_resume), 604 605 /* bus methods */ 606 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), 607 DEVMETHOD(bus_release_resource, ata_pci_release_resource), 608 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 609 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 610 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), 611 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), 612 613 { 0, 0 } 614 }; 615 616 devclass_t atapci_devclass; 617 618 static driver_t ata_pci_driver = { 619 "atapci", 620 ata_pci_methods, 621 sizeof(struct ata_pci_controller), 622 }; 623 624 DRIVER_MODULE(atapci, pci, ata_pci_driver, atapci_devclass, 0, 0); 625 MODULE_VERSION(atapci, 1); 626 MODULE_DEPEND(atapci, ata, 1, 1, 1); 627 628 static int 629 ata_pcichannel_probe(device_t dev) 630 { 631 struct ata_channel *ch = device_get_softc(dev); 632 device_t *children; 633 int count, i; 634 char buffer[32]; 635 636 /* take care of green memory */ 637 bzero(ch, sizeof(struct ata_channel)); 638 639 /* find channel number on this controller */ 640 device_get_children(device_get_parent(dev), &children, &count); 641 for (i = 0; i < count; i++) { 642 if (children[i] == dev) 643 ch->unit = i; 644 } 645 kfree(children, M_TEMP); 646 647 ksprintf(buffer, "ATA channel %d", ch->unit); 648 device_set_desc_copy(dev, buffer); 649 650 return ata_probe(dev); 651 } 652 653 static int 654 ata_pcichannel_attach(device_t dev) 655 { 656 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 657 struct ata_channel *ch = device_get_softc(dev); 658 int error; 659 660 if (ctlr->dmainit) 661 ctlr->dmainit(dev); 662 if (ch->dma) 663 ch->dma->alloc(dev); 664 665 if ((error = ctlr->allocate(dev))) { 666 if (ch->dma) 667 ch->dma->free(dev); 668 return error; 669 } 670 671 return ata_attach(dev); 672 } 673 674 static int 675 ata_pcichannel_detach(device_t dev) 676 { 677 struct ata_channel *ch = device_get_softc(dev); 678 int error; 679 680 if ((error = ata_detach(dev))) 681 return error; 682 683 if (ch->dma) 684 ch->dma->free(dev); 685 686 /* XXX SOS free resources for io and ctlio ?? */ 687 688 return 0; 689 } 690 691 static int 692 ata_pcichannel_locking(device_t dev, int mode) 693 { 694 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 695 struct ata_channel *ch = device_get_softc(dev); 696 697 if (ctlr->locking) 698 return ctlr->locking(dev, mode); 699 else 700 return ch->unit; 701 } 702 703 static void 704 ata_pcichannel_reset(device_t dev) 705 { 706 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 707 struct ata_channel *ch = device_get_softc(dev); 708 709 /* if DMA engine present reset it */ 710 if (ch->dma) { 711 if (ch->dma->reset) 712 ch->dma->reset(dev); 713 ch->dma->unload(dev); 714 } 715 716 /* reset the controller HW */ 717 if (ctlr->reset) 718 ctlr->reset(dev); 719 else 720 ata_generic_reset(dev); 721 } 722 723 static void 724 ata_pcichannel_setmode(device_t parent, device_t dev) 725 { 726 struct ata_pci_controller *ctlr = device_get_softc(GRANDPARENT(dev)); 727 struct ata_device *atadev = device_get_softc(dev); 728 int mode = atadev->mode; 729 730 ctlr->setmode(dev, ATA_PIO_MAX); 731 if (mode >= ATA_DMA) 732 ctlr->setmode(dev, mode); 733 } 734 735 static device_method_t ata_pcichannel_methods[] = { 736 /* device interface */ 737 DEVMETHOD(device_probe, ata_pcichannel_probe), 738 DEVMETHOD(device_attach, ata_pcichannel_attach), 739 DEVMETHOD(device_detach, ata_pcichannel_detach), 740 DEVMETHOD(device_shutdown, bus_generic_shutdown), 741 DEVMETHOD(device_suspend, ata_suspend), 742 DEVMETHOD(device_resume, ata_resume), 743 744 /* ATA methods */ 745 DEVMETHOD(ata_setmode, ata_pcichannel_setmode), 746 DEVMETHOD(ata_locking, ata_pcichannel_locking), 747 DEVMETHOD(ata_reset, ata_pcichannel_reset), 748 749 { 0, 0 } 750 }; 751 752 driver_t ata_pcichannel_driver = { 753 "ata", 754 ata_pcichannel_methods, 755 sizeof(struct ata_channel), 756 }; 757 758 DRIVER_MODULE(ata, atapci, ata_pcichannel_driver, ata_devclass, 0, 0); 759