1 /*- 2 * Copyright (c) 1998 - 2006 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/dev/ata/ata-pci.c,v 1.121 2007/02/23 12:18:33 piso Exp $ 27 */ 28 29 #include "opt_ata.h" 30 31 #include <sys/param.h> 32 #include <sys/bus.h> 33 #include <sys/bus_resource.h> 34 #include <sys/module.h> 35 #include <sys/nata.h> 36 #include <sys/rman.h> 37 #include <sys/systm.h> 38 #include <sys/machintr.h> 39 40 #include <bus/pci/pcireg.h> 41 #include <bus/pci/pcivar.h> 42 43 #include "ata-all.h" 44 #include "ata-pci.h" 45 #include "ata_if.h" 46 47 /* misc defines */ 48 #define IOMASK 0xfffffffc 49 #define ATA_PROBE_OK -10 50 51 static const struct none_atapci { 52 uint16_t vendor; 53 uint16_t device; 54 uint16_t subvendor; 55 uint16_t subdevice; 56 } none_atapci_table[] = { 57 /* Appears on Intel PRO/1000 PM */ 58 { ATA_INTEL_ID, 0x108d, ATA_INTEL_ID, 0x0000 }, 59 { 0xffff, 0, 0, 0 } 60 }; 61 62 int 63 ata_legacy(device_t dev) 64 { 65 return (((pci_read_config(dev, PCIR_PROGIF, 1)&PCIP_STORAGE_IDE_MASTERDEV)&& 66 ((pci_read_config(dev, PCIR_PROGIF, 1) & 67 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC)) != 68 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC))) || 69 (!pci_read_config(dev, PCIR_BAR(0), 4) && 70 !pci_read_config(dev, PCIR_BAR(1), 4) && 71 !pci_read_config(dev, PCIR_BAR(2), 4) && 72 !pci_read_config(dev, PCIR_BAR(3), 4) && 73 !pci_read_config(dev, PCIR_BAR(5), 4))); 74 } 75 76 int 77 ata_pci_probe(device_t dev) 78 { 79 if (pci_get_class(dev) != PCIC_STORAGE) 80 return ENXIO; 81 82 /* if this is an AHCI chipset grab it */ 83 if (pci_get_subclass(dev) == PCIS_STORAGE_SATA) { 84 if (!ata_ahci_ident(dev)) 85 return ATA_PROBE_OK; 86 } 87 88 /* run through the vendor specific drivers */ 89 switch (pci_get_vendor(dev)) { 90 case ATA_ACARD_ID: 91 if (!ata_acard_ident(dev)) 92 return ATA_PROBE_OK; 93 break; 94 case ATA_ACER_LABS_ID: 95 if (!ata_ali_ident(dev)) 96 return ATA_PROBE_OK; 97 break; 98 case ATA_AMD_ID: 99 if (!ata_amd_ident(dev)) 100 return ATA_PROBE_OK; 101 break; 102 case ATA_ATI_ID: 103 if (!ata_ati_ident(dev)) 104 return ATA_PROBE_OK; 105 break; 106 case ATA_CYRIX_ID: 107 if (!ata_cyrix_ident(dev)) 108 return ATA_PROBE_OK; 109 break; 110 case ATA_CYPRESS_ID: 111 if (!ata_cypress_ident(dev)) 112 return ATA_PROBE_OK; 113 break; 114 case ATA_HIGHPOINT_ID: 115 if (!ata_highpoint_ident(dev)) 116 return ATA_PROBE_OK; 117 break; 118 case ATA_INTEL_ID: 119 if (!ata_intel_ident(dev)) 120 return ATA_PROBE_OK; 121 break; 122 case ATA_ITE_ID: 123 if (!ata_ite_ident(dev)) 124 return ATA_PROBE_OK; 125 break; 126 case ATA_JMICRON_ID: 127 if (!ata_jmicron_ident(dev)) 128 return ATA_PROBE_OK; 129 break; 130 case ATA_MARVELL_ID: 131 if (!ata_marvell_ident(dev)) 132 return ATA_PROBE_OK; 133 break; 134 case ATA_NATIONAL_ID: 135 if (!ata_national_ident(dev)) 136 return ATA_PROBE_OK; 137 break; 138 case ATA_NETCELL_ID: 139 if (!ata_netcell_ident(dev)) 140 return ATA_PROBE_OK; 141 break; 142 case ATA_NVIDIA_ID: 143 if (!ata_nvidia_ident(dev)) 144 return ATA_PROBE_OK; 145 break; 146 case ATA_PROMISE_ID: 147 if (!ata_promise_ident(dev)) 148 return ATA_PROBE_OK; 149 break; 150 case ATA_SERVERWORKS_ID: 151 if (!ata_serverworks_ident(dev)) 152 return ATA_PROBE_OK; 153 break; 154 case ATA_SILICON_IMAGE_ID: 155 if (!ata_sii_ident(dev)) 156 return ATA_PROBE_OK; 157 break; 158 case ATA_SIS_ID: 159 if (!ata_sis_ident(dev)) 160 return ATA_PROBE_OK; 161 break; 162 case ATA_VIA_ID: 163 if (!ata_via_ident(dev)) 164 return ATA_PROBE_OK; 165 break; 166 case ATA_CENATEK_ID: 167 if (pci_get_devid(dev) == ATA_CENATEK_ROCKET) { 168 ata_generic_ident(dev); 169 device_set_desc(dev, "Cenatek Rocket Drive controller"); 170 return ATA_PROBE_OK; 171 } 172 break; 173 case ATA_MICRON_ID: 174 if (pci_get_devid(dev) == ATA_MICRON_RZ1000 || 175 pci_get_devid(dev) == ATA_MICRON_RZ1001) { 176 ata_generic_ident(dev); 177 device_set_desc(dev, 178 "RZ 100? ATA controller !WARNING! data loss/corruption risk"); 179 return ATA_PROBE_OK; 180 } 181 break; 182 } 183 184 /* unknown chipset, try generic AHCI or DMA if it seems possible */ 185 if (pci_get_subclass(dev) == PCIS_STORAGE_IDE) { 186 uint16_t vendor, device, subvendor, subdevice; 187 const struct none_atapci *e; 188 189 vendor = pci_get_vendor(dev); 190 device = pci_get_device(dev); 191 subvendor = pci_get_subvendor(dev); 192 subdevice = pci_get_subdevice(dev); 193 for (e = none_atapci_table; e->vendor != 0xffff; ++e) { 194 if (e->vendor == vendor && e->device == device && 195 e->subvendor == subvendor && e->subdevice == subdevice) 196 return ENXIO; 197 } 198 199 if (!ata_generic_ident(dev)) 200 return ATA_PROBE_OK; 201 } 202 return ENXIO; 203 } 204 205 int 206 ata_pci_attach(device_t dev) 207 { 208 struct ata_pci_controller *ctlr = device_get_softc(dev); 209 u_int32_t cmd; 210 int unit; 211 212 /* do chipset specific setups only needed once */ 213 ctlr->legacy = ata_legacy(dev); 214 if (ctlr->legacy || pci_read_config(dev, PCIR_BAR(2), 4) & IOMASK) 215 ctlr->channels = 2; 216 else 217 ctlr->channels = 1; 218 ctlr->allocate = ata_pci_allocate; 219 ctlr->dev = dev; 220 221 /* if needed try to enable busmastering */ 222 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 223 if (!(cmd & PCIM_CMD_BUSMASTEREN)) { 224 pci_write_config(dev, PCIR_COMMAND, cmd | PCIM_CMD_BUSMASTEREN, 2); 225 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 226 } 227 228 /* if busmastering mode "stuck" use it */ 229 if ((cmd & PCIM_CMD_BUSMASTEREN) == PCIM_CMD_BUSMASTEREN) { 230 ctlr->r_type1 = SYS_RES_IOPORT; 231 ctlr->r_rid1 = ATA_BMADDR_RID; 232 ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1, &ctlr->r_rid1, 233 RF_ACTIVE); 234 /* Only set a dma init function if the device actually supports it. */ 235 ctlr->dmainit = ata_pci_dmainit; 236 } 237 238 if (ctlr->chipinit(dev)) 239 return ENXIO; 240 241 /* attach all channels on this controller */ 242 for (unit = 0; unit < ctlr->channels; unit++) { 243 int freeunit = 2; 244 if ((unit == 0 || unit == 1) && ctlr->legacy) { 245 device_add_child(dev, "ata", unit); 246 continue; 247 } 248 /* XXX TGEN devclass_find_free_unit() implementation */ 249 while (freeunit < devclass_get_maxunit(ata_devclass) && 250 devclass_get_device(ata_devclass, freeunit) != NULL) 251 freeunit++; 252 device_add_child(dev, "ata", freeunit); 253 } 254 bus_generic_attach(dev); 255 return 0; 256 } 257 258 int 259 ata_pci_detach(device_t dev) 260 { 261 struct ata_pci_controller *ctlr = device_get_softc(dev); 262 device_t *children; 263 int nchildren, i; 264 265 /* detach & delete all children */ 266 if (!device_get_children(dev, &children, &nchildren)) { 267 for (i = 0; i < nchildren; i++) 268 device_delete_child(dev, children[i]); 269 kfree(children, M_TEMP); 270 } 271 272 if (ctlr->r_irq) { 273 bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle); 274 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ctlr->r_irq); 275 ctlr->r_irq = NULL; 276 } 277 if (ctlr->r_res2) { 278 bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2); 279 ctlr->r_res2 = NULL; 280 } 281 if (ctlr->r_res1) { 282 bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1, ctlr->r_res1); 283 ctlr->r_res1 = NULL; 284 } 285 286 return 0; 287 } 288 289 struct resource * 290 ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, 291 u_long start, u_long end, u_long count, u_int flags, int cpuid) 292 { 293 struct ata_pci_controller *controller = device_get_softc(dev); 294 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 295 struct resource *res = NULL; 296 int myrid; 297 298 if (type == SYS_RES_IOPORT) { 299 switch (*rid) { 300 case ATA_IOADDR_RID: 301 if (controller->legacy) { 302 start = (unit ? ATA_SECONDARY : ATA_PRIMARY); 303 count = ATA_IOSIZE; 304 end = start + count - 1; 305 } 306 myrid = PCIR_BAR(0) + (unit << 3); 307 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 308 SYS_RES_IOPORT, &myrid, 309 start, end, count, flags, cpuid); 310 break; 311 312 case ATA_CTLADDR_RID: 313 if (controller->legacy) { 314 start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + ATA_CTLOFFSET; 315 count = ATA_CTLIOSIZE; 316 end = start + count - 1; 317 } 318 myrid = PCIR_BAR(1) + (unit << 3); 319 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 320 SYS_RES_IOPORT, &myrid, 321 start, end, count, flags, cpuid); 322 break; 323 } 324 } 325 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) { 326 if (controller->legacy) { 327 int irq = (unit == 0 ? 14 : 15); 328 329 cpuid = machintr_legacy_intr_cpuid(irq); 330 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 331 SYS_RES_IRQ, rid, irq, irq, 1, flags, 332 cpuid); 333 } 334 else 335 res = controller->r_irq; 336 } 337 return res; 338 } 339 340 int 341 ata_pci_release_resource(device_t dev, device_t child, int type, int rid, 342 struct resource *r) 343 { 344 struct ata_pci_controller *controller = device_get_softc(dev); 345 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 346 347 if (type == SYS_RES_IOPORT) { 348 switch (rid) { 349 case ATA_IOADDR_RID: 350 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 351 SYS_RES_IOPORT, 352 PCIR_BAR(0) + (unit << 3), r); 353 break; 354 355 case ATA_CTLADDR_RID: 356 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 357 SYS_RES_IOPORT, 358 PCIR_BAR(1) + (unit << 3), r); 359 break; 360 default: 361 return ENOENT; 362 } 363 } 364 if (type == SYS_RES_IRQ) { 365 if (rid != ATA_IRQ_RID) 366 return ENOENT; 367 368 if (controller->legacy) { 369 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 370 SYS_RES_IRQ, rid, r); 371 } 372 else 373 return 0; 374 } 375 return EINVAL; 376 } 377 378 int 379 ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq, 380 int flags, driver_intr_t *function, void *argument, 381 void **cookiep) 382 { 383 struct ata_pci_controller *controller = device_get_softc(dev); 384 385 if (controller->legacy) { 386 return BUS_SETUP_INTR(device_get_parent(dev), child, irq, 387 flags, function, argument, cookiep, NULL, NULL); 388 } 389 else { 390 struct ata_pci_controller *controller = device_get_softc(dev); 391 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 392 393 controller->interrupt[unit].function = function; 394 controller->interrupt[unit].argument = argument; 395 *cookiep = controller; 396 return 0; 397 } 398 } 399 400 int 401 ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, 402 void *cookie) 403 { 404 struct ata_pci_controller *controller = device_get_softc(dev); 405 406 if (controller->legacy) { 407 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie); 408 } 409 else { 410 struct ata_pci_controller *controller = device_get_softc(dev); 411 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 412 413 controller->interrupt[unit].function = NULL; 414 controller->interrupt[unit].argument = NULL; 415 return 0; 416 } 417 } 418 419 int 420 ata_pci_allocate(device_t dev) 421 { 422 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 423 struct ata_channel *ch = device_get_softc(dev); 424 struct resource *io = NULL, *ctlio = NULL; 425 int i, rid; 426 427 rid = ATA_IOADDR_RID; 428 if (!(io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE))) 429 return ENXIO; 430 431 rid = ATA_CTLADDR_RID; 432 if (!(ctlio = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,RF_ACTIVE))){ 433 bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io); 434 return ENXIO; 435 } 436 437 for (i = ATA_DATA; i <= ATA_COMMAND; i ++) { 438 ch->r_io[i].res = io; 439 ch->r_io[i].offset = i; 440 } 441 ch->r_io[ATA_CONTROL].res = ctlio; 442 ch->r_io[ATA_CONTROL].offset = ctlr->legacy ? 0 : 2; 443 ch->r_io[ATA_IDX_ADDR].res = io; 444 ata_default_registers(dev); 445 if (ctlr->r_res1) { 446 for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) { 447 ch->r_io[i].res = ctlr->r_res1; 448 ch->r_io[i].offset = (i - ATA_BMCMD_PORT) + (ch->unit*ATA_BMIOSIZE); 449 } 450 } 451 452 ata_pci_hw(dev); 453 return 0; 454 } 455 456 void 457 ata_pci_hw(device_t dev) 458 { 459 struct ata_channel *ch = device_get_softc(dev); 460 461 ata_generic_hw(dev); 462 ch->hw.status = ata_pci_status; 463 } 464 465 int 466 ata_pci_status(device_t dev) 467 { 468 struct ata_pci_controller *controller = 469 device_get_softc(device_get_parent(dev)); 470 struct ata_channel *ch = device_get_softc(dev); 471 472 if ((dumping || !controller->legacy) && 473 ch->dma && ((ch->flags & ATA_ALWAYS_DMASTAT) || 474 (ch->dma->flags & ATA_DMA_ACTIVE))) { 475 int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 476 477 /* 478 * Strictly speaking the DMA engine should already be stopped 479 * once we receive the interrupt. 480 * However at least ICH controllers seem to have the habbit 481 * of not clearing the active bit even though the interrupt 482 * is valid. 483 * To make sure we wait a little bit (to make sure that other 484 * buggy systems actually have a chance of finishing their 485 * DMA transaction) and then ignore the active bit. 486 */ 487 if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) == 488 (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) { 489 DELAY(100); 490 bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 491 } 492 if ((bmstat & ATA_BMSTAT_INTERRUPT) == 0) 493 return 0; 494 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR); 495 DELAY(1); 496 } 497 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) { 498 DELAY(100); 499 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) 500 return 0; 501 } 502 return 1; 503 } 504 505 static int 506 ata_pci_dmastart(device_t dev) 507 { 508 struct ata_channel *ch = device_get_softc(device_get_parent(dev)); 509 u_int8_t val; 510 511 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) | 512 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); 513 ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, ch->dma->sg_bus); 514 ch->dma->flags |= ATA_DMA_ACTIVE; 515 val = ATA_IDX_INB(ch, ATA_BMCMD_PORT); 516 if (ch->dma->flags & ATA_DMA_READ) 517 val |= ATA_BMCMD_WRITE_READ; 518 else 519 val &= ~ATA_BMCMD_WRITE_READ; 520 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, val); 521 522 /* 523 * Issue the start command separately from configuration setup, 524 * in case the hardware latches portions of the configuration. 525 */ 526 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, val | ATA_BMCMD_START_STOP); 527 528 return 0; 529 } 530 531 static int 532 ata_pci_dmastop(device_t dev) 533 { 534 struct ata_channel *ch = device_get_softc(device_get_parent(dev)); 535 int error; 536 537 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, 538 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 539 ch->dma->flags &= ~ATA_DMA_ACTIVE; 540 error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 541 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); 542 return error; 543 } 544 545 static void 546 ata_pci_dmareset(device_t dev) 547 { 548 struct ata_channel *ch = device_get_softc(dev); 549 550 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, 551 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 552 ch->dma->flags &= ~ATA_DMA_ACTIVE; 553 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); 554 ch->dma->unload(dev); 555 } 556 557 void 558 ata_pci_dmainit(device_t dev) 559 { 560 struct ata_channel *ch = device_get_softc(dev); 561 562 ata_dmainit(dev); 563 if (ch->dma) { 564 ch->dma->start = ata_pci_dmastart; 565 ch->dma->stop = ata_pci_dmastop; 566 ch->dma->reset = ata_pci_dmareset; 567 } 568 } 569 570 char * 571 ata_pcivendor2str(device_t dev) 572 { 573 switch (pci_get_vendor(dev)) { 574 case ATA_ACARD_ID: return "Acard"; 575 case ATA_ACER_LABS_ID: return "AcerLabs"; 576 case ATA_AMD_ID: return "AMD"; 577 case ATA_ATI_ID: return "ATI"; 578 case ATA_CYRIX_ID: return "Cyrix"; 579 case ATA_CYPRESS_ID: return "Cypress"; 580 case ATA_HIGHPOINT_ID: return "HighPoint"; 581 case ATA_INTEL_ID: return "Intel"; 582 case ATA_ITE_ID: return "ITE"; 583 case ATA_JMICRON_ID: return "JMicron"; 584 case ATA_MARVELL_ID: return "Marvell"; 585 case ATA_NATIONAL_ID: return "National"; 586 case ATA_NETCELL_ID: return "Netcell"; 587 case ATA_NVIDIA_ID: return "nVidia"; 588 case ATA_PROMISE_ID: return "Promise"; 589 case ATA_SERVERWORKS_ID: return "ServerWorks"; 590 case ATA_SILICON_IMAGE_ID: return "SiI"; 591 case ATA_SIS_ID: return "SiS"; 592 case ATA_VIA_ID: return "VIA"; 593 case ATA_CENATEK_ID: return "Cenatek"; 594 case ATA_MICRON_ID: return "Micron"; 595 default: return "Generic"; 596 } 597 } 598 599 static device_method_t ata_pci_methods[] = { 600 /* device interface */ 601 DEVMETHOD(device_probe, ata_pci_probe), 602 DEVMETHOD(device_attach, ata_pci_attach), 603 DEVMETHOD(device_detach, ata_pci_detach), 604 DEVMETHOD(device_shutdown, bus_generic_shutdown), 605 DEVMETHOD(device_suspend, bus_generic_suspend), 606 DEVMETHOD(device_resume, bus_generic_resume), 607 608 /* bus methods */ 609 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), 610 DEVMETHOD(bus_release_resource, ata_pci_release_resource), 611 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 612 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 613 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), 614 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), 615 616 DEVMETHOD_END 617 }; 618 619 devclass_t atapci_devclass; 620 621 static driver_t ata_pci_driver = { 622 "atapci", 623 ata_pci_methods, 624 sizeof(struct ata_pci_controller), 625 }; 626 627 DRIVER_MODULE(atapci, pci, ata_pci_driver, atapci_devclass, NULL, NULL); 628 MODULE_VERSION(atapci, 1); 629 MODULE_DEPEND(atapci, ata, 1, 1, 1); 630 631 static int 632 ata_pcichannel_probe(device_t dev) 633 { 634 struct ata_channel *ch = device_get_softc(dev); 635 device_t *children; 636 int count, i; 637 char buffer[32]; 638 639 /* take care of green memory */ 640 bzero(ch, sizeof(struct ata_channel)); 641 642 /* find channel number on this controller */ 643 device_get_children(device_get_parent(dev), &children, &count); 644 for (i = 0; i < count; i++) { 645 if (children[i] == dev) 646 ch->unit = i; 647 } 648 kfree(children, M_TEMP); 649 650 ksprintf(buffer, "ATA channel %d", ch->unit); 651 device_set_desc_copy(dev, buffer); 652 653 return ata_probe(dev); 654 } 655 656 static int 657 ata_pcichannel_attach(device_t dev) 658 { 659 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 660 struct ata_channel *ch = device_get_softc(dev); 661 int error; 662 663 if (ctlr->dmainit) 664 ctlr->dmainit(dev); 665 if (ch->dma) 666 ch->dma->alloc(dev); 667 668 if ((error = ctlr->allocate(dev))) { 669 if (ch->dma) 670 ch->dma->free(dev); 671 return error; 672 } 673 674 return ata_attach(dev); 675 } 676 677 static int 678 ata_pcichannel_detach(device_t dev) 679 { 680 struct ata_channel *ch = device_get_softc(dev); 681 int error; 682 683 if ((error = ata_detach(dev))) 684 return error; 685 686 if (ch->dma) 687 ch->dma->free(dev); 688 689 /* XXX SOS free resources for io and ctlio ?? */ 690 691 return 0; 692 } 693 694 static int 695 ata_pcichannel_locking(device_t dev, int mode) 696 { 697 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 698 struct ata_channel *ch = device_get_softc(dev); 699 700 if (ctlr->locking) 701 return ctlr->locking(dev, mode); 702 else 703 return ch->unit; 704 } 705 706 static void 707 ata_pcichannel_reset(device_t dev) 708 { 709 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 710 struct ata_channel *ch = device_get_softc(dev); 711 712 /* if DMA engine present reset it */ 713 if (ch->dma) { 714 if (ch->dma->reset) 715 ch->dma->reset(dev); 716 ch->dma->unload(dev); 717 } 718 719 /* reset the controller HW */ 720 if (ctlr->reset) 721 ctlr->reset(dev); 722 else 723 ata_generic_reset(dev); 724 } 725 726 static void 727 ata_pcichannel_setmode(device_t parent, device_t dev) 728 { 729 struct ata_pci_controller *ctlr = device_get_softc(GRANDPARENT(dev)); 730 struct ata_device *atadev = device_get_softc(dev); 731 int mode = atadev->mode; 732 733 ctlr->setmode(dev, ATA_PIO_MAX); 734 if (mode >= ATA_DMA) 735 ctlr->setmode(dev, mode); 736 } 737 738 static device_method_t ata_pcichannel_methods[] = { 739 /* device interface */ 740 DEVMETHOD(device_probe, ata_pcichannel_probe), 741 DEVMETHOD(device_attach, ata_pcichannel_attach), 742 DEVMETHOD(device_detach, ata_pcichannel_detach), 743 DEVMETHOD(device_shutdown, bus_generic_shutdown), 744 DEVMETHOD(device_suspend, ata_suspend), 745 DEVMETHOD(device_resume, ata_resume), 746 747 /* ATA methods */ 748 DEVMETHOD(ata_setmode, ata_pcichannel_setmode), 749 DEVMETHOD(ata_locking, ata_pcichannel_locking), 750 DEVMETHOD(ata_reset, ata_pcichannel_reset), 751 752 DEVMETHOD_END 753 }; 754 755 driver_t ata_pcichannel_driver = { 756 "ata", 757 ata_pcichannel_methods, 758 sizeof(struct ata_channel), 759 }; 760 761 DRIVER_MODULE(ata, atapci, ata_pcichannel_driver, ata_devclass, NULL, NULL); 762