xref: /dragonfly/sys/dev/drm/drm_edid.c (revision 31524921)
1 /*
2  * Copyright (c) 2006 Luc Verhaegen (quirks list)
3  * Copyright (c) 2007-2008 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  * Copyright 2010 Red Hat, Inc.
6  *
7  * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8  * FB layer.
9  *   Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10  *
11  * Permission is hereby granted, free of charge, to any person obtaining a
12  * copy of this software and associated documentation files (the "Software"),
13  * to deal in the Software without restriction, including without limitation
14  * the rights to use, copy, modify, merge, publish, distribute, sub license,
15  * and/or sell copies of the Software, and to permit persons to whom the
16  * Software is furnished to do so, subject to the following conditions:
17  *
18  * The above copyright notice and this permission notice (including the
19  * next paragraph) shall be included in all copies or substantial portions
20  * of the Software.
21  *
22  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28  * DEALINGS IN THE SOFTWARE.
29  */
30 #include <linux/kernel.h>
31 #include <linux/hdmi.h>
32 #include <linux/i2c.h>
33 #include <linux/module.h>
34 #include <drm/drmP.h>
35 #include <drm/drm_edid.h>
36 #include <linux/string.h>
37 
38 #include <bus/iicbus/iic.h>
39 #include <bus/iicbus/iiconf.h>
40 #include "iicbus_if.h"
41 
42 #define version_greater(edid, maj, min) \
43 	(((edid)->version > (maj)) || \
44 	 ((edid)->version == (maj) && (edid)->revision > (min)))
45 
46 #define EDID_EST_TIMINGS 16
47 #define EDID_STD_TIMINGS 8
48 #define EDID_DETAILED_TIMINGS 4
49 
50 /*
51  * EDID blocks out in the wild have a variety of bugs, try to collect
52  * them here (note that userspace may work around broken monitors first,
53  * but fixes should make their way here so that the kernel "just works"
54  * on as many displays as possible).
55  */
56 
57 /* First detailed mode wrong, use largest 60Hz mode */
58 #define EDID_QUIRK_PREFER_LARGE_60		(1 << 0)
59 /* Reported 135MHz pixel clock is too high, needs adjustment */
60 #define EDID_QUIRK_135_CLOCK_TOO_HIGH		(1 << 1)
61 /* Prefer the largest mode at 75 Hz */
62 #define EDID_QUIRK_PREFER_LARGE_75		(1 << 2)
63 /* Detail timing is in cm not mm */
64 #define EDID_QUIRK_DETAILED_IN_CM		(1 << 3)
65 /* Detailed timing descriptors have bogus size values, so just take the
66  * maximum size and use that.
67  */
68 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE	(1 << 4)
69 /* Monitor forgot to set the first detailed is preferred bit. */
70 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED	(1 << 5)
71 /* use +hsync +vsync for detailed mode */
72 #define EDID_QUIRK_DETAILED_SYNC_PP		(1 << 6)
73 /* Force reduced-blanking timings for detailed modes */
74 #define EDID_QUIRK_FORCE_REDUCED_BLANKING	(1 << 7)
75 /* Force 8bpc */
76 #define EDID_QUIRK_FORCE_8BPC			(1 << 8)
77 /* Force 12bpc */
78 #define EDID_QUIRK_FORCE_12BPC			(1 << 9)
79 
80 struct detailed_mode_closure {
81 	struct drm_connector *connector;
82 	struct edid *edid;
83 	bool preferred;
84 	u32 quirks;
85 	int modes;
86 };
87 
88 #define LEVEL_DMT	0
89 #define LEVEL_GTF	1
90 #define LEVEL_GTF2	2
91 #define LEVEL_CVT	3
92 
93 static struct edid_quirk {
94 	char vendor[4];
95 	int product_id;
96 	u32 quirks;
97 } edid_quirk_list[] = {
98 	/* Acer AL1706 */
99 	{ "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
100 	/* Acer F51 */
101 	{ "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
102 	/* Unknown Acer */
103 	{ "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
104 
105 	/* Belinea 10 15 55 */
106 	{ "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
107 	{ "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
108 
109 	/* Envision Peripherals, Inc. EN-7100e */
110 	{ "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
111 	/* Envision EN2028 */
112 	{ "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
113 
114 	/* Funai Electronics PM36B */
115 	{ "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
116 	  EDID_QUIRK_DETAILED_IN_CM },
117 
118 	/* LG Philips LCD LP154W01-A5 */
119 	{ "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
120 	{ "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
121 
122 	/* Philips 107p5 CRT */
123 	{ "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
124 
125 	/* Proview AY765C */
126 	{ "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
127 
128 	/* Samsung SyncMaster 205BW.  Note: irony */
129 	{ "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
130 	/* Samsung SyncMaster 22[5-6]BW */
131 	{ "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
132 	{ "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
133 
134 	/* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
135 	{ "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
136 
137 	/* ViewSonic VA2026w */
138 	{ "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
139 
140 	/* Medion MD 30217 PG */
141 	{ "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
142 
143 	/* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
144 	{ "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
145 };
146 
147 /*
148  * Autogenerated from the DMT spec.
149  * This table is copied from xfree86/modes/xf86EdidModes.c.
150  */
151 static const struct drm_display_mode drm_dmt_modes[] = {
152 	/* 640x350@85Hz */
153 	{ DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
154 		   736, 832, 0, 350, 382, 385, 445, 0,
155 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
156 	/* 640x400@85Hz */
157 	{ DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
158 		   736, 832, 0, 400, 401, 404, 445, 0,
159 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
160 	/* 720x400@85Hz */
161 	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
162 		   828, 936, 0, 400, 401, 404, 446, 0,
163 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
164 	/* 640x480@60Hz */
165 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
166 		   752, 800, 0, 480, 489, 492, 525, 0,
167 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
168 	/* 640x480@72Hz */
169 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
170 		   704, 832, 0, 480, 489, 492, 520, 0,
171 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
172 	/* 640x480@75Hz */
173 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
174 		   720, 840, 0, 480, 481, 484, 500, 0,
175 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
176 	/* 640x480@85Hz */
177 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
178 		   752, 832, 0, 480, 481, 484, 509, 0,
179 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
180 	/* 800x600@56Hz */
181 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
182 		   896, 1024, 0, 600, 601, 603, 625, 0,
183 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
184 	/* 800x600@60Hz */
185 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
186 		   968, 1056, 0, 600, 601, 605, 628, 0,
187 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
188 	/* 800x600@72Hz */
189 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
190 		   976, 1040, 0, 600, 637, 643, 666, 0,
191 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
192 	/* 800x600@75Hz */
193 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
194 		   896, 1056, 0, 600, 601, 604, 625, 0,
195 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
196 	/* 800x600@85Hz */
197 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
198 		   896, 1048, 0, 600, 601, 604, 631, 0,
199 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
200 	/* 800x600@120Hz RB */
201 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
202 		   880, 960, 0, 600, 603, 607, 636, 0,
203 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
204 	/* 848x480@60Hz */
205 	{ DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
206 		   976, 1088, 0, 480, 486, 494, 517, 0,
207 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
208 	/* 1024x768@43Hz, interlace */
209 	{ DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
210 		   1208, 1264, 0, 768, 768, 772, 817, 0,
211 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
212 			DRM_MODE_FLAG_INTERLACE) },
213 	/* 1024x768@60Hz */
214 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
215 		   1184, 1344, 0, 768, 771, 777, 806, 0,
216 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
217 	/* 1024x768@70Hz */
218 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
219 		   1184, 1328, 0, 768, 771, 777, 806, 0,
220 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
221 	/* 1024x768@75Hz */
222 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
223 		   1136, 1312, 0, 768, 769, 772, 800, 0,
224 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
225 	/* 1024x768@85Hz */
226 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
227 		   1168, 1376, 0, 768, 769, 772, 808, 0,
228 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
229 	/* 1024x768@120Hz RB */
230 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
231 		   1104, 1184, 0, 768, 771, 775, 813, 0,
232 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
233 	/* 1152x864@75Hz */
234 	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
235 		   1344, 1600, 0, 864, 865, 868, 900, 0,
236 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
237 	/* 1280x768@60Hz RB */
238 	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
239 		   1360, 1440, 0, 768, 771, 778, 790, 0,
240 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
241 	/* 1280x768@60Hz */
242 	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
243 		   1472, 1664, 0, 768, 771, 778, 798, 0,
244 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
245 	/* 1280x768@75Hz */
246 	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
247 		   1488, 1696, 0, 768, 771, 778, 805, 0,
248 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
249 	/* 1280x768@85Hz */
250 	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
251 		   1496, 1712, 0, 768, 771, 778, 809, 0,
252 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
253 	/* 1280x768@120Hz RB */
254 	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
255 		   1360, 1440, 0, 768, 771, 778, 813, 0,
256 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
257 	/* 1280x800@60Hz RB */
258 	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
259 		   1360, 1440, 0, 800, 803, 809, 823, 0,
260 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
261 	/* 1280x800@60Hz */
262 	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
263 		   1480, 1680, 0, 800, 803, 809, 831, 0,
264 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
265 	/* 1280x800@75Hz */
266 	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
267 		   1488, 1696, 0, 800, 803, 809, 838, 0,
268 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
269 	/* 1280x800@85Hz */
270 	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
271 		   1496, 1712, 0, 800, 803, 809, 843, 0,
272 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
273 	/* 1280x800@120Hz RB */
274 	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
275 		   1360, 1440, 0, 800, 803, 809, 847, 0,
276 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
277 	/* 1280x960@60Hz */
278 	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
279 		   1488, 1800, 0, 960, 961, 964, 1000, 0,
280 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
281 	/* 1280x960@85Hz */
282 	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
283 		   1504, 1728, 0, 960, 961, 964, 1011, 0,
284 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
285 	/* 1280x960@120Hz RB */
286 	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
287 		   1360, 1440, 0, 960, 963, 967, 1017, 0,
288 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
289 	/* 1280x1024@60Hz */
290 	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
291 		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
292 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
293 	/* 1280x1024@75Hz */
294 	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
295 		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
296 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
297 	/* 1280x1024@85Hz */
298 	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
299 		   1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
300 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
301 	/* 1280x1024@120Hz RB */
302 	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
303 		   1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
304 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
305 	/* 1360x768@60Hz */
306 	{ DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
307 		   1536, 1792, 0, 768, 771, 777, 795, 0,
308 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
309 	/* 1360x768@120Hz RB */
310 	{ DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
311 		   1440, 1520, 0, 768, 771, 776, 813, 0,
312 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
313 	/* 1400x1050@60Hz RB */
314 	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
315 		   1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
316 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
317 	/* 1400x1050@60Hz */
318 	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
319 		   1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
320 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
321 	/* 1400x1050@75Hz */
322 	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
323 		   1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
324 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
325 	/* 1400x1050@85Hz */
326 	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
327 		   1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
328 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
329 	/* 1400x1050@120Hz RB */
330 	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
331 		   1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
332 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
333 	/* 1440x900@60Hz RB */
334 	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
335 		   1520, 1600, 0, 900, 903, 909, 926, 0,
336 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
337 	/* 1440x900@60Hz */
338 	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
339 		   1672, 1904, 0, 900, 903, 909, 934, 0,
340 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
341 	/* 1440x900@75Hz */
342 	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
343 		   1688, 1936, 0, 900, 903, 909, 942, 0,
344 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
345 	/* 1440x900@85Hz */
346 	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
347 		   1696, 1952, 0, 900, 903, 909, 948, 0,
348 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
349 	/* 1440x900@120Hz RB */
350 	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
351 		   1520, 1600, 0, 900, 903, 909, 953, 0,
352 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
353 	/* 1600x1200@60Hz */
354 	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
355 		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
356 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
357 	/* 1600x1200@65Hz */
358 	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
359 		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
360 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
361 	/* 1600x1200@70Hz */
362 	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
363 		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
364 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
365 	/* 1600x1200@75Hz */
366 	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
367 		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
368 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
369 	/* 1600x1200@85Hz */
370 	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
371 		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
372 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
373 	/* 1600x1200@120Hz RB */
374 	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
375 		   1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
376 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
377 	/* 1680x1050@60Hz RB */
378 	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
379 		   1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
380 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
381 	/* 1680x1050@60Hz */
382 	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
383 		   1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
384 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
385 	/* 1680x1050@75Hz */
386 	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
387 		   1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
388 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
389 	/* 1680x1050@85Hz */
390 	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
391 		   1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
392 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
393 	/* 1680x1050@120Hz RB */
394 	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
395 		   1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
396 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
397 	/* 1792x1344@60Hz */
398 	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
399 		   2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
400 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
401 	/* 1792x1344@75Hz */
402 	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
403 		   2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
404 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
405 	/* 1792x1344@120Hz RB */
406 	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
407 		   1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
408 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
409 	/* 1856x1392@60Hz */
410 	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
411 		   2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
412 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
413 	/* 1856x1392@75Hz */
414 	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
415 		   2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
416 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
417 	/* 1856x1392@120Hz RB */
418 	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
419 		   1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
420 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
421 	/* 1920x1200@60Hz RB */
422 	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
423 		   2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
424 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
425 	/* 1920x1200@60Hz */
426 	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
427 		   2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
428 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
429 	/* 1920x1200@75Hz */
430 	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
431 		   2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
432 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
433 	/* 1920x1200@85Hz */
434 	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
435 		   2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
436 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
437 	/* 1920x1200@120Hz RB */
438 	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
439 		   2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
440 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
441 	/* 1920x1440@60Hz */
442 	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
443 		   2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
444 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
445 	/* 1920x1440@75Hz */
446 	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
447 		   2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
448 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
449 	/* 1920x1440@120Hz RB */
450 	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
451 		   2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
452 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
453 	/* 2560x1600@60Hz RB */
454 	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
455 		   2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
456 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
457 	/* 2560x1600@60Hz */
458 	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
459 		   3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
460 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
461 	/* 2560x1600@75HZ */
462 	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
463 		   3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
464 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
465 	/* 2560x1600@85HZ */
466 	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
467 		   3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
468 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
469 	/* 2560x1600@120Hz RB */
470 	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
471 		   2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
472 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
473 };
474 
475 /*
476  * These more or less come from the DMT spec.  The 720x400 modes are
477  * inferred from historical 80x25 practice.  The 640x480@67 and 832x624@75
478  * modes are old-school Mac modes.  The EDID spec says the 1152x864@75 mode
479  * should be 1152x870, again for the Mac, but instead we use the x864 DMT
480  * mode.
481  *
482  * The DMT modes have been fact-checked; the rest are mild guesses.
483  */
484 static const struct drm_display_mode edid_est_modes[] = {
485 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
486 		   968, 1056, 0, 600, 601, 605, 628, 0,
487 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
488 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
489 		   896, 1024, 0, 600, 601, 603,  625, 0,
490 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
491 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
492 		   720, 840, 0, 480, 481, 484, 500, 0,
493 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
494 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
495 		   704,  832, 0, 480, 489, 491, 520, 0,
496 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
497 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
498 		   768,  864, 0, 480, 483, 486, 525, 0,
499 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
500 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
501 		   752, 800, 0, 480, 490, 492, 525, 0,
502 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
503 	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
504 		   846, 900, 0, 400, 421, 423,  449, 0,
505 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
506 	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
507 		   846,  900, 0, 400, 412, 414, 449, 0,
508 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
509 	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
510 		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
511 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
512 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
513 		   1136, 1312, 0,  768, 769, 772, 800, 0,
514 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
515 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
516 		   1184, 1328, 0,  768, 771, 777, 806, 0,
517 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
518 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
519 		   1184, 1344, 0,  768, 771, 777, 806, 0,
520 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
521 	{ DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
522 		   1208, 1264, 0, 768, 768, 776, 817, 0,
523 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
524 	{ DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
525 		   928, 1152, 0, 624, 625, 628, 667, 0,
526 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
527 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
528 		   896, 1056, 0, 600, 601, 604,  625, 0,
529 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
530 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
531 		   976, 1040, 0, 600, 637, 643, 666, 0,
532 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
533 	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
534 		   1344, 1600, 0,  864, 865, 868, 900, 0,
535 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
536 };
537 
538 struct minimode {
539 	short w;
540 	short h;
541 	short r;
542 	short rb;
543 };
544 
545 static const struct minimode est3_modes[] = {
546 	/* byte 6 */
547 	{ 640, 350, 85, 0 },
548 	{ 640, 400, 85, 0 },
549 	{ 720, 400, 85, 0 },
550 	{ 640, 480, 85, 0 },
551 	{ 848, 480, 60, 0 },
552 	{ 800, 600, 85, 0 },
553 	{ 1024, 768, 85, 0 },
554 	{ 1152, 864, 75, 0 },
555 	/* byte 7 */
556 	{ 1280, 768, 60, 1 },
557 	{ 1280, 768, 60, 0 },
558 	{ 1280, 768, 75, 0 },
559 	{ 1280, 768, 85, 0 },
560 	{ 1280, 960, 60, 0 },
561 	{ 1280, 960, 85, 0 },
562 	{ 1280, 1024, 60, 0 },
563 	{ 1280, 1024, 85, 0 },
564 	/* byte 8 */
565 	{ 1360, 768, 60, 0 },
566 	{ 1440, 900, 60, 1 },
567 	{ 1440, 900, 60, 0 },
568 	{ 1440, 900, 75, 0 },
569 	{ 1440, 900, 85, 0 },
570 	{ 1400, 1050, 60, 1 },
571 	{ 1400, 1050, 60, 0 },
572 	{ 1400, 1050, 75, 0 },
573 	/* byte 9 */
574 	{ 1400, 1050, 85, 0 },
575 	{ 1680, 1050, 60, 1 },
576 	{ 1680, 1050, 60, 0 },
577 	{ 1680, 1050, 75, 0 },
578 	{ 1680, 1050, 85, 0 },
579 	{ 1600, 1200, 60, 0 },
580 	{ 1600, 1200, 65, 0 },
581 	{ 1600, 1200, 70, 0 },
582 	/* byte 10 */
583 	{ 1600, 1200, 75, 0 },
584 	{ 1600, 1200, 85, 0 },
585 	{ 1792, 1344, 60, 0 },
586 	{ 1792, 1344, 75, 0 },
587 	{ 1856, 1392, 60, 0 },
588 	{ 1856, 1392, 75, 0 },
589 	{ 1920, 1200, 60, 1 },
590 	{ 1920, 1200, 60, 0 },
591 	/* byte 11 */
592 	{ 1920, 1200, 75, 0 },
593 	{ 1920, 1200, 85, 0 },
594 	{ 1920, 1440, 60, 0 },
595 	{ 1920, 1440, 75, 0 },
596 };
597 
598 static const struct minimode extra_modes[] = {
599 	{ 1024, 576,  60, 0 },
600 	{ 1366, 768,  60, 0 },
601 	{ 1600, 900,  60, 0 },
602 	{ 1680, 945,  60, 0 },
603 	{ 1920, 1080, 60, 0 },
604 	{ 2048, 1152, 60, 0 },
605 	{ 2048, 1536, 60, 0 },
606 };
607 
608 /*
609  * Probably taken from CEA-861 spec.
610  * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
611  */
612 static const struct drm_display_mode edid_cea_modes[] = {
613 	/* 1 - 640x480@60Hz */
614 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
615 		   752, 800, 0, 480, 490, 492, 525, 0,
616 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
617 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
618 	/* 2 - 720x480@60Hz */
619 	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
620 		   798, 858, 0, 480, 489, 495, 525, 0,
621 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
622 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
623 	/* 3 - 720x480@60Hz */
624 	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
625 		   798, 858, 0, 480, 489, 495, 525, 0,
626 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
627 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
628 	/* 4 - 1280x720@60Hz */
629 	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
630 		   1430, 1650, 0, 720, 725, 730, 750, 0,
631 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
632 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
633 	/* 5 - 1920x1080i@60Hz */
634 	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
635 		   2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
636 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
637 			DRM_MODE_FLAG_INTERLACE),
638 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
639 	/* 6 - 720(1440)x480i@60Hz */
640 	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
641 		   801, 858, 0, 480, 488, 494, 525, 0,
642 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
643 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
644 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
645 	/* 7 - 720(1440)x480i@60Hz */
646 	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
647 		   801, 858, 0, 480, 488, 494, 525, 0,
648 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
649 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
650 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
651 	/* 8 - 720(1440)x240@60Hz */
652 	{ DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
653 		   801, 858, 0, 240, 244, 247, 262, 0,
654 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
655 			DRM_MODE_FLAG_DBLCLK),
656 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
657 	/* 9 - 720(1440)x240@60Hz */
658 	{ DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
659 		   801, 858, 0, 240, 244, 247, 262, 0,
660 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
661 			DRM_MODE_FLAG_DBLCLK),
662 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
663 	/* 10 - 2880x480i@60Hz */
664 	{ DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
665 		   3204, 3432, 0, 480, 488, 494, 525, 0,
666 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
667 			DRM_MODE_FLAG_INTERLACE),
668 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
669 	/* 11 - 2880x480i@60Hz */
670 	{ DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
671 		   3204, 3432, 0, 480, 488, 494, 525, 0,
672 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
673 			DRM_MODE_FLAG_INTERLACE),
674 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
675 	/* 12 - 2880x240@60Hz */
676 	{ DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
677 		   3204, 3432, 0, 240, 244, 247, 262, 0,
678 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
679 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
680 	/* 13 - 2880x240@60Hz */
681 	{ DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
682 		   3204, 3432, 0, 240, 244, 247, 262, 0,
683 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
684 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
685 	/* 14 - 1440x480@60Hz */
686 	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
687 		   1596, 1716, 0, 480, 489, 495, 525, 0,
688 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
689 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
690 	/* 15 - 1440x480@60Hz */
691 	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
692 		   1596, 1716, 0, 480, 489, 495, 525, 0,
693 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
694 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
695 	/* 16 - 1920x1080@60Hz */
696 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
697 		   2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
698 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
699 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
700 	/* 17 - 720x576@50Hz */
701 	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
702 		   796, 864, 0, 576, 581, 586, 625, 0,
703 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
704 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
705 	/* 18 - 720x576@50Hz */
706 	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
707 		   796, 864, 0, 576, 581, 586, 625, 0,
708 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
709 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
710 	/* 19 - 1280x720@50Hz */
711 	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
712 		   1760, 1980, 0, 720, 725, 730, 750, 0,
713 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
714 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
715 	/* 20 - 1920x1080i@50Hz */
716 	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
717 		   2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
718 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
719 			DRM_MODE_FLAG_INTERLACE),
720 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
721 	/* 21 - 720(1440)x576i@50Hz */
722 	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
723 		   795, 864, 0, 576, 580, 586, 625, 0,
724 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
725 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
726 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
727 	/* 22 - 720(1440)x576i@50Hz */
728 	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
729 		   795, 864, 0, 576, 580, 586, 625, 0,
730 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
731 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
732 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
733 	/* 23 - 720(1440)x288@50Hz */
734 	{ DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
735 		   795, 864, 0, 288, 290, 293, 312, 0,
736 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
737 			DRM_MODE_FLAG_DBLCLK),
738 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
739 	/* 24 - 720(1440)x288@50Hz */
740 	{ DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
741 		   795, 864, 0, 288, 290, 293, 312, 0,
742 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
743 			DRM_MODE_FLAG_DBLCLK),
744 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
745 	/* 25 - 2880x576i@50Hz */
746 	{ DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
747 		   3180, 3456, 0, 576, 580, 586, 625, 0,
748 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
749 			DRM_MODE_FLAG_INTERLACE),
750 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
751 	/* 26 - 2880x576i@50Hz */
752 	{ DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
753 		   3180, 3456, 0, 576, 580, 586, 625, 0,
754 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
755 			DRM_MODE_FLAG_INTERLACE),
756 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
757 	/* 27 - 2880x288@50Hz */
758 	{ DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
759 		   3180, 3456, 0, 288, 290, 293, 312, 0,
760 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
761 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
762 	/* 28 - 2880x288@50Hz */
763 	{ DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
764 		   3180, 3456, 0, 288, 290, 293, 312, 0,
765 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
766 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
767 	/* 29 - 1440x576@50Hz */
768 	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
769 		   1592, 1728, 0, 576, 581, 586, 625, 0,
770 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
771 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
772 	/* 30 - 1440x576@50Hz */
773 	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
774 		   1592, 1728, 0, 576, 581, 586, 625, 0,
775 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
776 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
777 	/* 31 - 1920x1080@50Hz */
778 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
779 		   2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
780 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
781 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
782 	/* 32 - 1920x1080@24Hz */
783 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
784 		   2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
785 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
786 	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
787 	/* 33 - 1920x1080@25Hz */
788 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
789 		   2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
790 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
791 	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
792 	/* 34 - 1920x1080@30Hz */
793 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
794 		   2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
795 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
796 	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
797 	/* 35 - 2880x480@60Hz */
798 	{ DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
799 		   3192, 3432, 0, 480, 489, 495, 525, 0,
800 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
801 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
802 	/* 36 - 2880x480@60Hz */
803 	{ DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
804 		   3192, 3432, 0, 480, 489, 495, 525, 0,
805 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
806 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
807 	/* 37 - 2880x576@50Hz */
808 	{ DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
809 		   3184, 3456, 0, 576, 581, 586, 625, 0,
810 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
811 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
812 	/* 38 - 2880x576@50Hz */
813 	{ DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
814 		   3184, 3456, 0, 576, 581, 586, 625, 0,
815 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
816 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
817 	/* 39 - 1920x1080i@50Hz */
818 	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
819 		   2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
820 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
821 			DRM_MODE_FLAG_INTERLACE),
822 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
823 	/* 40 - 1920x1080i@100Hz */
824 	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
825 		   2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
826 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
827 			DRM_MODE_FLAG_INTERLACE),
828 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
829 	/* 41 - 1280x720@100Hz */
830 	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
831 		   1760, 1980, 0, 720, 725, 730, 750, 0,
832 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
833 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
834 	/* 42 - 720x576@100Hz */
835 	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
836 		   796, 864, 0, 576, 581, 586, 625, 0,
837 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
838 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
839 	/* 43 - 720x576@100Hz */
840 	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
841 		   796, 864, 0, 576, 581, 586, 625, 0,
842 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
843 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
844 	/* 44 - 720(1440)x576i@100Hz */
845 	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
846 		   795, 864, 0, 576, 580, 586, 625, 0,
847 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
848 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
849 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
850 	/* 45 - 720(1440)x576i@100Hz */
851 	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
852 		   795, 864, 0, 576, 580, 586, 625, 0,
853 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
854 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
855 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
856 	/* 46 - 1920x1080i@120Hz */
857 	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
858 		   2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
859 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
860 			DRM_MODE_FLAG_INTERLACE),
861 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
862 	/* 47 - 1280x720@120Hz */
863 	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
864 		   1430, 1650, 0, 720, 725, 730, 750, 0,
865 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
866 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
867 	/* 48 - 720x480@120Hz */
868 	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
869 		   798, 858, 0, 480, 489, 495, 525, 0,
870 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
871 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
872 	/* 49 - 720x480@120Hz */
873 	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
874 		   798, 858, 0, 480, 489, 495, 525, 0,
875 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
876 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
877 	/* 50 - 720(1440)x480i@120Hz */
878 	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
879 		   801, 858, 0, 480, 488, 494, 525, 0,
880 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
881 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
882 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
883 	/* 51 - 720(1440)x480i@120Hz */
884 	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
885 		   801, 858, 0, 480, 488, 494, 525, 0,
886 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
887 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
888 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
889 	/* 52 - 720x576@200Hz */
890 	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
891 		   796, 864, 0, 576, 581, 586, 625, 0,
892 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
893 	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
894 	/* 53 - 720x576@200Hz */
895 	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
896 		   796, 864, 0, 576, 581, 586, 625, 0,
897 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
898 	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
899 	/* 54 - 720(1440)x576i@200Hz */
900 	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
901 		   795, 864, 0, 576, 580, 586, 625, 0,
902 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
903 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
904 	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
905 	/* 55 - 720(1440)x576i@200Hz */
906 	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
907 		   795, 864, 0, 576, 580, 586, 625, 0,
908 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
909 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
910 	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
911 	/* 56 - 720x480@240Hz */
912 	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
913 		   798, 858, 0, 480, 489, 495, 525, 0,
914 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
915 	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
916 	/* 57 - 720x480@240Hz */
917 	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
918 		   798, 858, 0, 480, 489, 495, 525, 0,
919 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
920 	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
921 	/* 58 - 720(1440)x480i@240 */
922 	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
923 		   801, 858, 0, 480, 488, 494, 525, 0,
924 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
925 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
926 	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
927 	/* 59 - 720(1440)x480i@240 */
928 	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
929 		   801, 858, 0, 480, 488, 494, 525, 0,
930 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
931 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
932 	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
933 	/* 60 - 1280x720@24Hz */
934 	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
935 		   3080, 3300, 0, 720, 725, 730, 750, 0,
936 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
937 	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
938 	/* 61 - 1280x720@25Hz */
939 	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
940 		   3740, 3960, 0, 720, 725, 730, 750, 0,
941 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
942 	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
943 	/* 62 - 1280x720@30Hz */
944 	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
945 		   3080, 3300, 0, 720, 725, 730, 750, 0,
946 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
947 	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
948 	/* 63 - 1920x1080@120Hz */
949 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
950 		   2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
951 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
952 	 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
953 	/* 64 - 1920x1080@100Hz */
954 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
955 		   2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
956 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
957 	 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
958 };
959 
960 /*
961  * HDMI 1.4 4k modes.
962  */
963 static const struct drm_display_mode edid_4k_modes[] = {
964 	/* 1 - 3840x2160@30Hz */
965 	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
966 		   3840, 4016, 4104, 4400, 0,
967 		   2160, 2168, 2178, 2250, 0,
968 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
969 	  .vrefresh = 30, },
970 	/* 2 - 3840x2160@25Hz */
971 	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
972 		   3840, 4896, 4984, 5280, 0,
973 		   2160, 2168, 2178, 2250, 0,
974 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
975 	  .vrefresh = 25, },
976 	/* 3 - 3840x2160@24Hz */
977 	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
978 		   3840, 5116, 5204, 5500, 0,
979 		   2160, 2168, 2178, 2250, 0,
980 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
981 	  .vrefresh = 24, },
982 	/* 4 - 4096x2160@24Hz (SMPTE) */
983 	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
984 		   4096, 5116, 5204, 5500, 0,
985 		   2160, 2168, 2178, 2250, 0,
986 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
987 	  .vrefresh = 24, },
988 };
989 
990 /*** DDC fetch and block validation ***/
991 
992 static const u8 edid_header[] = {
993 	0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
994 };
995 
996 /**
997  * drm_edid_header_is_valid - sanity check the header of the base EDID block
998  * @raw_edid: pointer to raw base EDID block
999  *
1000  * Sanity check the header of the base EDID block.
1001  *
1002  * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
1003  */
1004 int drm_edid_header_is_valid(const u8 *raw_edid)
1005 {
1006 	int i, score = 0;
1007 
1008 	for (i = 0; i < sizeof(edid_header); i++)
1009 		if (raw_edid[i] == edid_header[i])
1010 			score++;
1011 
1012 	return score;
1013 }
1014 EXPORT_SYMBOL(drm_edid_header_is_valid);
1015 
1016 static int edid_fixup __read_mostly = 6;
1017 module_param_named(edid_fixup, edid_fixup, int, 0400);
1018 MODULE_PARM_DESC(edid_fixup,
1019 		 "Minimum number of valid EDID header bytes (0-8, default 6)");
1020 
1021 /**
1022  * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1023  * @raw_edid: pointer to raw EDID block
1024  * @block: type of block to validate (0 for base, extension otherwise)
1025  * @print_bad_edid: if true, dump bad EDID blocks to the console
1026  *
1027  * Validate a base or extension EDID block and optionally dump bad blocks to
1028  * the console.
1029  *
1030  * Return: True if the block is valid, false otherwise.
1031  */
1032 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
1033 {
1034 	int i;
1035 	u8 csum = 0;
1036 	struct edid *edid = (struct edid *)raw_edid;
1037 
1038 	if (WARN_ON(!raw_edid))
1039 		return false;
1040 
1041 	if (edid_fixup > 8 || edid_fixup < 0)
1042 		edid_fixup = 6;
1043 
1044 	if (block == 0) {
1045 		int score = drm_edid_header_is_valid(raw_edid);
1046 		if (score == 8) ;
1047 		else if (score >= edid_fixup) {
1048 			DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1049 			memcpy(raw_edid, edid_header, sizeof(edid_header));
1050 		} else {
1051 			goto bad;
1052 		}
1053 	}
1054 
1055 	for (i = 0; i < EDID_LENGTH; i++)
1056 		csum += raw_edid[i];
1057 	if (csum) {
1058 		if (print_bad_edid) {
1059 			DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1060 		}
1061 
1062 		/* allow CEA to slide through, switches mangle this */
1063 		if (raw_edid[0] != 0x02)
1064 			goto bad;
1065 	}
1066 
1067 	/* per-block-type checks */
1068 	switch (raw_edid[0]) {
1069 	case 0: /* base */
1070 		if (edid->version != 1) {
1071 			DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1072 			goto bad;
1073 		}
1074 
1075 		if (edid->revision > 4)
1076 			DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1077 		break;
1078 
1079 	default:
1080 		break;
1081 	}
1082 
1083 	return true;
1084 
1085 bad:
1086 	if (print_bad_edid) {
1087 		printk(KERN_ERR "Raw EDID:\n");
1088 		for (i = 0; i < EDID_LENGTH; ) {
1089 			kprintf("%02x", raw_edid[i]);
1090 			i++;
1091 			if (i % 16 == 0 || i == EDID_LENGTH)
1092 				kprintf("\n");
1093 			else if (i % 8 == 0)
1094 				kprintf("  ");
1095 			else
1096 				kprintf(" ");
1097 		}
1098 	}
1099 	return false;
1100 }
1101 EXPORT_SYMBOL(drm_edid_block_valid);
1102 
1103 /**
1104  * drm_edid_is_valid - sanity check EDID data
1105  * @edid: EDID data
1106  *
1107  * Sanity-check an entire EDID record (including extensions)
1108  *
1109  * Return: True if the EDID data is valid, false otherwise.
1110  */
1111 bool drm_edid_is_valid(struct edid *edid)
1112 {
1113 	int i;
1114 	u8 *raw = (u8 *)edid;
1115 
1116 	if (!edid)
1117 		return false;
1118 
1119 	for (i = 0; i <= edid->extensions; i++)
1120 		if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
1121 			return false;
1122 
1123 	return true;
1124 }
1125 EXPORT_SYMBOL(drm_edid_is_valid);
1126 
1127 #define DDC_SEGMENT_ADDR 0x30
1128 /**
1129  * drm_do_probe_ddc_edid() - get EDID information via I2C
1130  * @adapter: I2C device adaptor
1131  * @buf: EDID data buffer to be filled
1132  * @block: 128 byte EDID block to start fetching from
1133  * @len: EDID data buffer length to fetch
1134  *
1135  * Try to fetch EDID information by calling I2C driver functions.
1136  *
1137  * Return: 0 on success or -1 on failure.
1138  */
1139 static int
1140 drm_do_probe_ddc_edid(struct device *adapter, unsigned char *buf,
1141 		      int block, int len)
1142 {
1143 	unsigned char start = block * EDID_LENGTH;
1144 	unsigned char segment = block >> 1;
1145 	unsigned char xfers = segment ? 3 : 2;
1146 	int ret, retries = 5;
1147 
1148 	/*
1149 	 * The core I2C driver will automatically retry the transfer if the
1150 	 * adapter reports EAGAIN. However, we find that bit-banging transfers
1151 	 * are susceptible to errors under a heavily loaded machine and
1152 	 * generate spurious NAKs and timeouts. Retrying the transfer
1153 	 * of the individual block a few times seems to overcome this.
1154 	 */
1155 	do {
1156 		struct i2c_msg msgs[] = {
1157 			{
1158 				.slave	= DDC_SEGMENT_ADDR << 1,
1159 				.flags	= 0,
1160 				.len	= 1,
1161 				.buf	= &segment,
1162 			}, {
1163 				.slave	= DDC_ADDR << 1,
1164 				.flags	= 0,
1165 				.len	= 1,
1166 				.buf	= &start,
1167 			}, {
1168 				.slave	= DDC_ADDR << 1,
1169 				.flags	= I2C_M_RD,
1170 				.len	= len,
1171 				.buf	= buf,
1172 			}
1173 		};
1174 
1175 		/*
1176 		 * Avoid sending the segment addr to not upset non-compliant
1177 		 * DDC monitors.
1178 		 */
1179 		ret = iicbus_transfer(adapter, &msgs[3 - xfers], xfers);
1180 
1181 		if (ret != 0)
1182 			DRM_DEBUG_KMS("iicbus_transfer countdown %d error %d\n",
1183 			    retries, ret);
1184 	} while (ret != 0 && --retries);
1185 
1186 	return (ret == 0 ? 0 : -1);
1187 }
1188 
1189 static bool drm_edid_is_zero(u8 *in_edid, int length)
1190 {
1191 	int i;
1192 	u32 *raw_edid = (u32 *)in_edid;
1193 
1194 	for (i = 0; i < length / 4; i++)
1195 		if (*(raw_edid + i) != 0)
1196 			return false;
1197 
1198 	return true;
1199 }
1200 
1201 static u8 *
1202 drm_do_get_edid(struct drm_connector *connector, struct device *adapter)
1203 {
1204 	int i, j = 0, valid_extensions = 0;
1205 	u8 *block, *new;
1206 	bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1207 
1208 	if ((block = kmalloc(EDID_LENGTH, M_DRM, M_WAITOK)) == NULL)
1209 		return NULL;
1210 
1211 	/* base block fetch */
1212 	for (i = 0; i < 4; i++) {
1213 		if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
1214 			goto out;
1215 		if (drm_edid_block_valid(block, 0, print_bad_edid))
1216 			break;
1217 		if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1218 			connector->null_edid_counter++;
1219 			goto carp;
1220 		}
1221 	}
1222 	if (i == 4)
1223 		goto carp;
1224 
1225 	/* if there's no extensions, we're done */
1226 	if (block[0x7e] == 0)
1227 		return block;
1228 
1229 	new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, M_DRM, M_WAITOK);
1230 	if (!new)
1231 		goto out;
1232 	block = new;
1233 
1234 	for (j = 1; j <= block[0x7e]; j++) {
1235 		for (i = 0; i < 4; i++) {
1236 			if (drm_do_probe_ddc_edid(adapter,
1237 				  block + (valid_extensions + 1) * EDID_LENGTH,
1238 				  j, EDID_LENGTH))
1239 				goto out;
1240 			if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) {
1241 				valid_extensions++;
1242 				break;
1243 			}
1244 		}
1245 
1246 		if (i == 4 && print_bad_edid) {
1247 			dev_warn(connector->dev->dev,
1248 			 "%s: Ignoring invalid EDID block %d.\n",
1249 			 connector->name, j);
1250 
1251 			connector->bad_edid_counter++;
1252 		}
1253 	}
1254 
1255 	if (valid_extensions != block[0x7e]) {
1256 		block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1257 		block[0x7e] = valid_extensions;
1258 		new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, M_DRM, M_WAITOK);
1259 		if (!new)
1260 			goto out;
1261 		block = new;
1262 	}
1263 
1264 	return block;
1265 
1266 carp:
1267 	if (print_bad_edid) {
1268 		dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1269 			 connector->name, j);
1270 	}
1271 	connector->bad_edid_counter++;
1272 
1273 out:
1274 	kfree(block);
1275 	return NULL;
1276 }
1277 
1278 /**
1279  * drm_probe_ddc() - probe DDC presence
1280  * @adapter: I2C adapter to probe
1281  *
1282  * Return: True on success, false on failure.
1283  */
1284 bool
1285 drm_probe_ddc(struct device *adapter)
1286 {
1287 	unsigned char out;
1288 
1289 	return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1290 }
1291 EXPORT_SYMBOL(drm_probe_ddc);
1292 
1293 /**
1294  * drm_get_edid - get EDID data, if available
1295  * @connector: connector we're probing
1296  * @adapter: I2C adapter to use for DDC
1297  *
1298  * Poke the given I2C channel to grab EDID data if possible.  If found,
1299  * attach it to the connector.
1300  *
1301  * Return: Pointer to valid EDID or NULL if we couldn't find any.
1302  */
1303 struct edid *drm_get_edid(struct drm_connector *connector,
1304 			  struct device *adapter)
1305 {
1306 	struct edid *edid = NULL;
1307 
1308 	if (drm_probe_ddc(adapter))
1309 		edid = (struct edid *)drm_do_get_edid(connector, adapter);
1310 
1311 	return edid;
1312 }
1313 EXPORT_SYMBOL(drm_get_edid);
1314 
1315 /**
1316  * drm_edid_duplicate - duplicate an EDID and the extensions
1317  * @edid: EDID to duplicate
1318  *
1319  * Return: Pointer to duplicated EDID or NULL on allocation failure.
1320  */
1321 struct edid *drm_edid_duplicate(const struct edid *edid)
1322 {
1323 	return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1324 }
1325 EXPORT_SYMBOL(drm_edid_duplicate);
1326 
1327 /*** EDID parsing ***/
1328 
1329 /**
1330  * edid_vendor - match a string against EDID's obfuscated vendor field
1331  * @edid: EDID to match
1332  * @vendor: vendor string
1333  *
1334  * Returns true if @vendor is in @edid, false otherwise
1335  */
1336 static bool edid_vendor(struct edid *edid, char *vendor)
1337 {
1338 	char edid_vendor[3];
1339 
1340 	edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1341 	edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1342 			  ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1343 	edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1344 
1345 	return !strncmp(edid_vendor, vendor, 3);
1346 }
1347 
1348 /**
1349  * edid_get_quirks - return quirk flags for a given EDID
1350  * @edid: EDID to process
1351  *
1352  * This tells subsequent routines what fixes they need to apply.
1353  */
1354 static u32 edid_get_quirks(struct edid *edid)
1355 {
1356 	struct edid_quirk *quirk;
1357 	int i;
1358 
1359 	for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1360 		quirk = &edid_quirk_list[i];
1361 
1362 		if (edid_vendor(edid, quirk->vendor) &&
1363 		    (EDID_PRODUCT_ID(edid) == quirk->product_id))
1364 			return quirk->quirks;
1365 	}
1366 
1367 	return 0;
1368 }
1369 
1370 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1371 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1372 
1373 /**
1374  * edid_fixup_preferred - set preferred modes based on quirk list
1375  * @connector: has mode list to fix up
1376  * @quirks: quirks list
1377  *
1378  * Walk the mode list for @connector, clearing the preferred status
1379  * on existing modes and setting it anew for the right mode ala @quirks.
1380  */
1381 static void edid_fixup_preferred(struct drm_connector *connector,
1382 				 u32 quirks)
1383 {
1384 	struct drm_display_mode *t, *cur_mode, *preferred_mode;
1385 	int target_refresh = 0;
1386 	int cur_vrefresh, preferred_vrefresh;
1387 
1388 	if (list_empty(&connector->probed_modes))
1389 		return;
1390 
1391 	if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1392 		target_refresh = 60;
1393 	if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1394 		target_refresh = 75;
1395 
1396 	preferred_mode = list_first_entry(&connector->probed_modes,
1397 					  struct drm_display_mode, head);
1398 
1399 	list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1400 		cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1401 
1402 		if (cur_mode == preferred_mode)
1403 			continue;
1404 
1405 		/* Largest mode is preferred */
1406 		if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1407 			preferred_mode = cur_mode;
1408 
1409 		cur_vrefresh = cur_mode->vrefresh ?
1410 			cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1411 		preferred_vrefresh = preferred_mode->vrefresh ?
1412 			preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
1413 		/* At a given size, try to get closest to target refresh */
1414 		if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1415 		    MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1416 		    MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
1417 			preferred_mode = cur_mode;
1418 		}
1419 	}
1420 
1421 	preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1422 }
1423 
1424 static bool
1425 mode_is_rb(const struct drm_display_mode *mode)
1426 {
1427 	return (mode->htotal - mode->hdisplay == 160) &&
1428 	       (mode->hsync_end - mode->hdisplay == 80) &&
1429 	       (mode->hsync_end - mode->hsync_start == 32) &&
1430 	       (mode->vsync_start - mode->vdisplay == 3);
1431 }
1432 
1433 /*
1434  * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1435  * @dev: Device to duplicate against
1436  * @hsize: Mode width
1437  * @vsize: Mode height
1438  * @fresh: Mode refresh rate
1439  * @rb: Mode reduced-blanking-ness
1440  *
1441  * Walk the DMT mode list looking for a match for the given parameters.
1442  *
1443  * Return: A newly allocated copy of the mode, or NULL if not found.
1444  */
1445 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1446 					   int hsize, int vsize, int fresh,
1447 					   bool rb)
1448 {
1449 	int i;
1450 
1451 	for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1452 		const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1453 		if (hsize != ptr->hdisplay)
1454 			continue;
1455 		if (vsize != ptr->vdisplay)
1456 			continue;
1457 		if (fresh != drm_mode_vrefresh(ptr))
1458 			continue;
1459 		if (rb != mode_is_rb(ptr))
1460 			continue;
1461 
1462 		return drm_mode_duplicate(dev, ptr);
1463 	}
1464 
1465 	return NULL;
1466 }
1467 EXPORT_SYMBOL(drm_mode_find_dmt);
1468 
1469 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1470 
1471 static void
1472 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1473 {
1474 	int i, n = 0;
1475 	u8 d = ext[0x02];
1476 	u8 *det_base = ext + d;
1477 
1478 	n = (127 - d) / 18;
1479 	for (i = 0; i < n; i++)
1480 		cb((struct detailed_timing *)(det_base + 18 * i), closure);
1481 }
1482 
1483 static void
1484 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1485 {
1486 	unsigned int i, n = min((int)ext[0x02], 6);
1487 	u8 *det_base = ext + 5;
1488 
1489 	if (ext[0x01] != 1)
1490 		return; /* unknown version */
1491 
1492 	for (i = 0; i < n; i++)
1493 		cb((struct detailed_timing *)(det_base + 18 * i), closure);
1494 }
1495 
1496 static void
1497 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1498 {
1499 	int i;
1500 	struct edid *edid = (struct edid *)raw_edid;
1501 
1502 	if (edid == NULL)
1503 		return;
1504 
1505 	for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1506 		cb(&(edid->detailed_timings[i]), closure);
1507 
1508 	for (i = 1; i <= raw_edid[0x7e]; i++) {
1509 		u8 *ext = raw_edid + (i * EDID_LENGTH);
1510 		switch (*ext) {
1511 		case CEA_EXT:
1512 			cea_for_each_detailed_block(ext, cb, closure);
1513 			break;
1514 		case VTB_EXT:
1515 			vtb_for_each_detailed_block(ext, cb, closure);
1516 			break;
1517 		default:
1518 			break;
1519 		}
1520 	}
1521 }
1522 
1523 static void
1524 is_rb(struct detailed_timing *t, void *data)
1525 {
1526 	u8 *r = (u8 *)t;
1527 	if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1528 		if (r[15] & 0x10)
1529 			*(bool *)data = true;
1530 }
1531 
1532 /* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
1533 static bool
1534 drm_monitor_supports_rb(struct edid *edid)
1535 {
1536 	if (edid->revision >= 4) {
1537 		bool ret = false;
1538 		drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1539 		return ret;
1540 	}
1541 
1542 	return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1543 }
1544 
1545 static void
1546 find_gtf2(struct detailed_timing *t, void *data)
1547 {
1548 	u8 *r = (u8 *)t;
1549 	if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1550 		*(u8 **)data = r;
1551 }
1552 
1553 /* Secondary GTF curve kicks in above some break frequency */
1554 static int
1555 drm_gtf2_hbreak(struct edid *edid)
1556 {
1557 	u8 *r = NULL;
1558 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1559 	return r ? (r[12] * 2) : 0;
1560 }
1561 
1562 static int
1563 drm_gtf2_2c(struct edid *edid)
1564 {
1565 	u8 *r = NULL;
1566 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1567 	return r ? r[13] : 0;
1568 }
1569 
1570 static int
1571 drm_gtf2_m(struct edid *edid)
1572 {
1573 	u8 *r = NULL;
1574 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1575 	return r ? (r[15] << 8) + r[14] : 0;
1576 }
1577 
1578 static int
1579 drm_gtf2_k(struct edid *edid)
1580 {
1581 	u8 *r = NULL;
1582 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1583 	return r ? r[16] : 0;
1584 }
1585 
1586 static int
1587 drm_gtf2_2j(struct edid *edid)
1588 {
1589 	u8 *r = NULL;
1590 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1591 	return r ? r[17] : 0;
1592 }
1593 
1594 /**
1595  * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1596  * @edid: EDID block to scan
1597  */
1598 static int standard_timing_level(struct edid *edid)
1599 {
1600 	if (edid->revision >= 2) {
1601 		if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1602 			return LEVEL_CVT;
1603 		if (drm_gtf2_hbreak(edid))
1604 			return LEVEL_GTF2;
1605 		return LEVEL_GTF;
1606 	}
1607 	return LEVEL_DMT;
1608 }
1609 
1610 /*
1611  * 0 is reserved.  The spec says 0x01 fill for unused timings.  Some old
1612  * monitors fill with ascii space (0x20) instead.
1613  */
1614 static int
1615 bad_std_timing(u8 a, u8 b)
1616 {
1617 	return (a == 0x00 && b == 0x00) ||
1618 	       (a == 0x01 && b == 0x01) ||
1619 	       (a == 0x20 && b == 0x20);
1620 }
1621 
1622 /**
1623  * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1624  * @connector: connector of for the EDID block
1625  * @edid: EDID block to scan
1626  * @t: standard timing params
1627  *
1628  * Take the standard timing params (in this case width, aspect, and refresh)
1629  * and convert them into a real mode using CVT/GTF/DMT.
1630  */
1631 static struct drm_display_mode *
1632 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1633 	     struct std_timing *t)
1634 {
1635 	struct drm_device *dev = connector->dev;
1636 	struct drm_display_mode *m, *mode = NULL;
1637 	int hsize, vsize;
1638 	int vrefresh_rate;
1639 	unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1640 		>> EDID_TIMING_ASPECT_SHIFT;
1641 	unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1642 		>> EDID_TIMING_VFREQ_SHIFT;
1643 	int timing_level = standard_timing_level(edid);
1644 
1645 	if (bad_std_timing(t->hsize, t->vfreq_aspect))
1646 		return NULL;
1647 
1648 	/* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1649 	hsize = t->hsize * 8 + 248;
1650 	/* vrefresh_rate = vfreq + 60 */
1651 	vrefresh_rate = vfreq + 60;
1652 	/* the vdisplay is calculated based on the aspect ratio */
1653 	if (aspect_ratio == 0) {
1654 		if (edid->revision < 3)
1655 			vsize = hsize;
1656 		else
1657 			vsize = (hsize * 10) / 16;
1658 	} else if (aspect_ratio == 1)
1659 		vsize = (hsize * 3) / 4;
1660 	else if (aspect_ratio == 2)
1661 		vsize = (hsize * 4) / 5;
1662 	else
1663 		vsize = (hsize * 9) / 16;
1664 
1665 	/* HDTV hack, part 1 */
1666 	if (vrefresh_rate == 60 &&
1667 	    ((hsize == 1360 && vsize == 765) ||
1668 	     (hsize == 1368 && vsize == 769))) {
1669 		hsize = 1366;
1670 		vsize = 768;
1671 	}
1672 
1673 	/*
1674 	 * If this connector already has a mode for this size and refresh
1675 	 * rate (because it came from detailed or CVT info), use that
1676 	 * instead.  This way we don't have to guess at interlace or
1677 	 * reduced blanking.
1678 	 */
1679 	list_for_each_entry(m, &connector->probed_modes, head)
1680 		if (m->hdisplay == hsize && m->vdisplay == vsize &&
1681 		    drm_mode_vrefresh(m) == vrefresh_rate)
1682 			return NULL;
1683 
1684 	/* HDTV hack, part 2 */
1685 	if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1686 		mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1687 				    false);
1688 		mode->hdisplay = 1366;
1689 		mode->hsync_start = mode->hsync_start - 1;
1690 		mode->hsync_end = mode->hsync_end - 1;
1691 		return mode;
1692 	}
1693 
1694 	/* check whether it can be found in default mode table */
1695 	if (drm_monitor_supports_rb(edid)) {
1696 		mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1697 					 true);
1698 		if (mode)
1699 			return mode;
1700 	}
1701 	mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1702 	if (mode)
1703 		return mode;
1704 
1705 	/* okay, generate it */
1706 	switch (timing_level) {
1707 	case LEVEL_DMT:
1708 		break;
1709 	case LEVEL_GTF:
1710 		mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1711 		break;
1712 	case LEVEL_GTF2:
1713 		/*
1714 		 * This is potentially wrong if there's ever a monitor with
1715 		 * more than one ranges section, each claiming a different
1716 		 * secondary GTF curve.  Please don't do that.
1717 		 */
1718 		mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1719 		if (!mode)
1720 			return NULL;
1721 		if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1722 			drm_mode_destroy(dev, mode);
1723 			mode = drm_gtf_mode_complex(dev, hsize, vsize,
1724 						    vrefresh_rate, 0, 0,
1725 						    drm_gtf2_m(edid),
1726 						    drm_gtf2_2c(edid),
1727 						    drm_gtf2_k(edid),
1728 						    drm_gtf2_2j(edid));
1729 		}
1730 		break;
1731 	case LEVEL_CVT:
1732 		mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1733 				    false);
1734 		break;
1735 	}
1736 	return mode;
1737 }
1738 
1739 /*
1740  * EDID is delightfully ambiguous about how interlaced modes are to be
1741  * encoded.  Our internal representation is of frame height, but some
1742  * HDTV detailed timings are encoded as field height.
1743  *
1744  * The format list here is from CEA, in frame size.  Technically we
1745  * should be checking refresh rate too.  Whatever.
1746  */
1747 static void
1748 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1749 			    struct detailed_pixel_timing *pt)
1750 {
1751 	int i;
1752 	static const struct {
1753 		int w, h;
1754 	} cea_interlaced[] = {
1755 		{ 1920, 1080 },
1756 		{  720,  480 },
1757 		{ 1440,  480 },
1758 		{ 2880,  480 },
1759 		{  720,  576 },
1760 		{ 1440,  576 },
1761 		{ 2880,  576 },
1762 	};
1763 
1764 	if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1765 		return;
1766 
1767 	for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1768 		if ((mode->hdisplay == cea_interlaced[i].w) &&
1769 		    (mode->vdisplay == cea_interlaced[i].h / 2)) {
1770 			mode->vdisplay *= 2;
1771 			mode->vsync_start *= 2;
1772 			mode->vsync_end *= 2;
1773 			mode->vtotal *= 2;
1774 			mode->vtotal |= 1;
1775 		}
1776 	}
1777 
1778 	mode->flags |= DRM_MODE_FLAG_INTERLACE;
1779 }
1780 
1781 /**
1782  * drm_mode_detailed - create a new mode from an EDID detailed timing section
1783  * @dev: DRM device (needed to create new mode)
1784  * @edid: EDID block
1785  * @timing: EDID detailed timing info
1786  * @quirks: quirks to apply
1787  *
1788  * An EDID detailed timing block contains enough info for us to create and
1789  * return a new struct drm_display_mode.
1790  */
1791 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1792 						  struct edid *edid,
1793 						  struct detailed_timing *timing,
1794 						  u32 quirks)
1795 {
1796 	struct drm_display_mode *mode;
1797 	struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1798 	unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1799 	unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1800 	unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1801 	unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1802 	unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1803 	unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1804 	unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
1805 	unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1806 
1807 	/* ignore tiny modes */
1808 	if (hactive < 64 || vactive < 64)
1809 		return NULL;
1810 
1811 	if (pt->misc & DRM_EDID_PT_STEREO) {
1812 		DRM_DEBUG_KMS("stereo mode not supported\n");
1813 		return NULL;
1814 	}
1815 	if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1816 		DRM_DEBUG_KMS("composite sync not supported\n");
1817 	}
1818 
1819 	/* it is incorrect if hsync/vsync width is zero */
1820 	if (!hsync_pulse_width || !vsync_pulse_width) {
1821 		DRM_DEBUG_KMS("Incorrect Detailed timing. "
1822 				"Wrong Hsync/Vsync pulse width\n");
1823 		return NULL;
1824 	}
1825 
1826 	if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1827 		mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1828 		if (!mode)
1829 			return NULL;
1830 
1831 		goto set_size;
1832 	}
1833 
1834 	mode = drm_mode_create(dev);
1835 	if (!mode)
1836 		return NULL;
1837 
1838 	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1839 		timing->pixel_clock = cpu_to_le16(1088);
1840 
1841 	mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1842 
1843 	mode->hdisplay = hactive;
1844 	mode->hsync_start = mode->hdisplay + hsync_offset;
1845 	mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1846 	mode->htotal = mode->hdisplay + hblank;
1847 
1848 	mode->vdisplay = vactive;
1849 	mode->vsync_start = mode->vdisplay + vsync_offset;
1850 	mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1851 	mode->vtotal = mode->vdisplay + vblank;
1852 
1853 	/* Some EDIDs have bogus h/vtotal values */
1854 	if (mode->hsync_end > mode->htotal)
1855 		mode->htotal = mode->hsync_end + 1;
1856 	if (mode->vsync_end > mode->vtotal)
1857 		mode->vtotal = mode->vsync_end + 1;
1858 
1859 	drm_mode_do_interlace_quirk(mode, pt);
1860 
1861 	if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1862 		pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1863 	}
1864 
1865 	mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1866 		DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1867 	mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1868 		DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1869 
1870 set_size:
1871 	mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1872 	mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1873 
1874 	if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1875 		mode->width_mm *= 10;
1876 		mode->height_mm *= 10;
1877 	}
1878 
1879 	if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1880 		mode->width_mm = edid->width_cm * 10;
1881 		mode->height_mm = edid->height_cm * 10;
1882 	}
1883 
1884 	mode->type = DRM_MODE_TYPE_DRIVER;
1885 	mode->vrefresh = drm_mode_vrefresh(mode);
1886 	drm_mode_set_name(mode);
1887 
1888 	return mode;
1889 }
1890 
1891 static bool
1892 mode_in_hsync_range(const struct drm_display_mode *mode,
1893 		    struct edid *edid, u8 *t)
1894 {
1895 	int hsync, hmin, hmax;
1896 
1897 	hmin = t[7];
1898 	if (edid->revision >= 4)
1899 	    hmin += ((t[4] & 0x04) ? 255 : 0);
1900 	hmax = t[8];
1901 	if (edid->revision >= 4)
1902 	    hmax += ((t[4] & 0x08) ? 255 : 0);
1903 	hsync = drm_mode_hsync(mode);
1904 
1905 	return (hsync <= hmax && hsync >= hmin);
1906 }
1907 
1908 static bool
1909 mode_in_vsync_range(const struct drm_display_mode *mode,
1910 		    struct edid *edid, u8 *t)
1911 {
1912 	int vsync, vmin, vmax;
1913 
1914 	vmin = t[5];
1915 	if (edid->revision >= 4)
1916 	    vmin += ((t[4] & 0x01) ? 255 : 0);
1917 	vmax = t[6];
1918 	if (edid->revision >= 4)
1919 	    vmax += ((t[4] & 0x02) ? 255 : 0);
1920 	vsync = drm_mode_vrefresh(mode);
1921 
1922 	return (vsync <= vmax && vsync >= vmin);
1923 }
1924 
1925 static u32
1926 range_pixel_clock(struct edid *edid, u8 *t)
1927 {
1928 	/* unspecified */
1929 	if (t[9] == 0 || t[9] == 255)
1930 		return 0;
1931 
1932 	/* 1.4 with CVT support gives us real precision, yay */
1933 	if (edid->revision >= 4 && t[10] == 0x04)
1934 		return (t[9] * 10000) - ((t[12] >> 2) * 250);
1935 
1936 	/* 1.3 is pathetic, so fuzz up a bit */
1937 	return t[9] * 10000 + 5001;
1938 }
1939 
1940 static bool
1941 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
1942 	      struct detailed_timing *timing)
1943 {
1944 	u32 max_clock;
1945 	u8 *t = (u8 *)timing;
1946 
1947 	if (!mode_in_hsync_range(mode, edid, t))
1948 		return false;
1949 
1950 	if (!mode_in_vsync_range(mode, edid, t))
1951 		return false;
1952 
1953 	if ((max_clock = range_pixel_clock(edid, t)))
1954 		if (mode->clock > max_clock)
1955 			return false;
1956 
1957 	/* 1.4 max horizontal check */
1958 	if (edid->revision >= 4 && t[10] == 0x04)
1959 		if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1960 			return false;
1961 
1962 	if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1963 		return false;
1964 
1965 	return true;
1966 }
1967 
1968 static bool valid_inferred_mode(const struct drm_connector *connector,
1969 				const struct drm_display_mode *mode)
1970 {
1971 	struct drm_display_mode *m;
1972 	bool ok = false;
1973 
1974 	list_for_each_entry(m, &connector->probed_modes, head) {
1975 		if (mode->hdisplay == m->hdisplay &&
1976 		    mode->vdisplay == m->vdisplay &&
1977 		    drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
1978 			return false; /* duplicated */
1979 		if (mode->hdisplay <= m->hdisplay &&
1980 		    mode->vdisplay <= m->vdisplay)
1981 			ok = true;
1982 	}
1983 	return ok;
1984 }
1985 
1986 static int
1987 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1988 			struct detailed_timing *timing)
1989 {
1990 	int i, modes = 0;
1991 	struct drm_display_mode *newmode;
1992 	struct drm_device *dev = connector->dev;
1993 
1994 	for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1995 		if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
1996 		    valid_inferred_mode(connector, drm_dmt_modes + i)) {
1997 			newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1998 			if (newmode) {
1999 				drm_mode_probed_add(connector, newmode);
2000 				modes++;
2001 			}
2002 		}
2003 	}
2004 
2005 	return modes;
2006 }
2007 
2008 /* fix up 1366x768 mode from 1368x768;
2009  * GFT/CVT can't express 1366 width which isn't dividable by 8
2010  */
2011 static void fixup_mode_1366x768(struct drm_display_mode *mode)
2012 {
2013 	if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
2014 		mode->hdisplay = 1366;
2015 		mode->hsync_start--;
2016 		mode->hsync_end--;
2017 		drm_mode_set_name(mode);
2018 	}
2019 }
2020 
2021 static int
2022 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2023 			struct detailed_timing *timing)
2024 {
2025 	int i, modes = 0;
2026 	struct drm_display_mode *newmode;
2027 	struct drm_device *dev = connector->dev;
2028 
2029 	for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2030 		const struct minimode *m = &extra_modes[i];
2031 		newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
2032 		if (!newmode)
2033 			return modes;
2034 
2035 		fixup_mode_1366x768(newmode);
2036 		if (!mode_in_range(newmode, edid, timing) ||
2037 		    !valid_inferred_mode(connector, newmode)) {
2038 			drm_mode_destroy(dev, newmode);
2039 			continue;
2040 		}
2041 
2042 		drm_mode_probed_add(connector, newmode);
2043 		modes++;
2044 	}
2045 
2046 	return modes;
2047 }
2048 
2049 static int
2050 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2051 			struct detailed_timing *timing)
2052 {
2053 	int i, modes = 0;
2054 	struct drm_display_mode *newmode;
2055 	struct drm_device *dev = connector->dev;
2056 	bool rb = drm_monitor_supports_rb(edid);
2057 
2058 	for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2059 		const struct minimode *m = &extra_modes[i];
2060 		newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2061 		if (!newmode)
2062 			return modes;
2063 
2064 		fixup_mode_1366x768(newmode);
2065 		if (!mode_in_range(newmode, edid, timing) ||
2066 		    !valid_inferred_mode(connector, newmode)) {
2067 			drm_mode_destroy(dev, newmode);
2068 			continue;
2069 		}
2070 
2071 		drm_mode_probed_add(connector, newmode);
2072 		modes++;
2073 	}
2074 
2075 	return modes;
2076 }
2077 
2078 static void
2079 do_inferred_modes(struct detailed_timing *timing, void *c)
2080 {
2081 	struct detailed_mode_closure *closure = c;
2082 	struct detailed_non_pixel *data = &timing->data.other_data;
2083 	struct detailed_data_monitor_range *range = &data->data.range;
2084 
2085 	if (data->type != EDID_DETAIL_MONITOR_RANGE)
2086 		return;
2087 
2088 	closure->modes += drm_dmt_modes_for_range(closure->connector,
2089 						  closure->edid,
2090 						  timing);
2091 
2092 	if (!version_greater(closure->edid, 1, 1))
2093 		return; /* GTF not defined yet */
2094 
2095 	switch (range->flags) {
2096 	case 0x02: /* secondary gtf, XXX could do more */
2097 	case 0x00: /* default gtf */
2098 		closure->modes += drm_gtf_modes_for_range(closure->connector,
2099 							  closure->edid,
2100 							  timing);
2101 		break;
2102 	case 0x04: /* cvt, only in 1.4+ */
2103 		if (!version_greater(closure->edid, 1, 3))
2104 			break;
2105 
2106 		closure->modes += drm_cvt_modes_for_range(closure->connector,
2107 							  closure->edid,
2108 							  timing);
2109 		break;
2110 	case 0x01: /* just the ranges, no formula */
2111 	default:
2112 		break;
2113 	}
2114 }
2115 
2116 static int
2117 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2118 {
2119 	struct detailed_mode_closure closure = {
2120 		connector, edid, 0, 0, 0
2121 	};
2122 
2123 	if (version_greater(edid, 1, 0))
2124 		drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2125 					    &closure);
2126 
2127 	return closure.modes;
2128 }
2129 
2130 static int
2131 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2132 {
2133 	int i, j, m, modes = 0;
2134 	struct drm_display_mode *mode;
2135 	u8 *est = ((u8 *)timing) + 5;
2136 
2137 	for (i = 0; i < 6; i++) {
2138 		for (j = 7; j >= 0; j--) {
2139 			m = (i * 8) + (7 - j);
2140 			if (m >= ARRAY_SIZE(est3_modes))
2141 				break;
2142 			if (est[i] & (1 << j)) {
2143 				mode = drm_mode_find_dmt(connector->dev,
2144 							 est3_modes[m].w,
2145 							 est3_modes[m].h,
2146 							 est3_modes[m].r,
2147 							 est3_modes[m].rb);
2148 				if (mode) {
2149 					drm_mode_probed_add(connector, mode);
2150 					modes++;
2151 				}
2152 			}
2153 		}
2154 	}
2155 
2156 	return modes;
2157 }
2158 
2159 static void
2160 do_established_modes(struct detailed_timing *timing, void *c)
2161 {
2162 	struct detailed_mode_closure *closure = c;
2163 	struct detailed_non_pixel *data = &timing->data.other_data;
2164 
2165 	if (data->type == EDID_DETAIL_EST_TIMINGS)
2166 		closure->modes += drm_est3_modes(closure->connector, timing);
2167 }
2168 
2169 /**
2170  * add_established_modes - get est. modes from EDID and add them
2171  * @connector: connector to add mode(s) to
2172  * @edid: EDID block to scan
2173  *
2174  * Each EDID block contains a bitmap of the supported "established modes" list
2175  * (defined above).  Tease them out and add them to the global modes list.
2176  */
2177 static int
2178 add_established_modes(struct drm_connector *connector, struct edid *edid)
2179 {
2180 	struct drm_device *dev = connector->dev;
2181 	unsigned long est_bits = edid->established_timings.t1 |
2182 		(edid->established_timings.t2 << 8) |
2183 		((edid->established_timings.mfg_rsvd & 0x80) << 9);
2184 	int i, modes = 0;
2185 	struct detailed_mode_closure closure = {
2186 		connector, edid, 0, 0, 0
2187 	};
2188 
2189 	for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2190 		if (est_bits & (1<<i)) {
2191 			struct drm_display_mode *newmode;
2192 			newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2193 			if (newmode) {
2194 				drm_mode_probed_add(connector, newmode);
2195 				modes++;
2196 			}
2197 		}
2198 	}
2199 
2200 	if (version_greater(edid, 1, 0))
2201 		    drm_for_each_detailed_block((u8 *)edid,
2202 						do_established_modes, &closure);
2203 
2204 	return modes + closure.modes;
2205 }
2206 
2207 static void
2208 do_standard_modes(struct detailed_timing *timing, void *c)
2209 {
2210 	struct detailed_mode_closure *closure = c;
2211 	struct detailed_non_pixel *data = &timing->data.other_data;
2212 	struct drm_connector *connector = closure->connector;
2213 	struct edid *edid = closure->edid;
2214 
2215 	if (data->type == EDID_DETAIL_STD_MODES) {
2216 		int i;
2217 		for (i = 0; i < 6; i++) {
2218 			struct std_timing *std;
2219 			struct drm_display_mode *newmode;
2220 
2221 			std = &data->data.timings[i];
2222 			newmode = drm_mode_std(connector, edid, std);
2223 			if (newmode) {
2224 				drm_mode_probed_add(connector, newmode);
2225 				closure->modes++;
2226 			}
2227 		}
2228 	}
2229 }
2230 
2231 /**
2232  * add_standard_modes - get std. modes from EDID and add them
2233  * @connector: connector to add mode(s) to
2234  * @edid: EDID block to scan
2235  *
2236  * Standard modes can be calculated using the appropriate standard (DMT,
2237  * GTF or CVT. Grab them from @edid and add them to the list.
2238  */
2239 static int
2240 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2241 {
2242 	int i, modes = 0;
2243 	struct detailed_mode_closure closure = {
2244 		connector, edid, 0, 0, 0
2245 	};
2246 
2247 	for (i = 0; i < EDID_STD_TIMINGS; i++) {
2248 		struct drm_display_mode *newmode;
2249 
2250 		newmode = drm_mode_std(connector, edid,
2251 				       &edid->standard_timings[i]);
2252 		if (newmode) {
2253 			drm_mode_probed_add(connector, newmode);
2254 			modes++;
2255 		}
2256 	}
2257 
2258 	if (version_greater(edid, 1, 0))
2259 		drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2260 					    &closure);
2261 
2262 	/* XXX should also look for standard codes in VTB blocks */
2263 
2264 	return modes + closure.modes;
2265 }
2266 
2267 static int drm_cvt_modes(struct drm_connector *connector,
2268 			 struct detailed_timing *timing)
2269 {
2270 	int i, j, modes = 0;
2271 	struct drm_display_mode *newmode;
2272 	struct drm_device *dev = connector->dev;
2273 	struct cvt_timing *cvt;
2274 	const int rates[] = { 60, 85, 75, 60, 50 };
2275 	const u8 empty[3] = { 0, 0, 0 };
2276 
2277 	for (i = 0; i < 4; i++) {
2278 		int width = 0, height;
2279 		cvt = &(timing->data.other_data.data.cvt[i]);
2280 
2281 		if (!memcmp(cvt->code, empty, 3))
2282 			continue;
2283 
2284 		height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2285 		switch (cvt->code[1] & 0x0c) {
2286 		case 0x00:
2287 			width = height * 4 / 3;
2288 			break;
2289 		case 0x04:
2290 			width = height * 16 / 9;
2291 			break;
2292 		case 0x08:
2293 			width = height * 16 / 10;
2294 			break;
2295 		case 0x0c:
2296 			width = height * 15 / 9;
2297 			break;
2298 		}
2299 
2300 		for (j = 1; j < 5; j++) {
2301 			if (cvt->code[2] & (1 << j)) {
2302 				newmode = drm_cvt_mode(dev, width, height,
2303 						       rates[j], j == 0,
2304 						       false, false);
2305 				if (newmode) {
2306 					drm_mode_probed_add(connector, newmode);
2307 					modes++;
2308 				}
2309 			}
2310 		}
2311 	}
2312 
2313 	return modes;
2314 }
2315 
2316 static void
2317 do_cvt_mode(struct detailed_timing *timing, void *c)
2318 {
2319 	struct detailed_mode_closure *closure = c;
2320 	struct detailed_non_pixel *data = &timing->data.other_data;
2321 
2322 	if (data->type == EDID_DETAIL_CVT_3BYTE)
2323 		closure->modes += drm_cvt_modes(closure->connector, timing);
2324 }
2325 
2326 static int
2327 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2328 {
2329 	struct detailed_mode_closure closure = {
2330 		connector, edid, 0, 0, 0
2331 	};
2332 
2333 	if (version_greater(edid, 1, 2))
2334 		drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2335 
2336 	/* XXX should also look for CVT codes in VTB blocks */
2337 
2338 	return closure.modes;
2339 }
2340 
2341 static void
2342 do_detailed_mode(struct detailed_timing *timing, void *c)
2343 {
2344 	struct detailed_mode_closure *closure = c;
2345 	struct drm_display_mode *newmode;
2346 
2347 	if (timing->pixel_clock) {
2348 		newmode = drm_mode_detailed(closure->connector->dev,
2349 					    closure->edid, timing,
2350 					    closure->quirks);
2351 		if (!newmode)
2352 			return;
2353 
2354 		if (closure->preferred)
2355 			newmode->type |= DRM_MODE_TYPE_PREFERRED;
2356 
2357 		drm_mode_probed_add(closure->connector, newmode);
2358 		closure->modes++;
2359 		closure->preferred = 0;
2360 	}
2361 }
2362 
2363 /*
2364  * add_detailed_modes - Add modes from detailed timings
2365  * @connector: attached connector
2366  * @edid: EDID block to scan
2367  * @quirks: quirks to apply
2368  */
2369 static int
2370 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2371 		   u32 quirks)
2372 {
2373 	struct detailed_mode_closure closure = {
2374 		connector,
2375 		edid,
2376 		1,
2377 		quirks,
2378 		0
2379 	};
2380 
2381 	if (closure.preferred && !version_greater(edid, 1, 3))
2382 		closure.preferred =
2383 		    (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2384 
2385 	drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2386 
2387 	return closure.modes;
2388 }
2389 
2390 #define AUDIO_BLOCK	0x01
2391 #define VIDEO_BLOCK     0x02
2392 #define VENDOR_BLOCK    0x03
2393 #define SPEAKER_BLOCK	0x04
2394 #define VIDEO_CAPABILITY_BLOCK	0x07
2395 #define EDID_BASIC_AUDIO	(1 << 6)
2396 #define EDID_CEA_YCRCB444	(1 << 5)
2397 #define EDID_CEA_YCRCB422	(1 << 4)
2398 #define EDID_CEA_VCDB_QS	(1 << 6)
2399 
2400 /*
2401  * Search EDID for CEA extension block.
2402  */
2403 static u8 *drm_find_cea_extension(struct edid *edid)
2404 {
2405 	u8 *edid_ext = NULL;
2406 	int i;
2407 
2408 	/* No EDID or EDID extensions */
2409 	if (edid == NULL || edid->extensions == 0)
2410 		return NULL;
2411 
2412 	/* Find CEA extension */
2413 	for (i = 0; i < edid->extensions; i++) {
2414 		edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2415 		if (edid_ext[0] == CEA_EXT)
2416 			break;
2417 	}
2418 
2419 	if (i == edid->extensions)
2420 		return NULL;
2421 
2422 	return edid_ext;
2423 }
2424 
2425 /*
2426  * Calculate the alternate clock for the CEA mode
2427  * (60Hz vs. 59.94Hz etc.)
2428  */
2429 static unsigned int
2430 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2431 {
2432 	unsigned int clock = cea_mode->clock;
2433 
2434 	if (cea_mode->vrefresh % 6 != 0)
2435 		return clock;
2436 
2437 	/*
2438 	 * edid_cea_modes contains the 59.94Hz
2439 	 * variant for 240 and 480 line modes,
2440 	 * and the 60Hz variant otherwise.
2441 	 */
2442 	if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
2443 		clock = clock * 1001 / 1000;
2444 	else
2445 		clock = DIV_ROUND_UP(clock * 1000, 1001);
2446 
2447 	return clock;
2448 }
2449 
2450 /**
2451  * drm_match_cea_mode - look for a CEA mode matching given mode
2452  * @to_match: display mode
2453  *
2454  * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2455  * mode.
2456  */
2457 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2458 {
2459 	u8 mode;
2460 
2461 	if (!to_match->clock)
2462 		return 0;
2463 
2464 	for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
2465 		const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
2466 		unsigned int clock1, clock2;
2467 
2468 		/* Check both 60Hz and 59.94Hz */
2469 		clock1 = cea_mode->clock;
2470 		clock2 = cea_mode_alternate_clock(cea_mode);
2471 
2472 		if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2473 		     KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2474 		    drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
2475 			return mode + 1;
2476 	}
2477 	return 0;
2478 }
2479 EXPORT_SYMBOL(drm_match_cea_mode);
2480 
2481 /**
2482  * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2483  * the input VIC from the CEA mode list
2484  * @video_code: ID given to each of the CEA modes
2485  *
2486  * Returns picture aspect ratio
2487  */
2488 enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
2489 {
2490 	/* return picture aspect ratio for video_code - 1 to access the
2491 	 * right array element
2492 	*/
2493 	return edid_cea_modes[video_code-1].picture_aspect_ratio;
2494 }
2495 EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
2496 
2497 /*
2498  * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2499  * specific block).
2500  *
2501  * It's almost like cea_mode_alternate_clock(), we just need to add an
2502  * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2503  * one.
2504  */
2505 static unsigned int
2506 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
2507 {
2508 	if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
2509 		return hdmi_mode->clock;
2510 
2511 	return cea_mode_alternate_clock(hdmi_mode);
2512 }
2513 
2514 /*
2515  * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2516  * @to_match: display mode
2517  *
2518  * An HDMI mode is one defined in the HDMI vendor specific block.
2519  *
2520  * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2521  */
2522 static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
2523 {
2524 	u8 mode;
2525 
2526 	if (!to_match->clock)
2527 		return 0;
2528 
2529 	for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) {
2530 		const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode];
2531 		unsigned int clock1, clock2;
2532 
2533 		/* Make sure to also match alternate clocks */
2534 		clock1 = hdmi_mode->clock;
2535 		clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2536 
2537 		if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2538 		     KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2539 		    drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
2540 			return mode + 1;
2541 	}
2542 	return 0;
2543 }
2544 
2545 static int
2546 add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
2547 {
2548 	struct drm_device *dev = connector->dev;
2549 	struct drm_display_mode *mode, *tmp;
2550 	LINUX_LIST_HEAD(list);
2551 	int modes = 0;
2552 
2553 	/* Don't add CEA modes if the CEA extension block is missing */
2554 	if (!drm_find_cea_extension(edid))
2555 		return 0;
2556 
2557 	/*
2558 	 * Go through all probed modes and create a new mode
2559 	 * with the alternate clock for certain CEA modes.
2560 	 */
2561 	list_for_each_entry(mode, &connector->probed_modes, head) {
2562 		const struct drm_display_mode *cea_mode = NULL;
2563 		struct drm_display_mode *newmode;
2564 		u8 mode_idx = drm_match_cea_mode(mode) - 1;
2565 		unsigned int clock1, clock2;
2566 
2567 		if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
2568 			cea_mode = &edid_cea_modes[mode_idx];
2569 			clock2 = cea_mode_alternate_clock(cea_mode);
2570 		} else {
2571 			mode_idx = drm_match_hdmi_mode(mode) - 1;
2572 			if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
2573 				cea_mode = &edid_4k_modes[mode_idx];
2574 				clock2 = hdmi_mode_alternate_clock(cea_mode);
2575 			}
2576 		}
2577 
2578 		if (!cea_mode)
2579 			continue;
2580 
2581 		clock1 = cea_mode->clock;
2582 
2583 		if (clock1 == clock2)
2584 			continue;
2585 
2586 		if (mode->clock != clock1 && mode->clock != clock2)
2587 			continue;
2588 
2589 		newmode = drm_mode_duplicate(dev, cea_mode);
2590 		if (!newmode)
2591 			continue;
2592 
2593 		/* Carry over the stereo flags */
2594 		newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
2595 
2596 		/*
2597 		 * The current mode could be either variant. Make
2598 		 * sure to pick the "other" clock for the new mode.
2599 		 */
2600 		if (mode->clock != clock1)
2601 			newmode->clock = clock1;
2602 		else
2603 			newmode->clock = clock2;
2604 
2605 		list_add_tail(&newmode->head, &list);
2606 	}
2607 
2608 	list_for_each_entry_safe(mode, tmp, &list, head) {
2609 		list_del(&mode->head);
2610 		drm_mode_probed_add(connector, mode);
2611 		modes++;
2612 	}
2613 
2614 	return modes;
2615 }
2616 
2617 static struct drm_display_mode *
2618 drm_display_mode_from_vic_index(struct drm_connector *connector,
2619 				const u8 *video_db, u8 video_len,
2620 				u8 video_index)
2621 {
2622 	struct drm_device *dev = connector->dev;
2623 	struct drm_display_mode *newmode;
2624 	u8 cea_mode;
2625 
2626 	if (video_db == NULL || video_index >= video_len)
2627 		return NULL;
2628 
2629 	/* CEA modes are numbered 1..127 */
2630 	cea_mode = (video_db[video_index] & 127) - 1;
2631 	if (cea_mode >= ARRAY_SIZE(edid_cea_modes))
2632 		return NULL;
2633 
2634 	newmode = drm_mode_duplicate(dev, &edid_cea_modes[cea_mode]);
2635 	if (!newmode)
2636 		return NULL;
2637 
2638 	newmode->vrefresh = 0;
2639 
2640 	return newmode;
2641 }
2642 
2643 static int
2644 do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len)
2645 {
2646 	int i, modes = 0;
2647 
2648 	for (i = 0; i < len; i++) {
2649 		struct drm_display_mode *mode;
2650 		mode = drm_display_mode_from_vic_index(connector, db, len, i);
2651 		if (mode) {
2652 			drm_mode_probed_add(connector, mode);
2653 			modes++;
2654 		}
2655 	}
2656 
2657 	return modes;
2658 }
2659 
2660 struct stereo_mandatory_mode {
2661 	int width, height, vrefresh;
2662 	unsigned int flags;
2663 };
2664 
2665 static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
2666 	{ 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2667 	{ 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
2668 	{ 1920, 1080, 50,
2669 	  DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2670 	{ 1920, 1080, 60,
2671 	  DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2672 	{ 1280, 720,  50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2673 	{ 1280, 720,  50, DRM_MODE_FLAG_3D_FRAME_PACKING },
2674 	{ 1280, 720,  60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2675 	{ 1280, 720,  60, DRM_MODE_FLAG_3D_FRAME_PACKING }
2676 };
2677 
2678 static bool
2679 stereo_match_mandatory(const struct drm_display_mode *mode,
2680 		       const struct stereo_mandatory_mode *stereo_mode)
2681 {
2682 	unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
2683 
2684 	return mode->hdisplay == stereo_mode->width &&
2685 	       mode->vdisplay == stereo_mode->height &&
2686 	       interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
2687 	       drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
2688 }
2689 
2690 static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
2691 {
2692 	struct drm_device *dev = connector->dev;
2693 	struct drm_display_mode *mode;
2694 	struct list_head stereo_modes;
2695 	int modes = 0, i;
2696 
2697 	INIT_LIST_HEAD(&stereo_modes);
2698 
2699 	list_for_each_entry(mode, &connector->probed_modes, head) {
2700 		for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
2701 			const struct stereo_mandatory_mode *mandatory;
2702 			struct drm_display_mode *new_mode;
2703 
2704 			if (!stereo_match_mandatory(mode,
2705 						    &stereo_mandatory_modes[i]))
2706 				continue;
2707 
2708 			mandatory = &stereo_mandatory_modes[i];
2709 			new_mode = drm_mode_duplicate(dev, mode);
2710 			if (!new_mode)
2711 				continue;
2712 
2713 			new_mode->flags |= mandatory->flags;
2714 			list_add_tail(&new_mode->head, &stereo_modes);
2715 			modes++;
2716 		}
2717 	}
2718 
2719 	list_splice_tail(&stereo_modes, &connector->probed_modes);
2720 
2721 	return modes;
2722 }
2723 
2724 static int add_hdmi_mode(struct drm_connector *connector, u8 vic)
2725 {
2726 	struct drm_device *dev = connector->dev;
2727 	struct drm_display_mode *newmode;
2728 
2729 	vic--; /* VICs start at 1 */
2730 	if (vic >= ARRAY_SIZE(edid_4k_modes)) {
2731 		DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
2732 		return 0;
2733 	}
2734 
2735 	newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
2736 	if (!newmode)
2737 		return 0;
2738 
2739 	drm_mode_probed_add(connector, newmode);
2740 
2741 	return 1;
2742 }
2743 
2744 static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,
2745 			       const u8 *video_db, u8 video_len, u8 video_index)
2746 {
2747 	struct drm_display_mode *newmode;
2748 	int modes = 0;
2749 
2750 	if (structure & (1 << 0)) {
2751 		newmode = drm_display_mode_from_vic_index(connector, video_db,
2752 							  video_len,
2753 							  video_index);
2754 		if (newmode) {
2755 			newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING;
2756 			drm_mode_probed_add(connector, newmode);
2757 			modes++;
2758 		}
2759 	}
2760 	if (structure & (1 << 6)) {
2761 		newmode = drm_display_mode_from_vic_index(connector, video_db,
2762 							  video_len,
2763 							  video_index);
2764 		if (newmode) {
2765 			newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2766 			drm_mode_probed_add(connector, newmode);
2767 			modes++;
2768 		}
2769 	}
2770 	if (structure & (1 << 8)) {
2771 		newmode = drm_display_mode_from_vic_index(connector, video_db,
2772 							  video_len,
2773 							  video_index);
2774 		if (newmode) {
2775 			newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
2776 			drm_mode_probed_add(connector, newmode);
2777 			modes++;
2778 		}
2779 	}
2780 
2781 	return modes;
2782 }
2783 
2784 /*
2785  * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
2786  * @connector: connector corresponding to the HDMI sink
2787  * @db: start of the CEA vendor specific block
2788  * @len: length of the CEA block payload, ie. one can access up to db[len]
2789  *
2790  * Parses the HDMI VSDB looking for modes to add to @connector. This function
2791  * also adds the stereo 3d modes when applicable.
2792  */
2793 static int
2794 do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len,
2795 		   const u8 *video_db, u8 video_len)
2796 {
2797 	int modes = 0, offset = 0, i, multi_present = 0, multi_len;
2798 	u8 vic_len, hdmi_3d_len = 0;
2799 	u16 mask;
2800 	u16 structure_all;
2801 
2802 	if (len < 8)
2803 		goto out;
2804 
2805 	/* no HDMI_Video_Present */
2806 	if (!(db[8] & (1 << 5)))
2807 		goto out;
2808 
2809 	/* Latency_Fields_Present */
2810 	if (db[8] & (1 << 7))
2811 		offset += 2;
2812 
2813 	/* I_Latency_Fields_Present */
2814 	if (db[8] & (1 << 6))
2815 		offset += 2;
2816 
2817 	/* the declared length is not long enough for the 2 first bytes
2818 	 * of additional video format capabilities */
2819 	if (len < (8 + offset + 2))
2820 		goto out;
2821 
2822 	/* 3D_Present */
2823 	offset++;
2824 	if (db[8 + offset] & (1 << 7)) {
2825 		modes += add_hdmi_mandatory_stereo_modes(connector);
2826 
2827 		/* 3D_Multi_present */
2828 		multi_present = (db[8 + offset] & 0x60) >> 5;
2829 	}
2830 
2831 	offset++;
2832 	vic_len = db[8 + offset] >> 5;
2833 	hdmi_3d_len = db[8 + offset] & 0x1f;
2834 
2835 	for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
2836 		u8 vic;
2837 
2838 		vic = db[9 + offset + i];
2839 		modes += add_hdmi_mode(connector, vic);
2840 	}
2841 	offset += 1 + vic_len;
2842 
2843 	if (multi_present == 1)
2844 		multi_len = 2;
2845 	else if (multi_present == 2)
2846 		multi_len = 4;
2847 	else
2848 		multi_len = 0;
2849 
2850 	if (len < (8 + offset + hdmi_3d_len - 1))
2851 		goto out;
2852 
2853 	if (hdmi_3d_len < multi_len)
2854 		goto out;
2855 
2856 	if (multi_present == 1 || multi_present == 2) {
2857 		/* 3D_Structure_ALL */
2858 		structure_all = (db[8 + offset] << 8) | db[9 + offset];
2859 
2860 		/* check if 3D_MASK is present */
2861 		if (multi_present == 2)
2862 			mask = (db[10 + offset] << 8) | db[11 + offset];
2863 		else
2864 			mask = 0xffff;
2865 
2866 		for (i = 0; i < 16; i++) {
2867 			if (mask & (1 << i))
2868 				modes += add_3d_struct_modes(connector,
2869 						structure_all,
2870 						video_db,
2871 						video_len, i);
2872 		}
2873 	}
2874 
2875 	offset += multi_len;
2876 
2877 	for (i = 0; i < (hdmi_3d_len - multi_len); i++) {
2878 		int vic_index;
2879 		struct drm_display_mode *newmode = NULL;
2880 		unsigned int newflag = 0;
2881 		bool detail_present;
2882 
2883 		detail_present = ((db[8 + offset + i] & 0x0f) > 7);
2884 
2885 		if (detail_present && (i + 1 == hdmi_3d_len - multi_len))
2886 			break;
2887 
2888 		/* 2D_VIC_order_X */
2889 		vic_index = db[8 + offset + i] >> 4;
2890 
2891 		/* 3D_Structure_X */
2892 		switch (db[8 + offset + i] & 0x0f) {
2893 		case 0:
2894 			newflag = DRM_MODE_FLAG_3D_FRAME_PACKING;
2895 			break;
2896 		case 6:
2897 			newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2898 			break;
2899 		case 8:
2900 			/* 3D_Detail_X */
2901 			if ((db[9 + offset + i] >> 4) == 1)
2902 				newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
2903 			break;
2904 		}
2905 
2906 		if (newflag != 0) {
2907 			newmode = drm_display_mode_from_vic_index(connector,
2908 								  video_db,
2909 								  video_len,
2910 								  vic_index);
2911 
2912 			if (newmode) {
2913 				newmode->flags |= newflag;
2914 				drm_mode_probed_add(connector, newmode);
2915 				modes++;
2916 			}
2917 		}
2918 
2919 		if (detail_present)
2920 			i++;
2921 	}
2922 
2923 out:
2924 	return modes;
2925 }
2926 
2927 static int
2928 cea_db_payload_len(const u8 *db)
2929 {
2930 	return db[0] & 0x1f;
2931 }
2932 
2933 static int
2934 cea_db_tag(const u8 *db)
2935 {
2936 	return db[0] >> 5;
2937 }
2938 
2939 static int
2940 cea_revision(const u8 *cea)
2941 {
2942 	return cea[1];
2943 }
2944 
2945 static int
2946 cea_db_offsets(const u8 *cea, int *start, int *end)
2947 {
2948 	/* Data block offset in CEA extension block */
2949 	*start = 4;
2950 	*end = cea[2];
2951 	if (*end == 0)
2952 		*end = 127;
2953 	if (*end < 4 || *end > 127)
2954 		return -ERANGE;
2955 	return 0;
2956 }
2957 
2958 static bool cea_db_is_hdmi_vsdb(const u8 *db)
2959 {
2960 	int hdmi_id;
2961 
2962 	if (cea_db_tag(db) != VENDOR_BLOCK)
2963 		return false;
2964 
2965 	if (cea_db_payload_len(db) < 5)
2966 		return false;
2967 
2968 	hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
2969 
2970 	return hdmi_id == HDMI_IEEE_OUI;
2971 }
2972 
2973 #define for_each_cea_db(cea, i, start, end) \
2974 	for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
2975 
2976 static int
2977 add_cea_modes(struct drm_connector *connector, struct edid *edid)
2978 {
2979 	const u8 *cea = drm_find_cea_extension(edid);
2980 	const u8 *db, *hdmi = NULL, *video = NULL;
2981 	u8 dbl, hdmi_len, video_len = 0;
2982 	int modes = 0;
2983 
2984 	if (cea && cea_revision(cea) >= 3) {
2985 		int i, start, end;
2986 
2987 		if (cea_db_offsets(cea, &start, &end))
2988 			return 0;
2989 
2990 		for_each_cea_db(cea, i, start, end) {
2991 			db = &cea[i];
2992 			dbl = cea_db_payload_len(db);
2993 
2994 			if (cea_db_tag(db) == VIDEO_BLOCK) {
2995 				video = db + 1;
2996 				video_len = dbl;
2997 				modes += do_cea_modes(connector, video, dbl);
2998 			}
2999 			else if (cea_db_is_hdmi_vsdb(db)) {
3000 				hdmi = db;
3001 				hdmi_len = dbl;
3002 			}
3003 		}
3004 	}
3005 
3006 	/*
3007 	 * We parse the HDMI VSDB after having added the cea modes as we will
3008 	 * be patching their flags when the sink supports stereo 3D.
3009 	 */
3010 	if (hdmi)
3011 		modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video,
3012 					    video_len);
3013 
3014 	return modes;
3015 }
3016 
3017 static void
3018 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
3019 {
3020 	u8 len = cea_db_payload_len(db);
3021 
3022 	if (len >= 6) {
3023 		connector->eld[5] |= (db[6] >> 7) << 1;  /* Supports_AI */
3024 		connector->dvi_dual = db[6] & 1;
3025 	}
3026 	if (len >= 7)
3027 		connector->max_tmds_clock = db[7] * 5;
3028 	if (len >= 8) {
3029 		connector->latency_present[0] = db[8] >> 7;
3030 		connector->latency_present[1] = (db[8] >> 6) & 1;
3031 	}
3032 	if (len >= 9)
3033 		connector->video_latency[0] = db[9];
3034 	if (len >= 10)
3035 		connector->audio_latency[0] = db[10];
3036 	if (len >= 11)
3037 		connector->video_latency[1] = db[11];
3038 	if (len >= 12)
3039 		connector->audio_latency[1] = db[12];
3040 
3041 	DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3042 		    "max TMDS clock %d, "
3043 		    "latency present %d %d, "
3044 		    "video latency %d %d, "
3045 		    "audio latency %d %d\n",
3046 		    connector->dvi_dual,
3047 		    connector->max_tmds_clock,
3048 	      (int) connector->latency_present[0],
3049 	      (int) connector->latency_present[1],
3050 		    connector->video_latency[0],
3051 		    connector->video_latency[1],
3052 		    connector->audio_latency[0],
3053 		    connector->audio_latency[1]);
3054 }
3055 
3056 static void
3057 monitor_name(struct detailed_timing *t, void *data)
3058 {
3059 	if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
3060 		*(u8 **)data = t->data.other_data.data.str.str;
3061 }
3062 
3063 /**
3064  * drm_edid_to_eld - build ELD from EDID
3065  * @connector: connector corresponding to the HDMI/DP sink
3066  * @edid: EDID to parse
3067  *
3068  * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
3069  * Conn_Type, HDCP and Port_ID ELD fields are left for the graphics driver to
3070  * fill in.
3071  */
3072 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
3073 {
3074 	uint8_t *eld = connector->eld;
3075 	u8 *cea;
3076 	u8 *name;
3077 	u8 *db;
3078 	int sad_count = 0;
3079 	int mnl;
3080 	int dbl;
3081 
3082 	memset(eld, 0, sizeof(connector->eld));
3083 
3084 	cea = drm_find_cea_extension(edid);
3085 	if (!cea) {
3086 		DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
3087 		return;
3088 	}
3089 
3090 	name = NULL;
3091 	drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
3092 	for (mnl = 0; name && mnl < 13; mnl++) {
3093 		if (name[mnl] == 0x0a)
3094 			break;
3095 		eld[20 + mnl] = name[mnl];
3096 	}
3097 	eld[4] = (cea[1] << 5) | mnl;
3098 	DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
3099 
3100 	eld[0] = 2 << 3;		/* ELD version: 2 */
3101 
3102 	eld[16] = edid->mfg_id[0];
3103 	eld[17] = edid->mfg_id[1];
3104 	eld[18] = edid->prod_code[0];
3105 	eld[19] = edid->prod_code[1];
3106 
3107 	if (cea_revision(cea) >= 3) {
3108 		int i, start, end;
3109 
3110 		if (cea_db_offsets(cea, &start, &end)) {
3111 			start = 0;
3112 			end = 0;
3113 		}
3114 
3115 		for_each_cea_db(cea, i, start, end) {
3116 			db = &cea[i];
3117 			dbl = cea_db_payload_len(db);
3118 
3119 			switch (cea_db_tag(db)) {
3120 			case AUDIO_BLOCK:
3121 				/* Audio Data Block, contains SADs */
3122 				sad_count = dbl / 3;
3123 				if (dbl >= 1)
3124 					memcpy(eld + 20 + mnl, &db[1], dbl);
3125 				break;
3126 			case SPEAKER_BLOCK:
3127 				/* Speaker Allocation Data Block */
3128 				if (dbl >= 1)
3129 					eld[7] = db[1];
3130 				break;
3131 			case VENDOR_BLOCK:
3132 				/* HDMI Vendor-Specific Data Block */
3133 				if (cea_db_is_hdmi_vsdb(db))
3134 					parse_hdmi_vsdb(connector, db);
3135 				break;
3136 			default:
3137 				break;
3138 			}
3139 		}
3140 	}
3141 	eld[5] |= sad_count << 4;
3142 	eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
3143 
3144 	DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
3145 }
3146 EXPORT_SYMBOL(drm_edid_to_eld);
3147 
3148 /**
3149  * drm_edid_to_sad - extracts SADs from EDID
3150  * @edid: EDID to parse
3151  * @sads: pointer that will be set to the extracted SADs
3152  *
3153  * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
3154  *
3155  * Note: The returned pointer needs to be freed using kfree().
3156  *
3157  * Return: The number of found SADs or negative number on error.
3158  */
3159 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
3160 {
3161 	int count = 0;
3162 	int i, start, end, dbl;
3163 	u8 *cea;
3164 
3165 	cea = drm_find_cea_extension(edid);
3166 	if (!cea) {
3167 		DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3168 		return -ENOENT;
3169 	}
3170 
3171 	if (cea_revision(cea) < 3) {
3172 		DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3173 		return -EOPNOTSUPP;
3174 	}
3175 
3176 	if (cea_db_offsets(cea, &start, &end)) {
3177 		DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3178 		return -EPROTO;
3179 	}
3180 
3181 	for_each_cea_db(cea, i, start, end) {
3182 		u8 *db = &cea[i];
3183 
3184 		if (cea_db_tag(db) == AUDIO_BLOCK) {
3185 			int j;
3186 			dbl = cea_db_payload_len(db);
3187 
3188 			count = dbl / 3; /* SAD is 3B */
3189 			*sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
3190 			if (!*sads)
3191 				return -ENOMEM;
3192 			for (j = 0; j < count; j++) {
3193 				u8 *sad = &db[1 + j * 3];
3194 
3195 				(*sads)[j].format = (sad[0] & 0x78) >> 3;
3196 				(*sads)[j].channels = sad[0] & 0x7;
3197 				(*sads)[j].freq = sad[1] & 0x7F;
3198 				(*sads)[j].byte2 = sad[2];
3199 			}
3200 			break;
3201 		}
3202 	}
3203 
3204 	return count;
3205 }
3206 EXPORT_SYMBOL(drm_edid_to_sad);
3207 
3208 /**
3209  * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
3210  * @edid: EDID to parse
3211  * @sadb: pointer to the speaker block
3212  *
3213  * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
3214  *
3215  * Note: The returned pointer needs to be freed using kfree().
3216  *
3217  * Return: The number of found Speaker Allocation Blocks or negative number on
3218  * error.
3219  */
3220 int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
3221 {
3222 	int count = 0;
3223 	int i, start, end, dbl;
3224 	const u8 *cea;
3225 
3226 	cea = drm_find_cea_extension(edid);
3227 	if (!cea) {
3228 		DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3229 		return -ENOENT;
3230 	}
3231 
3232 	if (cea_revision(cea) < 3) {
3233 		DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3234 		return -ENOTSUPP;
3235 	}
3236 
3237 	if (cea_db_offsets(cea, &start, &end)) {
3238 		DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3239 		return -EPROTO;
3240 	}
3241 
3242 	for_each_cea_db(cea, i, start, end) {
3243 		const u8 *db = &cea[i];
3244 
3245 		if (cea_db_tag(db) == SPEAKER_BLOCK) {
3246 			dbl = cea_db_payload_len(db);
3247 
3248 			/* Speaker Allocation Data Block */
3249 			if (dbl == 3) {
3250 				*sadb = kmemdup(&db[1], dbl, GFP_KERNEL);
3251 				if (!*sadb)
3252 					return -ENOMEM;
3253 				count = dbl;
3254 				break;
3255 			}
3256 		}
3257 	}
3258 
3259 	return count;
3260 }
3261 EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
3262 
3263 /**
3264  * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
3265  * @connector: connector associated with the HDMI/DP sink
3266  * @mode: the display mode
3267  *
3268  * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
3269  * the sink doesn't support audio or video.
3270  */
3271 int drm_av_sync_delay(struct drm_connector *connector,
3272 		      struct drm_display_mode *mode)
3273 {
3274 	int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
3275 	int a, v;
3276 
3277 	if (!connector->latency_present[0])
3278 		return 0;
3279 	if (!connector->latency_present[1])
3280 		i = 0;
3281 
3282 	a = connector->audio_latency[i];
3283 	v = connector->video_latency[i];
3284 
3285 	/*
3286 	 * HDMI/DP sink doesn't support audio or video?
3287 	 */
3288 	if (a == 255 || v == 255)
3289 		return 0;
3290 
3291 	/*
3292 	 * Convert raw EDID values to millisecond.
3293 	 * Treat unknown latency as 0ms.
3294 	 */
3295 	if (a)
3296 		a = min(2 * (a - 1), 500);
3297 	if (v)
3298 		v = min(2 * (v - 1), 500);
3299 
3300 	return max(v - a, 0);
3301 }
3302 EXPORT_SYMBOL(drm_av_sync_delay);
3303 
3304 /**
3305  * drm_select_eld - select one ELD from multiple HDMI/DP sinks
3306  * @encoder: the encoder just changed display mode
3307  * @mode: the adjusted display mode
3308  *
3309  * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
3310  * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
3311  *
3312  * Return: The connector associated with the first HDMI/DP sink that has ELD
3313  * attached to it.
3314  */
3315 struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
3316 				     struct drm_display_mode *mode)
3317 {
3318 	struct drm_connector *connector;
3319 	struct drm_device *dev = encoder->dev;
3320 
3321 	WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
3322 	WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
3323 
3324 	list_for_each_entry(connector, &dev->mode_config.connector_list, head)
3325 		if (connector->encoder == encoder && connector->eld[0])
3326 			return connector;
3327 
3328 	return NULL;
3329 }
3330 EXPORT_SYMBOL(drm_select_eld);
3331 
3332 /**
3333  * drm_detect_hdmi_monitor - detect whether monitor is HDMI
3334  * @edid: monitor EDID information
3335  *
3336  * Parse the CEA extension according to CEA-861-B.
3337  *
3338  * Return: True if the monitor is HDMI, false if not or unknown.
3339  */
3340 bool drm_detect_hdmi_monitor(struct edid *edid)
3341 {
3342 	u8 *edid_ext;
3343 	int i;
3344 	int start_offset, end_offset;
3345 
3346 	edid_ext = drm_find_cea_extension(edid);
3347 	if (!edid_ext)
3348 		return false;
3349 
3350 	if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3351 		return false;
3352 
3353 	/*
3354 	 * Because HDMI identifier is in Vendor Specific Block,
3355 	 * search it from all data blocks of CEA extension.
3356 	 */
3357 	for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3358 		if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
3359 			return true;
3360 	}
3361 
3362 	return false;
3363 }
3364 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
3365 
3366 /**
3367  * drm_detect_monitor_audio - check monitor audio capability
3368  * @edid: EDID block to scan
3369  *
3370  * Monitor should have CEA extension block.
3371  * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3372  * audio' only. If there is any audio extension block and supported
3373  * audio format, assume at least 'basic audio' support, even if 'basic
3374  * audio' is not defined in EDID.
3375  *
3376  * Return: True if the monitor supports audio, false otherwise.
3377  */
3378 bool drm_detect_monitor_audio(struct edid *edid)
3379 {
3380 	u8 *edid_ext;
3381 	int i, j;
3382 	bool has_audio = false;
3383 	int start_offset, end_offset;
3384 
3385 	edid_ext = drm_find_cea_extension(edid);
3386 	if (!edid_ext)
3387 		goto end;
3388 
3389 	has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
3390 
3391 	if (has_audio) {
3392 		DRM_DEBUG_KMS("Monitor has basic audio support\n");
3393 		goto end;
3394 	}
3395 
3396 	if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3397 		goto end;
3398 
3399 	for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3400 		if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
3401 			has_audio = true;
3402 			for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
3403 				DRM_DEBUG_KMS("CEA audio format %d\n",
3404 					      (edid_ext[i + j] >> 3) & 0xf);
3405 			goto end;
3406 		}
3407 	}
3408 end:
3409 	return has_audio;
3410 }
3411 EXPORT_SYMBOL(drm_detect_monitor_audio);
3412 
3413 /**
3414  * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
3415  * @edid: EDID block to scan
3416  *
3417  * Check whether the monitor reports the RGB quantization range selection
3418  * as supported. The AVI infoframe can then be used to inform the monitor
3419  * which quantization range (full or limited) is used.
3420  *
3421  * Return: True if the RGB quantization range is selectable, false otherwise.
3422  */
3423 bool drm_rgb_quant_range_selectable(struct edid *edid)
3424 {
3425 	u8 *edid_ext;
3426 	int i, start, end;
3427 
3428 	edid_ext = drm_find_cea_extension(edid);
3429 	if (!edid_ext)
3430 		return false;
3431 
3432 	if (cea_db_offsets(edid_ext, &start, &end))
3433 		return false;
3434 
3435 	for_each_cea_db(edid_ext, i, start, end) {
3436 		if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
3437 		    cea_db_payload_len(&edid_ext[i]) == 2) {
3438 			DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
3439 			return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
3440 		}
3441 	}
3442 
3443 	return false;
3444 }
3445 EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
3446 
3447 /**
3448  * drm_assign_hdmi_deep_color_info - detect whether monitor supports
3449  * hdmi deep color modes and update drm_display_info if so.
3450  * @edid: monitor EDID information
3451  * @info: Updated with maximum supported deep color bpc and color format
3452  *        if deep color supported.
3453  * @connector: DRM connector, used only for debug output
3454  *
3455  * Parse the CEA extension according to CEA-861-B.
3456  * Return true if HDMI deep color supported, false if not or unknown.
3457  */
3458 static bool drm_assign_hdmi_deep_color_info(struct edid *edid,
3459                                             struct drm_display_info *info,
3460                                             struct drm_connector *connector)
3461 {
3462 	u8 *edid_ext, *hdmi;
3463 	int i;
3464 	int start_offset, end_offset;
3465 	unsigned int dc_bpc = 0;
3466 
3467 	edid_ext = drm_find_cea_extension(edid);
3468 	if (!edid_ext)
3469 		return false;
3470 
3471 	if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3472 		return false;
3473 
3474 	/*
3475 	 * Because HDMI identifier is in Vendor Specific Block,
3476 	 * search it from all data blocks of CEA extension.
3477 	 */
3478 	for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3479 		if (cea_db_is_hdmi_vsdb(&edid_ext[i])) {
3480 			/* HDMI supports at least 8 bpc */
3481 			info->bpc = 8;
3482 
3483 			hdmi = &edid_ext[i];
3484 			if (cea_db_payload_len(hdmi) < 6)
3485 				return false;
3486 
3487 			if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
3488 				dc_bpc = 10;
3489 				info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
3490 				DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
3491 						  connector->name);
3492 			}
3493 
3494 			if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
3495 				dc_bpc = 12;
3496 				info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
3497 				DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
3498 						  connector->name);
3499 			}
3500 
3501 			if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
3502 				dc_bpc = 16;
3503 				info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
3504 				DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
3505 						  connector->name);
3506 			}
3507 
3508 			if (dc_bpc > 0) {
3509 				DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n",
3510 						  connector->name, dc_bpc);
3511 				info->bpc = dc_bpc;
3512 
3513 				/*
3514 				 * Deep color support mandates RGB444 support for all video
3515 				 * modes and forbids YCRCB422 support for all video modes per
3516 				 * HDMI 1.3 spec.
3517 				 */
3518 				info->color_formats = DRM_COLOR_FORMAT_RGB444;
3519 
3520 				/* YCRCB444 is optional according to spec. */
3521 				if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
3522 					info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3523 					DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
3524 							  connector->name);
3525 				}
3526 
3527 				/*
3528 				 * Spec says that if any deep color mode is supported at all,
3529 				 * then deep color 36 bit must be supported.
3530 				 */
3531 				if (!(hdmi[6] & DRM_EDID_HDMI_DC_36)) {
3532 					DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n",
3533 							  connector->name);
3534 				}
3535 
3536 				return true;
3537 			}
3538 			else {
3539 				DRM_DEBUG("%s: No deep color support on this HDMI sink.\n",
3540 						  connector->name);
3541 			}
3542 		}
3543 	}
3544 
3545 	return false;
3546 }
3547 
3548 /**
3549  * drm_add_display_info - pull display info out if present
3550  * @edid: EDID data
3551  * @info: display info (attached to connector)
3552  * @connector: connector whose edid is used to build display info
3553  *
3554  * Grab any available display info and stuff it into the drm_display_info
3555  * structure that's part of the connector.  Useful for tracking bpp and
3556  * color spaces.
3557  */
3558 static void drm_add_display_info(struct edid *edid,
3559                                  struct drm_display_info *info,
3560                                  struct drm_connector *connector)
3561 {
3562 	u8 *edid_ext;
3563 
3564 	info->width_mm = edid->width_cm * 10;
3565 	info->height_mm = edid->height_cm * 10;
3566 
3567 	/* driver figures it out in this case */
3568 	info->bpc = 0;
3569 	info->color_formats = 0;
3570 
3571 	if (edid->revision < 3)
3572 		return;
3573 
3574 	if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
3575 		return;
3576 
3577 	/* Get data from CEA blocks if present */
3578 	edid_ext = drm_find_cea_extension(edid);
3579 	if (edid_ext) {
3580 		info->cea_rev = edid_ext[1];
3581 
3582 		/* The existence of a CEA block should imply RGB support */
3583 		info->color_formats = DRM_COLOR_FORMAT_RGB444;
3584 		if (edid_ext[3] & EDID_CEA_YCRCB444)
3585 			info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3586 		if (edid_ext[3] & EDID_CEA_YCRCB422)
3587 			info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3588 	}
3589 
3590 	/* HDMI deep color modes supported? Assign to info, if so */
3591 	drm_assign_hdmi_deep_color_info(edid, info, connector);
3592 
3593 	/* Only defined for 1.4 with digital displays */
3594 	if (edid->revision < 4)
3595 		return;
3596 
3597 	switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
3598 	case DRM_EDID_DIGITAL_DEPTH_6:
3599 		info->bpc = 6;
3600 		break;
3601 	case DRM_EDID_DIGITAL_DEPTH_8:
3602 		info->bpc = 8;
3603 		break;
3604 	case DRM_EDID_DIGITAL_DEPTH_10:
3605 		info->bpc = 10;
3606 		break;
3607 	case DRM_EDID_DIGITAL_DEPTH_12:
3608 		info->bpc = 12;
3609 		break;
3610 	case DRM_EDID_DIGITAL_DEPTH_14:
3611 		info->bpc = 14;
3612 		break;
3613 	case DRM_EDID_DIGITAL_DEPTH_16:
3614 		info->bpc = 16;
3615 		break;
3616 	case DRM_EDID_DIGITAL_DEPTH_UNDEF:
3617 	default:
3618 		info->bpc = 0;
3619 		break;
3620 	}
3621 
3622 	DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
3623 			  connector->name, info->bpc);
3624 
3625 	info->color_formats |= DRM_COLOR_FORMAT_RGB444;
3626 	if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
3627 		info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3628 	if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
3629 		info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3630 }
3631 
3632 /**
3633  * drm_add_edid_modes - add modes from EDID data, if available
3634  * @connector: connector we're probing
3635  * @edid: EDID data
3636  *
3637  * Add the specified modes to the connector's mode list.
3638  *
3639  * Return: The number of modes added or 0 if we couldn't find any.
3640  */
3641 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
3642 {
3643 	int num_modes = 0;
3644 	u32 quirks;
3645 
3646 	if (edid == NULL) {
3647 		return 0;
3648 	}
3649 	if (!drm_edid_is_valid(edid)) {
3650 		dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
3651 			 connector->name);
3652 		return 0;
3653 	}
3654 
3655 	quirks = edid_get_quirks(edid);
3656 
3657 	/*
3658 	 * EDID spec says modes should be preferred in this order:
3659 	 * - preferred detailed mode
3660 	 * - other detailed modes from base block
3661 	 * - detailed modes from extension blocks
3662 	 * - CVT 3-byte code modes
3663 	 * - standard timing codes
3664 	 * - established timing codes
3665 	 * - modes inferred from GTF or CVT range information
3666 	 *
3667 	 * We get this pretty much right.
3668 	 *
3669 	 * XXX order for additional mode types in extension blocks?
3670 	 */
3671 	num_modes += add_detailed_modes(connector, edid, quirks);
3672 	num_modes += add_cvt_modes(connector, edid);
3673 	num_modes += add_standard_modes(connector, edid);
3674 	num_modes += add_established_modes(connector, edid);
3675 	if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
3676 		num_modes += add_inferred_modes(connector, edid);
3677 	num_modes += add_cea_modes(connector, edid);
3678 	num_modes += add_alternate_cea_modes(connector, edid);
3679 
3680 	if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
3681 		edid_fixup_preferred(connector, quirks);
3682 
3683 	drm_add_display_info(edid, &connector->display_info, connector);
3684 
3685 	if (quirks & EDID_QUIRK_FORCE_8BPC)
3686 		connector->display_info.bpc = 8;
3687 
3688 	if (quirks & EDID_QUIRK_FORCE_12BPC)
3689 		connector->display_info.bpc = 12;
3690 
3691 	return num_modes;
3692 }
3693 EXPORT_SYMBOL(drm_add_edid_modes);
3694 
3695 /**
3696  * drm_add_modes_noedid - add modes for the connectors without EDID
3697  * @connector: connector we're probing
3698  * @hdisplay: the horizontal display limit
3699  * @vdisplay: the vertical display limit
3700  *
3701  * Add the specified modes to the connector's mode list. Only when the
3702  * hdisplay/vdisplay is not beyond the given limit, it will be added.
3703  *
3704  * Return: The number of modes added or 0 if we couldn't find any.
3705  */
3706 int drm_add_modes_noedid(struct drm_connector *connector,
3707 			int hdisplay, int vdisplay)
3708 {
3709 	int i, count, num_modes = 0;
3710 	struct drm_display_mode *mode;
3711 	struct drm_device *dev = connector->dev;
3712 
3713 	count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
3714 	if (hdisplay < 0)
3715 		hdisplay = 0;
3716 	if (vdisplay < 0)
3717 		vdisplay = 0;
3718 
3719 	for (i = 0; i < count; i++) {
3720 		const struct drm_display_mode *ptr = &drm_dmt_modes[i];
3721 		if (hdisplay && vdisplay) {
3722 			/*
3723 			 * Only when two are valid, they will be used to check
3724 			 * whether the mode should be added to the mode list of
3725 			 * the connector.
3726 			 */
3727 			if (ptr->hdisplay > hdisplay ||
3728 					ptr->vdisplay > vdisplay)
3729 				continue;
3730 		}
3731 		if (drm_mode_vrefresh(ptr) > 61)
3732 			continue;
3733 		mode = drm_mode_duplicate(dev, ptr);
3734 		if (mode) {
3735 			drm_mode_probed_add(connector, mode);
3736 			num_modes++;
3737 		}
3738 	}
3739 	return num_modes;
3740 }
3741 EXPORT_SYMBOL(drm_add_modes_noedid);
3742 
3743 /**
3744  * drm_set_preferred_mode - Sets the preferred mode of a connector
3745  * @connector: connector whose mode list should be processed
3746  * @hpref: horizontal resolution of preferred mode
3747  * @vpref: vertical resolution of preferred mode
3748  *
3749  * Marks a mode as preferred if it matches the resolution specified by @hpref
3750  * and @vpref.
3751  */
3752 void drm_set_preferred_mode(struct drm_connector *connector,
3753 			   int hpref, int vpref)
3754 {
3755 	struct drm_display_mode *mode;
3756 
3757 	list_for_each_entry(mode, &connector->probed_modes, head) {
3758 		if (mode->hdisplay == hpref &&
3759 		    mode->vdisplay == vpref)
3760 			mode->type |= DRM_MODE_TYPE_PREFERRED;
3761 	}
3762 }
3763 EXPORT_SYMBOL(drm_set_preferred_mode);
3764 
3765 /**
3766  * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
3767  *                                              data from a DRM display mode
3768  * @frame: HDMI AVI infoframe
3769  * @mode: DRM display mode
3770  *
3771  * Return: 0 on success or a negative error code on failure.
3772  */
3773 int
3774 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
3775 					 const struct drm_display_mode *mode)
3776 {
3777 	int err;
3778 
3779 	if (!frame || !mode)
3780 		return -EINVAL;
3781 
3782 	err = hdmi_avi_infoframe_init(frame);
3783 	if (err < 0)
3784 		return err;
3785 
3786 	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
3787 		frame->pixel_repeat = 1;
3788 
3789 	frame->video_code = drm_match_cea_mode(mode);
3790 
3791 	frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
3792 
3793 	/*
3794 	 * Populate picture aspect ratio from either
3795 	 * user input (if specified) or from the CEA mode list.
3796 	 */
3797 	if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 ||
3798 		mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
3799 		frame->picture_aspect = mode->picture_aspect_ratio;
3800 	else if (frame->video_code > 0)
3801 		frame->picture_aspect = drm_get_cea_aspect_ratio(
3802 						frame->video_code);
3803 
3804 	frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
3805 	frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
3806 
3807 	return 0;
3808 }
3809 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
3810 
3811 static enum hdmi_3d_structure
3812 s3d_structure_from_display_mode(const struct drm_display_mode *mode)
3813 {
3814 	u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
3815 
3816 	switch (layout) {
3817 	case DRM_MODE_FLAG_3D_FRAME_PACKING:
3818 		return HDMI_3D_STRUCTURE_FRAME_PACKING;
3819 	case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
3820 		return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
3821 	case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
3822 		return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
3823 	case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
3824 		return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
3825 	case DRM_MODE_FLAG_3D_L_DEPTH:
3826 		return HDMI_3D_STRUCTURE_L_DEPTH;
3827 	case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
3828 		return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
3829 	case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
3830 		return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
3831 	case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
3832 		return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
3833 	default:
3834 		return HDMI_3D_STRUCTURE_INVALID;
3835 	}
3836 }
3837 
3838 /**
3839  * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
3840  * data from a DRM display mode
3841  * @frame: HDMI vendor infoframe
3842  * @mode: DRM display mode
3843  *
3844  * Note that there's is a need to send HDMI vendor infoframes only when using a
3845  * 4k or stereoscopic 3D mode. So when giving any other mode as input this
3846  * function will return -EINVAL, error that can be safely ignored.
3847  *
3848  * Return: 0 on success or a negative error code on failure.
3849  */
3850 int
3851 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
3852 					    const struct drm_display_mode *mode)
3853 {
3854 	int err;
3855 	u32 s3d_flags;
3856 	u8 vic;
3857 
3858 	if (!frame || !mode)
3859 		return -EINVAL;
3860 
3861 	vic = drm_match_hdmi_mode(mode);
3862 	s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
3863 
3864 	if (!vic && !s3d_flags)
3865 		return -EINVAL;
3866 
3867 	if (vic && s3d_flags)
3868 		return -EINVAL;
3869 
3870 	err = hdmi_vendor_infoframe_init(frame);
3871 	if (err < 0)
3872 		return err;
3873 
3874 	if (vic)
3875 		frame->vic = vic;
3876 	else
3877 		frame->s3d_struct = s3d_structure_from_display_mode(mode);
3878 
3879 	return 0;
3880 }
3881 EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);
3882