1 /* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 #include <linux/dmi.h> 28 #include <drm/drmP.h> 29 #include <drm/drm_dp_helper.h> 30 #include <drm/i915_drm.h> 31 #include "i915_drv.h" 32 #include "intel_bios.h" 33 #include <linux/string.h> 34 35 #define SLAVE_ADDR1 0x70 36 #define SLAVE_ADDR2 0x72 37 38 static int panel_type; 39 40 static const void * 41 find_section(const void *_bdb, int section_id) 42 { 43 const struct bdb_header *bdb = _bdb; 44 const u8 *base = _bdb; 45 int index = 0; 46 u32 total, current_size; 47 u8 current_id; 48 49 /* skip to first section */ 50 index += bdb->header_size; 51 total = bdb->bdb_size; 52 53 /* walk the sections looking for section_id */ 54 while (index + 3 < total) { 55 current_id = *(base + index); 56 index++; 57 58 current_size = *((const u16 *)(base + index)); 59 index += 2; 60 61 /* The MIPI Sequence Block v3+ has a separate size field. */ 62 if (current_id == BDB_MIPI_SEQUENCE && *(base + index) >= 3) 63 current_size = *((const u32 *)(base + index + 1)); 64 65 if (index + current_size > total) 66 return NULL; 67 68 if (current_id == section_id) 69 return base + index; 70 71 index += current_size; 72 } 73 74 return NULL; 75 } 76 77 #pragma GCC diagnostic ignored "-Wcast-qual" 78 static u16 79 get_blocksize(const void *p) 80 { 81 u16 *block_ptr, block_size; 82 83 block_ptr = (u16 *)((char *)p - 2); 84 block_size = *block_ptr; 85 return block_size; 86 } 87 #pragma GCC diagnostic pop 88 89 static void 90 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 91 const struct lvds_dvo_timing *dvo_timing) 92 { 93 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 94 dvo_timing->hactive_lo; 95 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 96 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 97 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 98 dvo_timing->hsync_pulse_width; 99 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 100 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 101 102 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 103 dvo_timing->vactive_lo; 104 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 105 dvo_timing->vsync_off; 106 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 107 dvo_timing->vsync_pulse_width; 108 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 109 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 110 panel_fixed_mode->clock = dvo_timing->clock * 10; 111 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 112 113 if (dvo_timing->hsync_positive) 114 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 115 else 116 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 117 118 if (dvo_timing->vsync_positive) 119 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 120 else 121 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 122 123 /* Some VBTs have bogus h/vtotal values */ 124 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 125 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; 126 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) 127 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; 128 129 drm_mode_set_name(panel_fixed_mode); 130 } 131 132 static const struct lvds_dvo_timing * 133 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, 134 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, 135 int index) 136 { 137 /* 138 * the size of fp_timing varies on the different platform. 139 * So calculate the DVO timing relative offset in LVDS data 140 * entry to get the DVO timing entry 141 */ 142 143 int lfp_data_size = 144 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - 145 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; 146 int dvo_timing_offset = 147 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - 148 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; 149 const char *entry = (const char *)lvds_lfp_data->data + lfp_data_size * index; 150 151 return (const struct lvds_dvo_timing *)(entry + dvo_timing_offset); 152 } 153 154 /* get lvds_fp_timing entry 155 * this function may return NULL if the corresponding entry is invalid 156 */ 157 static const struct lvds_fp_timing * 158 get_lvds_fp_timing(const struct bdb_header *bdb, 159 const struct bdb_lvds_lfp_data *data, 160 const struct bdb_lvds_lfp_data_ptrs *ptrs, 161 int index) 162 { 163 size_t data_ofs = (const u8 *)data - (const u8 *)bdb; 164 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */ 165 size_t ofs; 166 167 if (index >= ARRAY_SIZE(ptrs->ptr)) 168 return NULL; 169 ofs = ptrs->ptr[index].fp_timing_offset; 170 if (ofs < data_ofs || 171 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size) 172 return NULL; 173 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs); 174 } 175 176 /* Try to find integrated panel data */ 177 static void 178 parse_lfp_panel_data(struct drm_i915_private *dev_priv, 179 const struct bdb_header *bdb) 180 { 181 const struct bdb_lvds_options *lvds_options; 182 const struct bdb_lvds_lfp_data *lvds_lfp_data; 183 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; 184 const struct lvds_dvo_timing *panel_dvo_timing; 185 const struct lvds_fp_timing *fp_timing; 186 struct drm_display_mode *panel_fixed_mode; 187 int drrs_mode; 188 189 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); 190 if (!lvds_options) 191 return; 192 193 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither; 194 if (lvds_options->panel_type == 0xff) 195 return; 196 197 panel_type = lvds_options->panel_type; 198 199 drrs_mode = (lvds_options->dps_panel_type_bits 200 >> (panel_type * 2)) & MODE_MASK; 201 /* 202 * VBT has static DRRS = 0 and seamless DRRS = 2. 203 * The below piece of code is required to adjust vbt.drrs_type 204 * to match the enum drrs_support_type. 205 */ 206 switch (drrs_mode) { 207 case 0: 208 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT; 209 DRM_DEBUG_KMS("DRRS supported mode is static\n"); 210 break; 211 case 2: 212 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT; 213 DRM_DEBUG_KMS("DRRS supported mode is seamless\n"); 214 break; 215 default: 216 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 217 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n"); 218 break; 219 } 220 221 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); 222 if (!lvds_lfp_data) 223 return; 224 225 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); 226 if (!lvds_lfp_data_ptrs) 227 return; 228 229 dev_priv->vbt.lvds_vbt = 1; 230 231 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 232 lvds_lfp_data_ptrs, 233 lvds_options->panel_type); 234 235 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 236 if (!panel_fixed_mode) 237 return; 238 239 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); 240 241 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 242 243 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n"); 244 drm_mode_debug_printmodeline(panel_fixed_mode); 245 246 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data, 247 lvds_lfp_data_ptrs, 248 lvds_options->panel_type); 249 if (fp_timing) { 250 /* check the resolution, just to be sure */ 251 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 252 fp_timing->y_res == panel_fixed_mode->vdisplay) { 253 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 254 DRM_DEBUG_KMS("VBT initial LVDS value %x\n", 255 dev_priv->vbt.bios_lvds_val); 256 } 257 } 258 } 259 260 static void 261 parse_lfp_backlight(struct drm_i915_private *dev_priv, 262 const struct bdb_header *bdb) 263 { 264 const struct bdb_lfp_backlight_data *backlight_data; 265 const struct bdb_lfp_backlight_data_entry *entry; 266 267 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); 268 if (!backlight_data) 269 return; 270 271 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 272 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n", 273 backlight_data->entry_size); 274 return; 275 } 276 277 entry = &backlight_data->data[panel_type]; 278 279 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 280 if (!dev_priv->vbt.backlight.present) { 281 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n", 282 entry->type); 283 return; 284 } 285 286 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 287 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm; 288 dev_priv->vbt.backlight.min_brightness = entry->min_brightness; 289 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, " 290 "active %s, min brightness %u, level %u\n", 291 dev_priv->vbt.backlight.pwm_freq_hz, 292 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high", 293 dev_priv->vbt.backlight.min_brightness, 294 backlight_data->level[panel_type]); 295 } 296 297 /* Try to find sdvo panel data */ 298 static void 299 parse_sdvo_panel_data(struct drm_i915_private *dev_priv, 300 const struct bdb_header *bdb) 301 { 302 const struct lvds_dvo_timing *dvo_timing; 303 struct drm_display_mode *panel_fixed_mode; 304 int index; 305 306 index = i915.vbt_sdvo_panel_type; 307 if (index == -2) { 308 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n"); 309 return; 310 } 311 312 if (index == -1) { 313 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 314 315 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); 316 if (!sdvo_lvds_options) 317 return; 318 319 index = sdvo_lvds_options->panel_type; 320 } 321 322 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS); 323 if (!dvo_timing) 324 return; 325 326 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 327 if (!panel_fixed_mode) 328 return; 329 330 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index); 331 332 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 333 334 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n"); 335 drm_mode_debug_printmodeline(panel_fixed_mode); 336 } 337 338 static int intel_bios_ssc_frequency(struct drm_device *dev, 339 bool alternate) 340 { 341 switch (INTEL_INFO(dev)->gen) { 342 case 2: 343 return alternate ? 66667 : 48000; 344 case 3: 345 case 4: 346 return alternate ? 100000 : 96000; 347 default: 348 return alternate ? 100000 : 120000; 349 } 350 } 351 352 static void 353 parse_general_features(struct drm_i915_private *dev_priv, 354 const struct bdb_header *bdb) 355 { 356 struct drm_device *dev = dev_priv->dev; 357 const struct bdb_general_features *general; 358 359 general = find_section(bdb, BDB_GENERAL_FEATURES); 360 if (general) { 361 dev_priv->vbt.int_tv_support = general->int_tv_support; 362 dev_priv->vbt.int_crt_support = general->int_crt_support; 363 dev_priv->vbt.lvds_use_ssc = general->enable_ssc; 364 dev_priv->vbt.lvds_ssc_freq = 365 intel_bios_ssc_frequency(dev, general->ssc_freq); 366 dev_priv->vbt.display_clock_mode = general->display_clock_mode; 367 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 368 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 369 dev_priv->vbt.int_tv_support, 370 dev_priv->vbt.int_crt_support, 371 dev_priv->vbt.lvds_use_ssc, 372 dev_priv->vbt.lvds_ssc_freq, 373 dev_priv->vbt.display_clock_mode, 374 dev_priv->vbt.fdi_rx_polarity_inverted); 375 } 376 } 377 378 static void 379 parse_general_definitions(struct drm_i915_private *dev_priv, 380 const struct bdb_header *bdb) 381 { 382 const struct bdb_general_definitions *general; 383 384 general = find_section(bdb, BDB_GENERAL_DEFINITIONS); 385 if (general) { 386 u16 block_size = get_blocksize(general); 387 if (block_size >= sizeof(*general)) { 388 int bus_pin = general->crt_ddc_gmbus_pin; 389 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin); 390 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin)) 391 dev_priv->vbt.crt_ddc_pin = bus_pin; 392 } else { 393 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n", 394 block_size); 395 } 396 } 397 } 398 399 static const union child_device_config * 400 child_device_ptr(const struct bdb_general_definitions *p_defs, int i) 401 { 402 return (const void *) &p_defs->devices[i * p_defs->child_dev_size]; 403 } 404 405 static void 406 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, 407 const struct bdb_header *bdb) 408 { 409 struct sdvo_device_mapping *p_mapping; 410 const struct bdb_general_definitions *p_defs; 411 const struct old_child_dev_config *child; /* legacy */ 412 int i, child_device_num, count; 413 u16 block_size; 414 415 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); 416 if (!p_defs) { 417 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n"); 418 return; 419 } 420 421 /* 422 * Only parse SDVO mappings when the general definitions block child 423 * device size matches that of the *legacy* child device config 424 * struct. Thus, SDVO mapping will be skipped for newer VBT. 425 */ 426 if (p_defs->child_dev_size != sizeof(*child)) { 427 DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n"); 428 return; 429 } 430 /* get the block size of general definitions */ 431 block_size = get_blocksize(p_defs); 432 /* get the number of child device */ 433 child_device_num = (block_size - sizeof(*p_defs)) / 434 p_defs->child_dev_size; 435 count = 0; 436 for (i = 0; i < child_device_num; i++) { 437 child = &child_device_ptr(p_defs, i)->old; 438 if (!child->device_type) { 439 /* skip the device block if device type is invalid */ 440 continue; 441 } 442 if (child->slave_addr != SLAVE_ADDR1 && 443 child->slave_addr != SLAVE_ADDR2) { 444 /* 445 * If the slave address is neither 0x70 nor 0x72, 446 * it is not a SDVO device. Skip it. 447 */ 448 continue; 449 } 450 if (child->dvo_port != DEVICE_PORT_DVOB && 451 child->dvo_port != DEVICE_PORT_DVOC) { 452 /* skip the incorrect SDVO port */ 453 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n"); 454 continue; 455 } 456 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on" 457 " %s port\n", 458 child->slave_addr, 459 (child->dvo_port == DEVICE_PORT_DVOB) ? 460 "SDVOB" : "SDVOC"); 461 p_mapping = &(dev_priv->sdvo_mappings[child->dvo_port - 1]); 462 if (!p_mapping->initialized) { 463 p_mapping->dvo_port = child->dvo_port; 464 p_mapping->slave_addr = child->slave_addr; 465 p_mapping->dvo_wiring = child->dvo_wiring; 466 p_mapping->ddc_pin = child->ddc_pin; 467 p_mapping->i2c_pin = child->i2c_pin; 468 p_mapping->initialized = 1; 469 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 470 p_mapping->dvo_port, 471 p_mapping->slave_addr, 472 p_mapping->dvo_wiring, 473 p_mapping->ddc_pin, 474 p_mapping->i2c_pin); 475 } else { 476 DRM_DEBUG_KMS("Maybe one SDVO port is shared by " 477 "two SDVO device.\n"); 478 } 479 if (child->slave2_addr) { 480 /* Maybe this is a SDVO device with multiple inputs */ 481 /* And the mapping info is not added */ 482 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this" 483 " is a SDVO device with multiple inputs.\n"); 484 } 485 count++; 486 } 487 488 if (!count) { 489 /* No SDVO device info is found */ 490 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n"); 491 } 492 return; 493 } 494 495 static void 496 parse_driver_features(struct drm_i915_private *dev_priv, 497 const struct bdb_header *bdb) 498 { 499 const struct bdb_driver_features *driver; 500 501 driver = find_section(bdb, BDB_DRIVER_FEATURES); 502 if (!driver) 503 return; 504 505 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP) 506 dev_priv->vbt.edp_support = 1; 507 508 if (driver->dual_frequency) 509 dev_priv->render_reclock_avail = true; 510 511 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); 512 /* 513 * If DRRS is not supported, drrs_type has to be set to 0. 514 * This is because, VBT is configured in such a way that 515 * static DRRS is 0 and DRRS not supported is represented by 516 * driver->drrs_enabled=false 517 */ 518 if (!driver->drrs_enabled) 519 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 520 } 521 522 static void 523 parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 524 { 525 const struct bdb_edp *edp; 526 const struct edp_power_seq *edp_pps; 527 const struct edp_link_params *edp_link_params; 528 529 edp = find_section(bdb, BDB_EDP); 530 if (!edp) { 531 if (dev_priv->vbt.edp_support) 532 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n"); 533 return; 534 } 535 536 switch ((edp->color_depth >> (panel_type * 2)) & 3) { 537 case EDP_18BPP: 538 dev_priv->vbt.edp_bpp = 18; 539 break; 540 case EDP_24BPP: 541 dev_priv->vbt.edp_bpp = 24; 542 break; 543 case EDP_30BPP: 544 dev_priv->vbt.edp_bpp = 30; 545 break; 546 } 547 548 /* Get the eDP sequencing and link info */ 549 edp_pps = &edp->power_seqs[panel_type]; 550 edp_link_params = &edp->link_params[panel_type]; 551 552 dev_priv->vbt.edp_pps = *edp_pps; 553 554 switch (edp_link_params->rate) { 555 case EDP_RATE_1_62: 556 dev_priv->vbt.edp_rate = DP_LINK_BW_1_62; 557 break; 558 case EDP_RATE_2_7: 559 dev_priv->vbt.edp_rate = DP_LINK_BW_2_7; 560 break; 561 default: 562 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n", 563 edp_link_params->rate); 564 break; 565 } 566 567 switch (edp_link_params->lanes) { 568 case EDP_LANE_1: 569 dev_priv->vbt.edp_lanes = 1; 570 break; 571 case EDP_LANE_2: 572 dev_priv->vbt.edp_lanes = 2; 573 break; 574 case EDP_LANE_4: 575 dev_priv->vbt.edp_lanes = 4; 576 break; 577 default: 578 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n", 579 edp_link_params->lanes); 580 break; 581 } 582 583 switch (edp_link_params->preemphasis) { 584 case EDP_PREEMPHASIS_NONE: 585 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 586 break; 587 case EDP_PREEMPHASIS_3_5dB: 588 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 589 break; 590 case EDP_PREEMPHASIS_6dB: 591 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 592 break; 593 case EDP_PREEMPHASIS_9_5dB: 594 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 595 break; 596 default: 597 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n", 598 edp_link_params->preemphasis); 599 break; 600 } 601 602 switch (edp_link_params->vswing) { 603 case EDP_VSWING_0_4V: 604 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 605 break; 606 case EDP_VSWING_0_6V: 607 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 608 break; 609 case EDP_VSWING_0_8V: 610 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 611 break; 612 case EDP_VSWING_1_2V: 613 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 614 break; 615 default: 616 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n", 617 edp_link_params->vswing); 618 break; 619 } 620 621 if (bdb->version >= 173) { 622 uint8_t vswing; 623 624 /* Don't read from VBT if module parameter has valid value*/ 625 if (i915.edp_vswing) { 626 dev_priv->edp_low_vswing = i915.edp_vswing == 1; 627 } else { 628 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 629 dev_priv->edp_low_vswing = vswing == 0; 630 } 631 } 632 } 633 634 static void 635 parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 636 { 637 const struct bdb_psr *psr; 638 const struct psr_table *psr_table; 639 640 psr = find_section(bdb, BDB_PSR); 641 if (!psr) { 642 DRM_DEBUG_KMS("No PSR BDB found.\n"); 643 return; 644 } 645 646 psr_table = &psr->psr_table[panel_type]; 647 648 dev_priv->vbt.psr.full_link = psr_table->full_link; 649 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 650 651 /* Allowed VBT values goes from 0 to 15 */ 652 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 653 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 654 655 switch (psr_table->lines_to_wait) { 656 case 0: 657 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT; 658 break; 659 case 1: 660 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT; 661 break; 662 case 2: 663 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT; 664 break; 665 case 3: 666 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT; 667 break; 668 default: 669 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n", 670 psr_table->lines_to_wait); 671 break; 672 } 673 674 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time; 675 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time; 676 } 677 678 static u8 *goto_next_sequence(u8 *data, int *size) 679 { 680 u16 len; 681 int tmp = *size; 682 683 if (--tmp < 0) 684 return NULL; 685 686 /* goto first element */ 687 data++; 688 while (1) { 689 switch (*data) { 690 case MIPI_SEQ_ELEM_SEND_PKT: 691 /* 692 * skip by this element payload size 693 * skip elem id, command flag and data type 694 */ 695 tmp -= 5; 696 if (tmp < 0) 697 return NULL; 698 699 data += 3; 700 len = *((u16 *)data); 701 702 tmp -= len; 703 if (tmp < 0) 704 return NULL; 705 706 /* skip by len */ 707 data = data + 2 + len; 708 break; 709 case MIPI_SEQ_ELEM_DELAY: 710 /* skip by elem id, and delay is 4 bytes */ 711 tmp -= 5; 712 if (tmp < 0) 713 return NULL; 714 715 data += 5; 716 break; 717 case MIPI_SEQ_ELEM_GPIO: 718 tmp -= 3; 719 if (tmp < 0) 720 return NULL; 721 722 data += 3; 723 break; 724 default: 725 DRM_ERROR("Unknown element\n"); 726 return NULL; 727 } 728 729 /* end of sequence ? */ 730 if (*data == 0) 731 break; 732 } 733 734 /* goto next sequence or end of block byte */ 735 if (--tmp < 0) 736 return NULL; 737 738 data++; 739 740 /* update amount of data left for the sequence block to be parsed */ 741 *size = tmp; 742 return data; 743 } 744 745 static void 746 parse_mipi(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 747 { 748 const struct bdb_mipi_config *start; 749 const struct bdb_mipi_sequence *sequence; 750 const struct mipi_config *config; 751 const struct mipi_pps_data *pps; 752 u8 *data; 753 const u8 *seq_data; 754 int i, panel_id, seq_size; 755 u16 block_size; 756 757 /* parse MIPI blocks only if LFP type is MIPI */ 758 if (!dev_priv->vbt.has_mipi) 759 return; 760 761 /* Initialize this to undefined indicating no generic MIPI support */ 762 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 763 764 /* Block #40 is already parsed and panel_fixed_mode is 765 * stored in dev_priv->lfp_lvds_vbt_mode 766 * resuse this when needed 767 */ 768 769 /* Parse #52 for panel index used from panel_type already 770 * parsed 771 */ 772 start = find_section(bdb, BDB_MIPI_CONFIG); 773 if (!start) { 774 DRM_DEBUG_KMS("No MIPI config BDB found"); 775 return; 776 } 777 778 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n", 779 panel_type); 780 781 /* 782 * get hold of the correct configuration block and pps data as per 783 * the panel_type as index 784 */ 785 config = &start->config[panel_type]; 786 pps = &start->pps[panel_type]; 787 788 /* store as of now full data. Trim when we realise all is not needed */ 789 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 790 if (!dev_priv->vbt.dsi.config) 791 return; 792 793 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 794 if (!dev_priv->vbt.dsi.pps) { 795 kfree(dev_priv->vbt.dsi.config); 796 return; 797 } 798 799 /* We have mandatory mipi config blocks. Initialize as generic panel */ 800 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 801 802 /* Check if we have sequence block as well */ 803 sequence = find_section(bdb, BDB_MIPI_SEQUENCE); 804 if (!sequence) { 805 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n"); 806 return; 807 } 808 809 /* Fail gracefully for forward incompatible sequence block. */ 810 if (sequence->version >= 3) { 811 DRM_ERROR("Unable to parse MIPI Sequence Block v3+\n"); 812 return; 813 } 814 815 DRM_DEBUG_DRIVER("Found MIPI sequence block\n"); 816 817 block_size = get_blocksize(sequence); 818 819 /* 820 * parse the sequence block for individual sequences 821 */ 822 dev_priv->vbt.dsi.seq_version = sequence->version; 823 824 seq_data = &sequence->data[0]; 825 826 /* 827 * sequence block is variable length and hence we need to parse and 828 * get the sequence data for specific panel id 829 */ 830 for (i = 0; i < MAX_MIPI_CONFIGURATIONS; i++) { 831 panel_id = *seq_data; 832 #pragma GCC diagnostic ignored "-Wcast-qual" 833 seq_size = *((u16 *) (seq_data + 1)); 834 #pragma GCC diagnostic pop 835 if (panel_id == panel_type) 836 break; 837 838 /* skip the sequence including seq header of 3 bytes */ 839 seq_data = seq_data + 3 + seq_size; 840 if ((seq_data - &sequence->data[0]) > block_size) { 841 DRM_ERROR("Sequence start is beyond sequence block size, corrupted sequence block\n"); 842 return; 843 } 844 } 845 846 if (i == MAX_MIPI_CONFIGURATIONS) { 847 DRM_ERROR("Sequence block detected but no valid configuration\n"); 848 return; 849 } 850 851 /* check if found sequence is completely within the sequence block 852 * just being paranoid */ 853 if (seq_size > block_size) { 854 DRM_ERROR("Corrupted sequence/size, bailing out\n"); 855 return; 856 } 857 858 /* skip the panel id(1 byte) and seq size(2 bytes) */ 859 dev_priv->vbt.dsi.data = kmemdup(seq_data + 3, seq_size, GFP_KERNEL); 860 if (!dev_priv->vbt.dsi.data) 861 return; 862 863 /* 864 * loop into the sequence data and split into multiple sequneces 865 * There are only 5 types of sequences as of now 866 */ 867 data = dev_priv->vbt.dsi.data; 868 dev_priv->vbt.dsi.size = seq_size; 869 870 /* two consecutive 0x00 indicate end of all sequences */ 871 while (1) { 872 int seq_id = *data; 873 if (MIPI_SEQ_MAX > seq_id && seq_id > MIPI_SEQ_UNDEFINED) { 874 dev_priv->vbt.dsi.sequence[seq_id] = data; 875 DRM_DEBUG_DRIVER("Found mipi sequence - %d\n", seq_id); 876 } else { 877 DRM_ERROR("undefined sequence\n"); 878 goto err; 879 } 880 881 /* partial parsing to skip elements */ 882 data = goto_next_sequence(data, &seq_size); 883 884 if (data == NULL) { 885 DRM_ERROR("Sequence elements going beyond block itself. Sequence block parsing failed\n"); 886 goto err; 887 } 888 889 if (*data == 0) 890 break; /* end of sequence reached */ 891 } 892 893 DRM_DEBUG_DRIVER("MIPI related vbt parsing complete\n"); 894 return; 895 err: 896 kfree(dev_priv->vbt.dsi.data); 897 dev_priv->vbt.dsi.data = NULL; 898 899 /* error during parsing so set all pointers to null 900 * because of partial parsing */ 901 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence)); 902 } 903 904 static u8 translate_iboost(u8 val) 905 { 906 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 907 908 if (val >= ARRAY_SIZE(mapping)) { 909 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 910 return 0; 911 } 912 return mapping[val]; 913 } 914 915 static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, 916 const struct bdb_header *bdb) 917 { 918 union child_device_config *it, *child = NULL; 919 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; 920 uint8_t hdmi_level_shift; 921 int i, j; 922 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt; 923 uint8_t aux_channel, ddc_pin; 924 /* Each DDI port can have more than one value on the "DVO Port" field, 925 * so look for all the possible values for each port and abort if more 926 * than one is found. */ 927 int dvo_ports[][3] = { 928 {DVO_PORT_HDMIA, DVO_PORT_DPA, -1}, 929 {DVO_PORT_HDMIB, DVO_PORT_DPB, -1}, 930 {DVO_PORT_HDMIC, DVO_PORT_DPC, -1}, 931 {DVO_PORT_HDMID, DVO_PORT_DPD, -1}, 932 {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE}, 933 }; 934 935 /* Find the child device to use, abort if more than one found. */ 936 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { 937 it = dev_priv->vbt.child_dev + i; 938 939 for (j = 0; j < 3; j++) { 940 if (dvo_ports[port][j] == -1) 941 break; 942 943 if (it->common.dvo_port == dvo_ports[port][j]) { 944 if (child) { 945 DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n", 946 port_name(port)); 947 return; 948 } 949 child = it; 950 } 951 } 952 } 953 if (!child) 954 return; 955 956 aux_channel = child->raw[25]; 957 ddc_pin = child->common.ddc_pin; 958 959 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 960 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 961 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT; 962 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 963 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR); 964 965 info->supports_dvi = is_dvi; 966 info->supports_hdmi = is_hdmi; 967 info->supports_dp = is_dp; 968 969 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n", 970 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt); 971 972 if (is_edp && is_dvi) 973 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n", 974 port_name(port)); 975 if (is_crt && port != PORT_E) 976 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port)); 977 if (is_crt && (is_dvi || is_dp)) 978 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n", 979 port_name(port)); 980 if (is_dvi && (port == PORT_A || port == PORT_E)) 981 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port)); 982 if (!is_dvi && !is_dp && !is_crt) 983 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n", 984 port_name(port)); 985 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E)) 986 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port)); 987 988 if (is_dvi) { 989 if (port == PORT_E) { 990 info->alternate_ddc_pin = ddc_pin; 991 /* if DDIE share ddc pin with other port, then 992 * dvi/hdmi couldn't exist on the shared port. 993 * Otherwise they share the same ddc bin and system 994 * couldn't communicate with them seperately. */ 995 if (ddc_pin == DDC_PIN_B) { 996 dev_priv->vbt.ddi_port_info[PORT_B].supports_dvi = 0; 997 dev_priv->vbt.ddi_port_info[PORT_B].supports_hdmi = 0; 998 } else if (ddc_pin == DDC_PIN_C) { 999 dev_priv->vbt.ddi_port_info[PORT_C].supports_dvi = 0; 1000 dev_priv->vbt.ddi_port_info[PORT_C].supports_hdmi = 0; 1001 } else if (ddc_pin == DDC_PIN_D) { 1002 dev_priv->vbt.ddi_port_info[PORT_D].supports_dvi = 0; 1003 dev_priv->vbt.ddi_port_info[PORT_D].supports_hdmi = 0; 1004 } 1005 } else if (ddc_pin == DDC_PIN_B && port != PORT_B) 1006 DRM_DEBUG_KMS("Unexpected DDC pin for port B\n"); 1007 else if (ddc_pin == DDC_PIN_C && port != PORT_C) 1008 DRM_DEBUG_KMS("Unexpected DDC pin for port C\n"); 1009 else if (ddc_pin == DDC_PIN_D && port != PORT_D) 1010 DRM_DEBUG_KMS("Unexpected DDC pin for port D\n"); 1011 } 1012 1013 if (is_dp) { 1014 if (port == PORT_E) { 1015 info->alternate_aux_channel = aux_channel; 1016 /* if DDIE share aux channel with other port, then 1017 * DP couldn't exist on the shared port. Otherwise 1018 * they share the same aux channel and system 1019 * couldn't communicate with them seperately. */ 1020 if (aux_channel == DP_AUX_A) 1021 dev_priv->vbt.ddi_port_info[PORT_A].supports_dp = 0; 1022 else if (aux_channel == DP_AUX_B) 1023 dev_priv->vbt.ddi_port_info[PORT_B].supports_dp = 0; 1024 else if (aux_channel == DP_AUX_C) 1025 dev_priv->vbt.ddi_port_info[PORT_C].supports_dp = 0; 1026 else if (aux_channel == DP_AUX_D) 1027 dev_priv->vbt.ddi_port_info[PORT_D].supports_dp = 0; 1028 } 1029 else if (aux_channel == DP_AUX_A && port != PORT_A) 1030 DRM_DEBUG_KMS("Unexpected AUX channel for port A\n"); 1031 else if (aux_channel == DP_AUX_B && port != PORT_B) 1032 DRM_DEBUG_KMS("Unexpected AUX channel for port B\n"); 1033 else if (aux_channel == DP_AUX_C && port != PORT_C) 1034 DRM_DEBUG_KMS("Unexpected AUX channel for port C\n"); 1035 else if (aux_channel == DP_AUX_D && port != PORT_D) 1036 DRM_DEBUG_KMS("Unexpected AUX channel for port D\n"); 1037 } 1038 1039 if (bdb->version >= 158) { 1040 /* The VBT HDMI level shift values match the table we have. */ 1041 hdmi_level_shift = child->raw[7] & 0xF; 1042 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n", 1043 port_name(port), 1044 hdmi_level_shift); 1045 info->hdmi_level_shift = hdmi_level_shift; 1046 } 1047 1048 /* Parse the I_boost config for SKL and above */ 1049 if (bdb->version >= 196 && (child->common.flags_1 & IBOOST_ENABLE)) { 1050 info->dp_boost_level = translate_iboost(child->common.iboost_level & 0xF); 1051 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n", 1052 port_name(port), info->dp_boost_level); 1053 info->hdmi_boost_level = translate_iboost(child->common.iboost_level >> 4); 1054 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n", 1055 port_name(port), info->hdmi_boost_level); 1056 } 1057 } 1058 1059 static void parse_ddi_ports(struct drm_i915_private *dev_priv, 1060 const struct bdb_header *bdb) 1061 { 1062 struct drm_device *dev = dev_priv->dev; 1063 enum port port; 1064 1065 if (!HAS_DDI(dev)) 1066 return; 1067 1068 if (!dev_priv->vbt.child_dev_num) 1069 return; 1070 1071 if (bdb->version < 155) 1072 return; 1073 1074 for (port = PORT_A; port < I915_MAX_PORTS; port++) 1075 parse_ddi_port(dev_priv, port, bdb); 1076 } 1077 1078 static void 1079 parse_device_mapping(struct drm_i915_private *dev_priv, 1080 const struct bdb_header *bdb) 1081 { 1082 const struct bdb_general_definitions *p_defs; 1083 const union child_device_config *p_child; 1084 union child_device_config *child_dev_ptr; 1085 int i, child_device_num, count; 1086 u8 expected_size; 1087 u16 block_size; 1088 1089 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); 1090 if (!p_defs) { 1091 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n"); 1092 return; 1093 } 1094 if (bdb->version < 195) { 1095 expected_size = sizeof(struct old_child_dev_config); 1096 } else if (bdb->version == 195) { 1097 expected_size = 37; 1098 } else if (bdb->version <= 197) { 1099 expected_size = 38; 1100 } else { 1101 expected_size = 38; 1102 BUILD_BUG_ON(sizeof(*p_child) < 38); 1103 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n", 1104 bdb->version, expected_size); 1105 } 1106 1107 /* The legacy sized child device config is the minimum we need. */ 1108 if (p_defs->child_dev_size < sizeof(struct old_child_dev_config)) { 1109 DRM_ERROR("Child device config size %u is too small.\n", 1110 p_defs->child_dev_size); 1111 return; 1112 } 1113 1114 /* Flag an error for unexpected size, but continue anyway. */ 1115 if (p_defs->child_dev_size != expected_size) 1116 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n", 1117 p_defs->child_dev_size, expected_size, bdb->version); 1118 1119 /* get the block size of general definitions */ 1120 block_size = get_blocksize(p_defs); 1121 /* get the number of child device */ 1122 child_device_num = (block_size - sizeof(*p_defs)) / 1123 p_defs->child_dev_size; 1124 count = 0; 1125 /* get the number of child device that is present */ 1126 for (i = 0; i < child_device_num; i++) { 1127 p_child = child_device_ptr(p_defs, i); 1128 if (!p_child->common.device_type) { 1129 /* skip the device block if device type is invalid */ 1130 continue; 1131 } 1132 count++; 1133 } 1134 if (!count) { 1135 DRM_DEBUG_KMS("no child dev is parsed from VBT\n"); 1136 return; 1137 } 1138 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL); 1139 if (!dev_priv->vbt.child_dev) { 1140 DRM_DEBUG_KMS("No memory space for child device\n"); 1141 return; 1142 } 1143 1144 dev_priv->vbt.child_dev_num = count; 1145 count = 0; 1146 for (i = 0; i < child_device_num; i++) { 1147 p_child = child_device_ptr(p_defs, i); 1148 if (!p_child->common.device_type) { 1149 /* skip the device block if device type is invalid */ 1150 continue; 1151 } 1152 1153 if (p_child->common.dvo_port >= DVO_PORT_MIPIA 1154 && p_child->common.dvo_port <= DVO_PORT_MIPID 1155 &&p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT) { 1156 DRM_DEBUG_KMS("Found MIPI as LFP\n"); 1157 dev_priv->vbt.has_mipi = 1; 1158 dev_priv->vbt.dsi.port = p_child->common.dvo_port; 1159 } 1160 1161 child_dev_ptr = dev_priv->vbt.child_dev + count; 1162 count++; 1163 1164 /* 1165 * Copy as much as we know (sizeof) and is available 1166 * (child_dev_size) of the child device. Accessing the data must 1167 * depend on VBT version. 1168 */ 1169 memcpy(child_dev_ptr, p_child, 1170 min_t(size_t, p_defs->child_dev_size, sizeof(*p_child))); 1171 } 1172 return; 1173 } 1174 1175 static void 1176 init_vbt_defaults(struct drm_i915_private *dev_priv) 1177 { 1178 struct drm_device *dev = dev_priv->dev; 1179 enum port port; 1180 1181 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 1182 1183 /* Default to having backlight */ 1184 dev_priv->vbt.backlight.present = true; 1185 1186 /* LFP panel data */ 1187 dev_priv->vbt.lvds_dither = 1; 1188 dev_priv->vbt.lvds_vbt = 0; 1189 1190 /* SDVO panel data */ 1191 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; 1192 1193 /* general features */ 1194 dev_priv->vbt.int_tv_support = 1; 1195 dev_priv->vbt.int_crt_support = 1; 1196 1197 /* Default to using SSC */ 1198 dev_priv->vbt.lvds_use_ssc = 1; 1199 /* 1200 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 1201 * clock for LVDS. 1202 */ 1203 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev, 1204 !HAS_PCH_SPLIT(dev)); 1205 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq); 1206 1207 for (port = PORT_A; port < I915_MAX_PORTS; port++) { 1208 struct ddi_vbt_port_info *info = 1209 &dev_priv->vbt.ddi_port_info[port]; 1210 1211 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN; 1212 1213 info->supports_dvi = (port != PORT_A && port != PORT_E); 1214 info->supports_hdmi = info->supports_dvi; 1215 info->supports_dp = (port != PORT_E); 1216 } 1217 } 1218 1219 static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id) 1220 { 1221 DRM_DEBUG_KMS("Falling back to manually reading VBT from " 1222 "VBIOS ROM for %s\n", 1223 id->ident); 1224 return 1; 1225 } 1226 1227 static const struct dmi_system_id intel_no_opregion_vbt[] = { 1228 { 1229 .callback = intel_no_opregion_vbt_callback, 1230 .ident = "ThinkCentre A57", 1231 .matches = { 1232 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 1233 DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"), 1234 }, 1235 }, 1236 { } 1237 }; 1238 1239 static const struct bdb_header *validate_vbt(const void __iomem *_base, 1240 size_t size, 1241 const void __iomem *_vbt, 1242 const char *source) 1243 { 1244 /* 1245 * This is the one place where we explicitly discard the address space 1246 * (__iomem) of the BIOS/VBT. (And this will cause a sparse complaint.) 1247 * From now on everything is based on 'base', and treated as regular 1248 * memory. 1249 */ 1250 const char *base = (const void *) _base; 1251 size_t offset = (const char *)_vbt - (const char*)_base; 1252 const struct vbt_header *vbt = (const struct vbt_header *)(base + offset); 1253 const struct bdb_header *bdb; 1254 1255 if (offset + sizeof(struct vbt_header) > size) { 1256 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 1257 return NULL; 1258 } 1259 1260 if (memcmp(vbt->signature, "$VBT", 4)) { 1261 DRM_DEBUG_DRIVER("VBT invalid signature\n"); 1262 return NULL; 1263 } 1264 1265 offset += vbt->bdb_offset; 1266 if (offset + sizeof(struct bdb_header) > size) { 1267 DRM_DEBUG_DRIVER("BDB header incomplete\n"); 1268 return NULL; 1269 } 1270 1271 bdb = (const struct bdb_header*)(base + offset); 1272 if (offset + bdb->bdb_size > size) { 1273 DRM_DEBUG_DRIVER("BDB incomplete\n"); 1274 return NULL; 1275 } 1276 1277 DRM_DEBUG_KMS("Using VBT from %s: %20s\n", 1278 source, vbt->signature); 1279 return bdb; 1280 } 1281 1282 static const struct bdb_header *find_vbt(void __iomem *bios, size_t size) 1283 { 1284 const struct bdb_header *bdb = NULL; 1285 size_t i; 1286 1287 /* Scour memory looking for the VBT signature. */ 1288 for (i = 0; i + 4 < size; i++) { 1289 if (ioread32(bios + i) == *((const u32 *) "$VBT")) { 1290 bdb = validate_vbt((char *)bios, size, (char *)bios + i, "PCI ROM"); 1291 break; 1292 } 1293 } 1294 1295 return bdb; 1296 } 1297 1298 /** 1299 * intel_parse_bios - find VBT and initialize settings from the BIOS 1300 * @dev: DRM device 1301 * 1302 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers 1303 * to appropriate values. 1304 * 1305 * Returns 0 on success, nonzero on failure. 1306 */ 1307 int 1308 intel_parse_bios(struct drm_device *dev) 1309 { 1310 struct drm_i915_private *dev_priv = dev->dev_private; 1311 #if 0 1312 struct pci_dev *pdev = dev->pdev; 1313 #endif 1314 const struct bdb_header *bdb = NULL; 1315 u8 __iomem *bios = NULL; 1316 1317 if (HAS_PCH_NOP(dev)) 1318 return -ENODEV; 1319 1320 init_vbt_defaults(dev_priv); 1321 1322 /* XXX Should this validation be moved to intel_opregion.c? */ 1323 if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt) 1324 bdb = validate_vbt(dev_priv->opregion.header, OPREGION_SIZE, 1325 dev_priv->opregion.vbt, "OpRegion"); 1326 1327 if (bdb == NULL) { 1328 size_t size; 1329 1330 #if 0 1331 bios = pci_map_rom(pdev, &size); 1332 if (!bios) 1333 #endif 1334 return -1; 1335 1336 bdb = find_vbt(bios, size); 1337 if (!bdb) { 1338 #if 0 1339 pci_unmap_rom(pdev, bios); 1340 #endif 1341 return -1; 1342 } 1343 } 1344 1345 /* Grab useful general definitions */ 1346 parse_general_features(dev_priv, bdb); 1347 parse_general_definitions(dev_priv, bdb); 1348 parse_lfp_panel_data(dev_priv, bdb); 1349 parse_lfp_backlight(dev_priv, bdb); 1350 parse_sdvo_panel_data(dev_priv, bdb); 1351 parse_sdvo_device_mapping(dev_priv, bdb); 1352 parse_device_mapping(dev_priv, bdb); 1353 parse_driver_features(dev_priv, bdb); 1354 parse_edp(dev_priv, bdb); 1355 parse_psr(dev_priv, bdb); 1356 parse_mipi(dev_priv, bdb); 1357 parse_ddi_ports(dev_priv, bdb); 1358 1359 #if 0 1360 if (bios) 1361 pci_unmap_rom(pdev, bios); 1362 #endif 1363 1364 return 0; 1365 } 1366 1367 /* Ensure that vital registers have been initialised, even if the BIOS 1368 * is absent or just failing to do its job. 1369 */ 1370 void intel_setup_bios(struct drm_device *dev) 1371 { 1372 struct drm_i915_private *dev_priv = dev->dev_private; 1373 1374 /* Set the Panel Power On/Off timings if uninitialized. */ 1375 if (!HAS_PCH_SPLIT(dev) && 1376 I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) { 1377 /* Set T2 to 40ms and T5 to 200ms */ 1378 I915_WRITE(PP_ON_DELAYS, 0x019007d0); 1379 1380 /* Set T3 to 35ms and Tx to 200ms */ 1381 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0); 1382 } 1383 } 1384