1 /* 2 * Copyright © 2008 Intel Corporation 3 * 2014 Red Hat Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 * 24 */ 25 26 #include <drm/drmP.h> 27 #include "i915_drv.h" 28 #include "intel_drv.h" 29 #include <drm/drm_atomic_helper.h> 30 #include <drm/drm_crtc_helper.h> 31 #include <drm/drm_edid.h> 32 33 #if 0 34 static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, 35 struct intel_crtc_state *pipe_config) 36 { 37 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 38 struct intel_digital_port *intel_dig_port = intel_mst->primary; 39 struct intel_dp *intel_dp = &intel_dig_port->dp; 40 struct drm_device *dev = encoder->base.dev; 41 int bpp; 42 int lane_count, slots; 43 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 44 struct intel_connector *found = NULL, *intel_connector; 45 int mst_pbn; 46 47 pipe_config->dp_encoder_is_mst = true; 48 pipe_config->has_pch_encoder = false; 49 pipe_config->has_dp_encoder = true; 50 bpp = 24; 51 /* 52 * for MST we always configure max link bw - the spec doesn't 53 * seem to suggest we should do otherwise. 54 */ 55 lane_count = drm_dp_max_lane_count(intel_dp->dpcd); 56 intel_dp->link_bw = intel_dp_max_link_bw(intel_dp); 57 intel_dp->lane_count = lane_count; 58 59 pipe_config->pipe_bpp = 24; 60 pipe_config->port_clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw); 61 62 list_for_each_entry(intel_connector, &dev->mode_config.connector_list, base.head) { 63 if (intel_connector->new_encoder == encoder) { 64 found = intel_connector; 65 break; 66 } 67 } 68 69 if (!found) { 70 DRM_ERROR("can't find connector\n"); 71 return false; 72 } 73 74 mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp); 75 76 pipe_config->pbn = mst_pbn; 77 slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn); 78 79 intel_link_compute_m_n(bpp, lane_count, 80 adjusted_mode->crtc_clock, 81 pipe_config->port_clock, 82 &pipe_config->dp_m_n); 83 84 pipe_config->dp_m_n.tu = slots; 85 return true; 86 87 } 88 89 static void intel_mst_disable_dp(struct intel_encoder *encoder) 90 { 91 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 92 struct intel_digital_port *intel_dig_port = intel_mst->primary; 93 struct intel_dp *intel_dp = &intel_dig_port->dp; 94 int ret; 95 96 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); 97 98 drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port); 99 100 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); 101 if (ret) { 102 DRM_ERROR("failed to update payload %d\n", ret); 103 } 104 } 105 106 static void intel_mst_post_disable_dp(struct intel_encoder *encoder) 107 { 108 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 109 struct intel_digital_port *intel_dig_port = intel_mst->primary; 110 struct intel_dp *intel_dp = &intel_dig_port->dp; 111 112 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); 113 114 /* this can fail */ 115 drm_dp_check_act_status(&intel_dp->mst_mgr); 116 /* and this can also fail */ 117 drm_dp_update_payload_part2(&intel_dp->mst_mgr); 118 119 drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port); 120 121 intel_dp->active_mst_links--; 122 intel_mst->port = NULL; 123 if (intel_dp->active_mst_links == 0) { 124 intel_dig_port->base.post_disable(&intel_dig_port->base); 125 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); 126 } 127 } 128 129 static void intel_mst_pre_enable_dp(struct intel_encoder *encoder) 130 { 131 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 132 struct intel_digital_port *intel_dig_port = intel_mst->primary; 133 struct intel_dp *intel_dp = &intel_dig_port->dp; 134 struct drm_device *dev = encoder->base.dev; 135 struct drm_i915_private *dev_priv = dev->dev_private; 136 enum port port = intel_dig_port->port; 137 int ret; 138 uint32_t temp; 139 struct intel_connector *found = NULL, *intel_connector; 140 int slots; 141 struct drm_crtc *crtc = encoder->base.crtc; 142 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 143 144 list_for_each_entry(intel_connector, &dev->mode_config.connector_list, base.head) { 145 if (intel_connector->new_encoder == encoder) { 146 found = intel_connector; 147 break; 148 } 149 } 150 151 if (!found) { 152 DRM_ERROR("can't find connector\n"); 153 return; 154 } 155 156 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); 157 intel_mst->port = found->port; 158 159 if (intel_dp->active_mst_links == 0) { 160 enum port port = intel_ddi_get_encoder_port(encoder); 161 162 I915_WRITE(PORT_CLK_SEL(port), 163 intel_crtc->config->ddi_pll_sel); 164 165 intel_ddi_init_dp_buf_reg(&intel_dig_port->base); 166 167 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); 168 169 170 intel_dp_start_link_train(intel_dp); 171 intel_dp_complete_link_train(intel_dp); 172 intel_dp_stop_link_train(intel_dp); 173 } 174 175 ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, 176 intel_mst->port, 177 intel_crtc->config->pbn, &slots); 178 if (ret == false) { 179 DRM_ERROR("failed to allocate vcpi\n"); 180 return; 181 } 182 183 184 intel_dp->active_mst_links++; 185 temp = I915_READ(DP_TP_STATUS(port)); 186 I915_WRITE(DP_TP_STATUS(port), temp); 187 188 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); 189 } 190 191 static void intel_mst_enable_dp(struct intel_encoder *encoder) 192 { 193 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 194 struct intel_digital_port *intel_dig_port = intel_mst->primary; 195 struct intel_dp *intel_dp = &intel_dig_port->dp; 196 struct drm_device *dev = intel_dig_port->base.base.dev; 197 struct drm_i915_private *dev_priv = dev->dev_private; 198 enum port port = intel_dig_port->port; 199 int ret; 200 201 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); 202 203 if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT), 204 1)) 205 DRM_ERROR("Timed out waiting for ACT sent\n"); 206 207 ret = drm_dp_check_act_status(&intel_dp->mst_mgr); 208 209 ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr); 210 } 211 212 static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, 213 enum pipe *pipe) 214 { 215 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 216 *pipe = intel_mst->pipe; 217 if (intel_mst->port) 218 return true; 219 return false; 220 } 221 222 static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, 223 struct intel_crtc_state *pipe_config) 224 { 225 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 226 struct intel_digital_port *intel_dig_port = intel_mst->primary; 227 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 228 struct drm_device *dev = encoder->base.dev; 229 struct drm_i915_private *dev_priv = dev->dev_private; 230 enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; 231 u32 temp, flags = 0; 232 233 pipe_config->has_dp_encoder = true; 234 235 temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); 236 if (temp & TRANS_DDI_PHSYNC) 237 flags |= DRM_MODE_FLAG_PHSYNC; 238 else 239 flags |= DRM_MODE_FLAG_NHSYNC; 240 if (temp & TRANS_DDI_PVSYNC) 241 flags |= DRM_MODE_FLAG_PVSYNC; 242 else 243 flags |= DRM_MODE_FLAG_NVSYNC; 244 245 switch (temp & TRANS_DDI_BPC_MASK) { 246 case TRANS_DDI_BPC_6: 247 pipe_config->pipe_bpp = 18; 248 break; 249 case TRANS_DDI_BPC_8: 250 pipe_config->pipe_bpp = 24; 251 break; 252 case TRANS_DDI_BPC_10: 253 pipe_config->pipe_bpp = 30; 254 break; 255 case TRANS_DDI_BPC_12: 256 pipe_config->pipe_bpp = 36; 257 break; 258 default: 259 break; 260 } 261 pipe_config->base.adjusted_mode.flags |= flags; 262 intel_dp_get_m_n(crtc, pipe_config); 263 264 intel_ddi_clock_get(&intel_dig_port->base, pipe_config); 265 } 266 267 static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector) 268 { 269 struct intel_connector *intel_connector = to_intel_connector(connector); 270 struct intel_dp *intel_dp = intel_connector->mst_port; 271 struct edid *edid; 272 int ret; 273 274 edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); 275 if (!edid) 276 return 0; 277 278 ret = intel_connector_update_modes(connector, edid); 279 kfree(edid); 280 281 return ret; 282 } 283 284 static enum drm_connector_status 285 intel_dp_mst_detect(struct drm_connector *connector, bool force) 286 { 287 struct intel_connector *intel_connector = to_intel_connector(connector); 288 struct intel_dp *intel_dp = intel_connector->mst_port; 289 290 return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port); 291 } 292 293 static int 294 intel_dp_mst_set_property(struct drm_connector *connector, 295 struct drm_property *property, 296 uint64_t val) 297 { 298 return 0; 299 } 300 301 static void 302 intel_dp_mst_connector_destroy(struct drm_connector *connector) 303 { 304 struct intel_connector *intel_connector = to_intel_connector(connector); 305 306 if (!IS_ERR_OR_NULL(intel_connector->edid)) 307 kfree(intel_connector->edid); 308 309 drm_connector_cleanup(connector); 310 kfree(connector); 311 } 312 313 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = { 314 .dpms = intel_connector_dpms, 315 .detect = intel_dp_mst_detect, 316 .fill_modes = drm_helper_probe_single_connector_modes, 317 .set_property = intel_dp_mst_set_property, 318 .atomic_get_property = intel_connector_atomic_get_property, 319 .destroy = intel_dp_mst_connector_destroy, 320 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 321 }; 322 323 static int intel_dp_mst_get_modes(struct drm_connector *connector) 324 { 325 return intel_dp_mst_get_ddc_modes(connector); 326 } 327 328 static enum drm_mode_status 329 intel_dp_mst_mode_valid(struct drm_connector *connector, 330 struct drm_display_mode *mode) 331 { 332 /* TODO - validate mode against available PBN for link */ 333 if (mode->clock < 10000) 334 return MODE_CLOCK_LOW; 335 336 if (mode->flags & DRM_MODE_FLAG_DBLCLK) 337 return MODE_H_ILLEGAL; 338 339 return MODE_OK; 340 } 341 342 static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector) 343 { 344 struct intel_connector *intel_connector = to_intel_connector(connector); 345 struct intel_dp *intel_dp = intel_connector->mst_port; 346 return &intel_dp->mst_encoders[0]->base.base; 347 } 348 349 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { 350 .get_modes = intel_dp_mst_get_modes, 351 .mode_valid = intel_dp_mst_mode_valid, 352 .best_encoder = intel_mst_best_encoder, 353 }; 354 #endif 355 356 static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder) 357 { 358 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 359 360 drm_encoder_cleanup(encoder); 361 kfree(intel_mst); 362 } 363 364 static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = { 365 .destroy = intel_dp_mst_encoder_destroy, 366 }; 367 368 #if 0 369 static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) 370 { 371 if (connector->encoder) { 372 enum pipe pipe; 373 if (!connector->encoder->get_hw_state(connector->encoder, &pipe)) 374 return false; 375 return true; 376 } 377 return false; 378 } 379 380 static void intel_connector_add_to_fbdev(struct intel_connector *connector) 381 { 382 #ifdef CONFIG_DRM_I915_FBDEV 383 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 384 drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base); 385 #endif 386 } 387 388 static void intel_connector_remove_from_fbdev(struct intel_connector *connector) 389 { 390 #ifdef CONFIG_DRM_I915_FBDEV 391 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 392 drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base); 393 #endif 394 } 395 396 static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) 397 { 398 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); 399 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 400 struct drm_device *dev = intel_dig_port->base.base.dev; 401 struct intel_connector *intel_connector; 402 struct drm_connector *connector; 403 int i; 404 405 intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL); 406 if (!intel_connector) 407 return NULL; 408 409 connector = &intel_connector->base; 410 drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort); 411 drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs); 412 413 intel_connector->unregister = intel_connector_unregister; 414 intel_connector->get_hw_state = intel_dp_mst_get_hw_state; 415 intel_connector->mst_port = intel_dp; 416 intel_connector->port = port; 417 418 for (i = PIPE_A; i <= PIPE_C; i++) { 419 drm_mode_connector_attach_encoder(&intel_connector->base, 420 &intel_dp->mst_encoders[i]->base.base); 421 } 422 intel_dp_add_properties(intel_dp, connector); 423 424 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); 425 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); 426 427 drm_mode_connector_set_path_property(connector, pathprop); 428 drm_reinit_primary_mode_group(dev); 429 mutex_lock(&dev->mode_config.mutex); 430 intel_connector_add_to_fbdev(intel_connector); 431 mutex_unlock(&dev->mode_config.mutex); 432 drm_connector_register(&intel_connector->base); 433 return connector; 434 } 435 436 static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, 437 struct drm_connector *connector) 438 { 439 struct intel_connector *intel_connector = to_intel_connector(connector); 440 struct drm_device *dev = connector->dev; 441 /* need to nuke the connector */ 442 mutex_lock(&dev->mode_config.mutex); 443 intel_connector_dpms(connector, DRM_MODE_DPMS_OFF); 444 mutex_unlock(&dev->mode_config.mutex); 445 446 intel_connector->unregister(intel_connector); 447 448 mutex_lock(&dev->mode_config.mutex); 449 intel_connector_remove_from_fbdev(intel_connector); 450 drm_connector_cleanup(connector); 451 mutex_unlock(&dev->mode_config.mutex); 452 453 drm_reinit_primary_mode_group(dev); 454 455 kfree(intel_connector); 456 DRM_DEBUG_KMS("\n"); 457 } 458 459 static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr) 460 { 461 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); 462 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 463 struct drm_device *dev = intel_dig_port->base.base.dev; 464 465 drm_kms_helper_hotplug_event(dev); 466 } 467 468 static struct drm_dp_mst_topology_cbs mst_cbs = { 469 .add_connector = intel_dp_add_mst_connector, 470 .destroy_connector = intel_dp_destroy_mst_connector, 471 .hotplug = intel_dp_mst_hotplug, 472 }; 473 474 static struct intel_dp_mst_encoder * 475 intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe) 476 { 477 struct intel_dp_mst_encoder *intel_mst; 478 struct intel_encoder *intel_encoder; 479 struct drm_device *dev = intel_dig_port->base.base.dev; 480 481 intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL); 482 483 if (!intel_mst) 484 return NULL; 485 486 intel_mst->pipe = pipe; 487 intel_encoder = &intel_mst->base; 488 intel_mst->primary = intel_dig_port; 489 490 drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, 491 DRM_MODE_ENCODER_DPMST); 492 493 intel_encoder->type = INTEL_OUTPUT_DP_MST; 494 intel_encoder->crtc_mask = 0x7; 495 intel_encoder->cloneable = 0; 496 497 intel_encoder->compute_config = intel_dp_mst_compute_config; 498 intel_encoder->disable = intel_mst_disable_dp; 499 intel_encoder->post_disable = intel_mst_post_disable_dp; 500 intel_encoder->pre_enable = intel_mst_pre_enable_dp; 501 intel_encoder->enable = intel_mst_enable_dp; 502 intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state; 503 intel_encoder->get_config = intel_dp_mst_enc_get_config; 504 505 return intel_mst; 506 507 } 508 509 static bool 510 intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port) 511 { 512 int i; 513 struct intel_dp *intel_dp = &intel_dig_port->dp; 514 515 for (i = PIPE_A; i <= PIPE_C; i++) 516 intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i); 517 return true; 518 } 519 #endif 520 521 int 522 intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id) 523 { 524 struct intel_dp *intel_dp = &intel_dig_port->dp; 525 #if 0 526 struct drm_device *dev = intel_dig_port->base.base.dev; 527 int ret; 528 529 intel_dp->can_mst = true; 530 intel_dp->mst_mgr.cbs = &mst_cbs; 531 532 /* create encoders */ 533 intel_dp_create_fake_mst_encoders(intel_dig_port); 534 ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id); 535 if (ret) { 536 intel_dp->can_mst = false; 537 return ret; 538 } 539 #endif 540 intel_dp->can_mst = false; 541 return 0; 542 } 543 544 void 545 intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port) 546 { 547 struct intel_dp *intel_dp = &intel_dig_port->dp; 548 549 if (!intel_dp->can_mst) 550 return; 551 552 #if 0 553 drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); 554 #endif 555 /* encoders will get killed by normal cleanup */ 556 } 557