1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 */ 27 #include <linux/i2c.h> 28 #include <linux/slab.h> 29 #include <drm/drmP.h> 30 #include <drm/drm_atomic_helper.h> 31 #include <drm/drm_crtc.h> 32 #include "intel_drv.h" 33 #include <drm/i915_drm.h> 34 #include "i915_drv.h" 35 #include "dvo.h" 36 37 #define SIL164_ADDR 0x38 38 #define CH7xxx_ADDR 0x76 39 #define TFP410_ADDR 0x38 40 #define NS2501_ADDR 0x38 41 42 static const struct intel_dvo_device intel_dvo_devices[] = { 43 { 44 .type = INTEL_DVO_CHIP_TMDS, 45 .name = "sil164", 46 .dvo_reg = DVOC, 47 .dvo_srcdim_reg = DVOC_SRCDIM, 48 .slave_addr = SIL164_ADDR, 49 .dev_ops = &sil164_ops, 50 }, 51 { 52 .type = INTEL_DVO_CHIP_TMDS, 53 .name = "ch7xxx", 54 .dvo_reg = DVOC, 55 .dvo_srcdim_reg = DVOC_SRCDIM, 56 .slave_addr = CH7xxx_ADDR, 57 .dev_ops = &ch7xxx_ops, 58 }, 59 { 60 .type = INTEL_DVO_CHIP_TMDS, 61 .name = "ch7xxx", 62 .dvo_reg = DVOC, 63 .dvo_srcdim_reg = DVOC_SRCDIM, 64 .slave_addr = 0x75, /* For some ch7010 */ 65 .dev_ops = &ch7xxx_ops, 66 }, 67 { 68 .type = INTEL_DVO_CHIP_LVDS, 69 .name = "ivch", 70 .dvo_reg = DVOA, 71 .dvo_srcdim_reg = DVOA_SRCDIM, 72 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ 73 .dev_ops = &ivch_ops, 74 }, 75 { 76 .type = INTEL_DVO_CHIP_TMDS, 77 .name = "tfp410", 78 .dvo_reg = DVOC, 79 .dvo_srcdim_reg = DVOC_SRCDIM, 80 .slave_addr = TFP410_ADDR, 81 .dev_ops = &tfp410_ops, 82 }, 83 { 84 .type = INTEL_DVO_CHIP_LVDS, 85 .name = "ch7017", 86 .dvo_reg = DVOC, 87 .dvo_srcdim_reg = DVOC_SRCDIM, 88 .slave_addr = 0x75, 89 .gpio = GMBUS_PIN_DPB, 90 .dev_ops = &ch7017_ops, 91 }, 92 { 93 .type = INTEL_DVO_CHIP_TMDS, 94 .name = "ns2501", 95 .dvo_reg = DVOB, 96 .dvo_srcdim_reg = DVOB_SRCDIM, 97 .slave_addr = NS2501_ADDR, 98 .dev_ops = &ns2501_ops, 99 } 100 }; 101 102 struct intel_dvo { 103 struct intel_encoder base; 104 105 struct intel_dvo_device dev; 106 107 struct intel_connector *attached_connector; 108 109 bool panel_wants_dither; 110 }; 111 112 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder) 113 { 114 return container_of(encoder, struct intel_dvo, base); 115 } 116 117 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector) 118 { 119 return enc_to_dvo(intel_attached_encoder(connector)); 120 } 121 122 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) 123 { 124 struct drm_device *dev = connector->base.dev; 125 struct drm_i915_private *dev_priv = to_i915(dev); 126 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base); 127 u32 tmp; 128 129 tmp = I915_READ(intel_dvo->dev.dvo_reg); 130 131 if (!(tmp & DVO_ENABLE)) 132 return false; 133 134 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); 135 } 136 137 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, 138 enum i915_pipe *pipe) 139 { 140 struct drm_device *dev = encoder->base.dev; 141 struct drm_i915_private *dev_priv = to_i915(dev); 142 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 143 u32 tmp; 144 145 tmp = I915_READ(intel_dvo->dev.dvo_reg); 146 147 if (!(tmp & DVO_ENABLE)) 148 return false; 149 150 *pipe = PORT_TO_PIPE(tmp); 151 152 return true; 153 } 154 155 static void intel_dvo_get_config(struct intel_encoder *encoder, 156 struct intel_crtc_state *pipe_config) 157 { 158 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 159 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 160 u32 tmp, flags = 0; 161 162 tmp = I915_READ(intel_dvo->dev.dvo_reg); 163 if (tmp & DVO_HSYNC_ACTIVE_HIGH) 164 flags |= DRM_MODE_FLAG_PHSYNC; 165 else 166 flags |= DRM_MODE_FLAG_NHSYNC; 167 if (tmp & DVO_VSYNC_ACTIVE_HIGH) 168 flags |= DRM_MODE_FLAG_PVSYNC; 169 else 170 flags |= DRM_MODE_FLAG_NVSYNC; 171 172 pipe_config->base.adjusted_mode.flags |= flags; 173 174 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock; 175 } 176 177 static void intel_disable_dvo(struct intel_encoder *encoder) 178 { 179 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 180 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 181 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; 182 u32 temp = I915_READ(dvo_reg); 183 184 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); 185 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE); 186 I915_READ(dvo_reg); 187 } 188 189 static void intel_enable_dvo(struct intel_encoder *encoder) 190 { 191 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 192 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 193 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 194 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; 195 u32 temp = I915_READ(dvo_reg); 196 197 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, 198 &crtc->config->base.mode, 199 &crtc->config->base.adjusted_mode); 200 201 I915_WRITE(dvo_reg, temp | DVO_ENABLE); 202 I915_READ(dvo_reg); 203 204 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); 205 } 206 207 static enum drm_mode_status 208 intel_dvo_mode_valid(struct drm_connector *connector, 209 struct drm_display_mode *mode) 210 { 211 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 212 const struct drm_display_mode *fixed_mode = 213 to_intel_connector(connector)->panel.fixed_mode; 214 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; 215 int target_clock = mode->clock; 216 217 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 218 return MODE_NO_DBLESCAN; 219 220 /* XXX: Validate clock range */ 221 222 if (fixed_mode) { 223 if (mode->hdisplay > fixed_mode->hdisplay) 224 return MODE_PANEL; 225 if (mode->vdisplay > fixed_mode->vdisplay) 226 return MODE_PANEL; 227 228 target_clock = fixed_mode->clock; 229 } 230 231 if (target_clock > max_dotclk) 232 return MODE_CLOCK_HIGH; 233 234 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode); 235 } 236 237 static bool intel_dvo_compute_config(struct intel_encoder *encoder, 238 struct intel_crtc_state *pipe_config) 239 { 240 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 241 const struct drm_display_mode *fixed_mode = 242 intel_dvo->attached_connector->panel.fixed_mode; 243 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 244 245 /* If we have timings from the BIOS for the panel, put them in 246 * to the adjusted mode. The CRTC will be set up for this mode, 247 * with the panel scaling set up to source from the H/VDisplay 248 * of the original mode. 249 */ 250 if (fixed_mode) 251 intel_fixed_panel_mode(fixed_mode, adjusted_mode); 252 253 return true; 254 } 255 256 static void intel_dvo_pre_enable(struct intel_encoder *encoder) 257 { 258 struct drm_device *dev = encoder->base.dev; 259 struct drm_i915_private *dev_priv = to_i915(dev); 260 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 261 const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode; 262 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 263 int pipe = crtc->pipe; 264 u32 dvo_val; 265 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; 266 i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg; 267 268 /* Save the data order, since I don't know what it should be set to. */ 269 dvo_val = I915_READ(dvo_reg) & 270 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG); 271 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | 272 DVO_BLANK_ACTIVE_HIGH; 273 274 if (pipe == 1) 275 dvo_val |= DVO_PIPE_B_SELECT; 276 dvo_val |= DVO_PIPE_STALL; 277 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 278 dvo_val |= DVO_HSYNC_ACTIVE_HIGH; 279 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 280 dvo_val |= DVO_VSYNC_ACTIVE_HIGH; 281 282 /*I915_WRITE(DVOB_SRCDIM, 283 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | 284 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/ 285 I915_WRITE(dvo_srcdim_reg, 286 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | 287 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT)); 288 /*I915_WRITE(DVOB, dvo_val);*/ 289 I915_WRITE(dvo_reg, dvo_val); 290 } 291 292 /** 293 * Detect the output connection on our DVO device. 294 * 295 * Unimplemented. 296 */ 297 static enum drm_connector_status 298 intel_dvo_detect(struct drm_connector *connector, bool force) 299 { 300 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 301 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 302 connector->base.id, connector->name); 303 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev); 304 } 305 306 static int intel_dvo_get_modes(struct drm_connector *connector) 307 { 308 struct drm_i915_private *dev_priv = to_i915(connector->dev); 309 const struct drm_display_mode *fixed_mode = 310 to_intel_connector(connector)->panel.fixed_mode; 311 312 /* We should probably have an i2c driver get_modes function for those 313 * devices which will have a fixed set of modes determined by the chip 314 * (TV-out, for example), but for now with just TMDS and LVDS, 315 * that's not the case. 316 */ 317 intel_ddc_get_modes(connector, 318 intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC)); 319 if (!list_empty(&connector->probed_modes)) 320 return 1; 321 322 if (fixed_mode) { 323 struct drm_display_mode *mode; 324 mode = drm_mode_duplicate(connector->dev, fixed_mode); 325 if (mode) { 326 drm_mode_probed_add(connector, mode); 327 return 1; 328 } 329 } 330 331 return 0; 332 } 333 334 static void intel_dvo_destroy(struct drm_connector *connector) 335 { 336 drm_connector_cleanup(connector); 337 intel_panel_fini(&to_intel_connector(connector)->panel); 338 kfree(connector); 339 } 340 341 static const struct drm_connector_funcs intel_dvo_connector_funcs = { 342 .dpms = drm_atomic_helper_connector_dpms, 343 .detect = intel_dvo_detect, 344 .late_register = intel_connector_register, 345 .early_unregister = intel_connector_unregister, 346 .destroy = intel_dvo_destroy, 347 .fill_modes = drm_helper_probe_single_connector_modes, 348 .atomic_get_property = intel_connector_atomic_get_property, 349 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 350 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 351 }; 352 353 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { 354 .mode_valid = intel_dvo_mode_valid, 355 .get_modes = intel_dvo_get_modes, 356 }; 357 358 static void intel_dvo_enc_destroy(struct drm_encoder *encoder) 359 { 360 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder)); 361 362 if (intel_dvo->dev.dev_ops->destroy) 363 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev); 364 365 intel_encoder_destroy(encoder); 366 } 367 368 static const struct drm_encoder_funcs intel_dvo_enc_funcs = { 369 .destroy = intel_dvo_enc_destroy, 370 }; 371 372 /** 373 * Attempts to get a fixed panel timing for LVDS (currently only the i830). 374 * 375 * Other chips with DVO LVDS will need to extend this to deal with the LVDS 376 * chip being on DVOB/C and having multiple pipes. 377 */ 378 static struct drm_display_mode * 379 intel_dvo_get_current_mode(struct drm_connector *connector) 380 { 381 struct drm_device *dev = connector->dev; 382 struct drm_i915_private *dev_priv = to_i915(dev); 383 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 384 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg); 385 struct drm_display_mode *mode = NULL; 386 387 /* If the DVO port is active, that'll be the LVDS, so we can pull out 388 * its timings to get how the BIOS set up the panel. 389 */ 390 if (dvo_val & DVO_ENABLE) { 391 struct drm_crtc *crtc; 392 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0; 393 394 crtc = intel_get_crtc_for_pipe(dev, pipe); 395 if (crtc) { 396 mode = intel_crtc_mode_get(dev, crtc); 397 if (mode) { 398 mode->type |= DRM_MODE_TYPE_PREFERRED; 399 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH) 400 mode->flags |= DRM_MODE_FLAG_PHSYNC; 401 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH) 402 mode->flags |= DRM_MODE_FLAG_PVSYNC; 403 } 404 } 405 } 406 407 return mode; 408 } 409 410 static char intel_dvo_port_name(i915_reg_t dvo_reg) 411 { 412 if (i915_mmio_reg_equal(dvo_reg, DVOA)) 413 return 'A'; 414 else if (i915_mmio_reg_equal(dvo_reg, DVOB)) 415 return 'B'; 416 else if (i915_mmio_reg_equal(dvo_reg, DVOC)) 417 return 'C'; 418 else 419 return '?'; 420 } 421 422 void intel_dvo_init(struct drm_device *dev) 423 { 424 struct drm_i915_private *dev_priv = to_i915(dev); 425 struct intel_encoder *intel_encoder; 426 struct intel_dvo *intel_dvo; 427 struct intel_connector *intel_connector; 428 int i; 429 int encoder_type = DRM_MODE_ENCODER_NONE; 430 431 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL); 432 if (!intel_dvo) 433 return; 434 435 intel_connector = intel_connector_alloc(); 436 if (!intel_connector) { 437 kfree(intel_dvo); 438 return; 439 } 440 441 intel_dvo->attached_connector = intel_connector; 442 443 intel_encoder = &intel_dvo->base; 444 445 intel_encoder->disable = intel_disable_dvo; 446 intel_encoder->enable = intel_enable_dvo; 447 intel_encoder->get_hw_state = intel_dvo_get_hw_state; 448 intel_encoder->get_config = intel_dvo_get_config; 449 intel_encoder->compute_config = intel_dvo_compute_config; 450 intel_encoder->pre_enable = intel_dvo_pre_enable; 451 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state; 452 453 /* Now, try to find a controller */ 454 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { 455 struct drm_connector *connector = &intel_connector->base; 456 const struct intel_dvo_device *dvo = &intel_dvo_devices[i]; 457 struct i2c_adapter *i2c; 458 int gpio; 459 bool dvoinit; 460 enum i915_pipe pipe; 461 uint32_t dpll[I915_MAX_PIPES]; 462 463 /* Allow the I2C driver info to specify the GPIO to be used in 464 * special cases, but otherwise default to what's defined 465 * in the spec. 466 */ 467 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio)) 468 gpio = dvo->gpio; 469 else if (dvo->type == INTEL_DVO_CHIP_LVDS) 470 gpio = GMBUS_PIN_SSC; 471 else 472 gpio = GMBUS_PIN_DPB; 473 474 /* Set up the I2C bus necessary for the chip we're probing. 475 * It appears that everything is on GPIOE except for panels 476 * on i830 laptops, which are on GPIOB (DVOA). 477 */ 478 i2c = intel_gmbus_get_adapter(dev_priv, gpio); 479 480 intel_dvo->dev = *dvo; 481 482 /* GMBUS NAK handling seems to be unstable, hence let the 483 * transmitter detection run in bit banging mode for now. 484 */ 485 intel_gmbus_force_bit(i2c, true); 486 487 /* ns2501 requires the DVO 2x clock before it will 488 * respond to i2c accesses, so make sure we have 489 * have the clock enabled before we attempt to 490 * initialize the device. 491 */ 492 for_each_pipe(dev_priv, pipe) { 493 dpll[pipe] = I915_READ(DPLL(pipe)); 494 I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE); 495 } 496 497 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c); 498 499 /* restore the DVO 2x clock state to original */ 500 for_each_pipe(dev_priv, pipe) { 501 I915_WRITE(DPLL(pipe), dpll[pipe]); 502 } 503 504 intel_gmbus_force_bit(i2c, false); 505 506 if (!dvoinit) 507 continue; 508 509 drm_encoder_init(dev, &intel_encoder->base, 510 &intel_dvo_enc_funcs, encoder_type, 511 "DVO %c", intel_dvo_port_name(dvo->dvo_reg)); 512 513 intel_encoder->type = INTEL_OUTPUT_DVO; 514 intel_encoder->crtc_mask = (1 << 0) | (1 << 1); 515 switch (dvo->type) { 516 case INTEL_DVO_CHIP_TMDS: 517 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) | 518 (1 << INTEL_OUTPUT_DVO); 519 drm_connector_init(dev, connector, 520 &intel_dvo_connector_funcs, 521 DRM_MODE_CONNECTOR_DVII); 522 encoder_type = DRM_MODE_ENCODER_TMDS; 523 break; 524 case INTEL_DVO_CHIP_LVDS: 525 intel_encoder->cloneable = 0; 526 drm_connector_init(dev, connector, 527 &intel_dvo_connector_funcs, 528 DRM_MODE_CONNECTOR_LVDS); 529 encoder_type = DRM_MODE_ENCODER_LVDS; 530 break; 531 } 532 533 drm_connector_helper_add(connector, 534 &intel_dvo_connector_helper_funcs); 535 connector->display_info.subpixel_order = SubPixelHorizontalRGB; 536 connector->interlace_allowed = false; 537 connector->doublescan_allowed = false; 538 539 intel_connector_attach_encoder(intel_connector, intel_encoder); 540 if (dvo->type == INTEL_DVO_CHIP_LVDS) { 541 /* For our LVDS chipsets, we should hopefully be able 542 * to dig the fixed panel mode out of the BIOS data. 543 * However, it's in a different format from the BIOS 544 * data on chipsets with integrated LVDS (stored in AIM 545 * headers, likely), so for now, just get the current 546 * mode being output through DVO. 547 */ 548 intel_panel_init(&intel_connector->panel, 549 intel_dvo_get_current_mode(connector), 550 NULL); 551 intel_dvo->panel_wants_dither = true; 552 } 553 554 return; 555 } 556 557 kfree(intel_dvo); 558 kfree(intel_connector); 559 } 560