1 /* 2 * Copyright © 2006-2007 Intel Corporation 3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Dave Airlie <airlied@linux.ie> 27 * Jesse Barnes <jesse.barnes@intel.com> 28 */ 29 30 #include <linux/dmi.h> 31 #include <linux/i2c.h> 32 #include <drm/drmP.h> 33 #include <drm/drm_atomic_helper.h> 34 #include <drm/drm_crtc.h> 35 #include <drm/drm_edid.h> 36 #include "intel_drv.h" 37 #include <drm/i915_drm.h> 38 #include "i915_drv.h" 39 40 /* Private structure for the integrated LVDS support */ 41 struct intel_lvds_connector { 42 struct intel_connector base; 43 44 struct notifier_block lid_notifier; 45 }; 46 47 struct intel_lvds_encoder { 48 struct intel_encoder base; 49 50 bool is_dual_link; 51 u32 reg; 52 u32 a3_power; 53 54 struct intel_lvds_connector *attached_connector; 55 }; 56 57 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder) 58 { 59 return container_of(encoder, struct intel_lvds_encoder, base.base); 60 } 61 62 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector) 63 { 64 return container_of(connector, struct intel_lvds_connector, base.base); 65 } 66 67 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder, 68 enum i915_pipe *pipe) 69 { 70 struct drm_device *dev = encoder->base.dev; 71 struct drm_i915_private *dev_priv = dev->dev_private; 72 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 73 enum intel_display_power_domain power_domain; 74 u32 tmp; 75 76 power_domain = intel_display_port_power_domain(encoder); 77 if (!intel_display_power_is_enabled(dev_priv, power_domain)) 78 return false; 79 80 tmp = I915_READ(lvds_encoder->reg); 81 82 if (!(tmp & LVDS_PORT_EN)) 83 return false; 84 85 if (HAS_PCH_CPT(dev)) 86 *pipe = PORT_TO_PIPE_CPT(tmp); 87 else 88 *pipe = PORT_TO_PIPE(tmp); 89 90 return true; 91 } 92 93 static void intel_lvds_get_config(struct intel_encoder *encoder, 94 struct intel_crtc_state *pipe_config) 95 { 96 struct drm_device *dev = encoder->base.dev; 97 struct drm_i915_private *dev_priv = dev->dev_private; 98 u32 lvds_reg, tmp, flags = 0; 99 int dotclock; 100 101 if (HAS_PCH_SPLIT(dev)) 102 lvds_reg = PCH_LVDS; 103 else 104 lvds_reg = LVDS; 105 106 tmp = I915_READ(lvds_reg); 107 if (tmp & LVDS_HSYNC_POLARITY) 108 flags |= DRM_MODE_FLAG_NHSYNC; 109 else 110 flags |= DRM_MODE_FLAG_PHSYNC; 111 if (tmp & LVDS_VSYNC_POLARITY) 112 flags |= DRM_MODE_FLAG_NVSYNC; 113 else 114 flags |= DRM_MODE_FLAG_PVSYNC; 115 116 pipe_config->base.adjusted_mode.flags |= flags; 117 118 /* gen2/3 store dither state in pfit control, needs to match */ 119 if (INTEL_INFO(dev)->gen < 4) { 120 tmp = I915_READ(PFIT_CONTROL); 121 122 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE; 123 } 124 125 dotclock = pipe_config->port_clock; 126 127 if (HAS_PCH_SPLIT(dev_priv->dev)) 128 ironlake_check_encoder_dotclock(pipe_config, dotclock); 129 130 pipe_config->base.adjusted_mode.crtc_clock = dotclock; 131 } 132 133 static void intel_pre_enable_lvds(struct intel_encoder *encoder) 134 { 135 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 136 struct drm_device *dev = encoder->base.dev; 137 struct drm_i915_private *dev_priv = dev->dev_private; 138 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 139 const struct drm_display_mode *adjusted_mode = 140 &crtc->config->base.adjusted_mode; 141 int pipe = crtc->pipe; 142 u32 temp; 143 144 if (HAS_PCH_SPLIT(dev)) { 145 assert_fdi_rx_pll_disabled(dev_priv, pipe); 146 assert_shared_dpll_disabled(dev_priv, 147 intel_crtc_to_shared_dpll(crtc)); 148 } else { 149 assert_pll_disabled(dev_priv, pipe); 150 } 151 152 temp = I915_READ(lvds_encoder->reg); 153 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP; 154 155 if (HAS_PCH_CPT(dev)) { 156 temp &= ~PORT_TRANS_SEL_MASK; 157 temp |= PORT_TRANS_SEL_CPT(pipe); 158 } else { 159 if (pipe == 1) { 160 temp |= LVDS_PIPEB_SELECT; 161 } else { 162 temp &= ~LVDS_PIPEB_SELECT; 163 } 164 } 165 166 /* set the corresponsding LVDS_BORDER bit */ 167 temp &= ~LVDS_BORDER_ENABLE; 168 temp |= crtc->config->gmch_pfit.lvds_border_bits; 169 /* Set the B0-B3 data pairs corresponding to whether we're going to 170 * set the DPLLs for dual-channel mode or not. 171 */ 172 if (lvds_encoder->is_dual_link) 173 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP; 174 else 175 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP); 176 177 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP) 178 * appropriately here, but we need to look more thoroughly into how 179 * panels behave in the two modes. For now, let's just maintain the 180 * value we got from the BIOS. 181 */ 182 temp &= ~LVDS_A3_POWER_MASK; 183 temp |= lvds_encoder->a3_power; 184 185 /* Set the dithering flag on LVDS as needed, note that there is no 186 * special lvds dither control bit on pch-split platforms, dithering is 187 * only controlled through the PIPECONF reg. */ 188 if (INTEL_INFO(dev)->gen == 4) { 189 /* Bspec wording suggests that LVDS port dithering only exists 190 * for 18bpp panels. */ 191 if (crtc->config->dither && crtc->config->pipe_bpp == 18) 192 temp |= LVDS_ENABLE_DITHER; 193 else 194 temp &= ~LVDS_ENABLE_DITHER; 195 } 196 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY); 197 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) 198 temp |= LVDS_HSYNC_POLARITY; 199 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) 200 temp |= LVDS_VSYNC_POLARITY; 201 202 I915_WRITE(lvds_encoder->reg, temp); 203 } 204 205 /** 206 * Sets the power state for the panel. 207 */ 208 static void intel_enable_lvds(struct intel_encoder *encoder) 209 { 210 struct drm_device *dev = encoder->base.dev; 211 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 212 struct intel_connector *intel_connector = 213 &lvds_encoder->attached_connector->base; 214 struct drm_i915_private *dev_priv = dev->dev_private; 215 u32 ctl_reg, stat_reg; 216 217 if (HAS_PCH_SPLIT(dev)) { 218 ctl_reg = PCH_PP_CONTROL; 219 stat_reg = PCH_PP_STATUS; 220 } else { 221 ctl_reg = PP_CONTROL; 222 stat_reg = PP_STATUS; 223 } 224 225 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN); 226 227 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON); 228 POSTING_READ(lvds_encoder->reg); 229 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000)) 230 DRM_ERROR("timed out waiting for panel to power on\n"); 231 232 intel_panel_enable_backlight(intel_connector); 233 } 234 235 static void intel_disable_lvds(struct intel_encoder *encoder) 236 { 237 struct drm_device *dev = encoder->base.dev; 238 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 239 struct drm_i915_private *dev_priv = dev->dev_private; 240 u32 ctl_reg, stat_reg; 241 242 if (HAS_PCH_SPLIT(dev)) { 243 ctl_reg = PCH_PP_CONTROL; 244 stat_reg = PCH_PP_STATUS; 245 } else { 246 ctl_reg = PP_CONTROL; 247 stat_reg = PP_STATUS; 248 } 249 250 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON); 251 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000)) 252 DRM_ERROR("timed out waiting for panel to power off\n"); 253 254 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN); 255 POSTING_READ(lvds_encoder->reg); 256 } 257 258 static void gmch_disable_lvds(struct intel_encoder *encoder) 259 { 260 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 261 struct intel_connector *intel_connector = 262 &lvds_encoder->attached_connector->base; 263 264 intel_panel_disable_backlight(intel_connector); 265 266 intel_disable_lvds(encoder); 267 } 268 269 static void pch_disable_lvds(struct intel_encoder *encoder) 270 { 271 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 272 struct intel_connector *intel_connector = 273 &lvds_encoder->attached_connector->base; 274 275 intel_panel_disable_backlight(intel_connector); 276 } 277 278 static void pch_post_disable_lvds(struct intel_encoder *encoder) 279 { 280 intel_disable_lvds(encoder); 281 } 282 283 static enum drm_mode_status 284 intel_lvds_mode_valid(struct drm_connector *connector, 285 struct drm_display_mode *mode) 286 { 287 struct intel_connector *intel_connector = to_intel_connector(connector); 288 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode; 289 290 if (mode->hdisplay > fixed_mode->hdisplay) 291 return MODE_PANEL; 292 if (mode->vdisplay > fixed_mode->vdisplay) 293 return MODE_PANEL; 294 295 return MODE_OK; 296 } 297 298 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder, 299 struct intel_crtc_state *pipe_config) 300 { 301 struct drm_device *dev = intel_encoder->base.dev; 302 struct intel_lvds_encoder *lvds_encoder = 303 to_lvds_encoder(&intel_encoder->base); 304 struct intel_connector *intel_connector = 305 &lvds_encoder->attached_connector->base; 306 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 307 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); 308 unsigned int lvds_bpp; 309 310 /* Should never happen!! */ 311 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) { 312 DRM_ERROR("Can't support LVDS on pipe A\n"); 313 return false; 314 } 315 316 if (lvds_encoder->a3_power == LVDS_A3_POWER_UP) 317 lvds_bpp = 8*3; 318 else 319 lvds_bpp = 6*3; 320 321 if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) { 322 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n", 323 pipe_config->pipe_bpp, lvds_bpp); 324 pipe_config->pipe_bpp = lvds_bpp; 325 } 326 327 /* 328 * We have timings from the BIOS for the panel, put them in 329 * to the adjusted mode. The CRTC will be set up for this mode, 330 * with the panel scaling set up to source from the H/VDisplay 331 * of the original mode. 332 */ 333 intel_fixed_panel_mode(intel_connector->panel.fixed_mode, 334 adjusted_mode); 335 336 if (HAS_PCH_SPLIT(dev)) { 337 pipe_config->has_pch_encoder = true; 338 339 intel_pch_panel_fitting(intel_crtc, pipe_config, 340 intel_connector->panel.fitting_mode); 341 } else { 342 intel_gmch_panel_fitting(intel_crtc, pipe_config, 343 intel_connector->panel.fitting_mode); 344 345 } 346 347 /* 348 * XXX: It would be nice to support lower refresh rates on the 349 * panels to reduce power consumption, and perhaps match the 350 * user's requested refresh rate. 351 */ 352 353 return true; 354 } 355 356 /** 357 * Detect the LVDS connection. 358 * 359 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means 360 * connected and closed means disconnected. We also send hotplug events as 361 * needed, using lid status notification from the input layer. 362 */ 363 static enum drm_connector_status 364 intel_lvds_detect(struct drm_connector *connector, bool force) 365 { 366 struct drm_device *dev = connector->dev; 367 enum drm_connector_status status; 368 369 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 370 connector->base.id, connector->name); 371 372 status = intel_panel_detect(dev); 373 if (status != connector_status_unknown) 374 return status; 375 376 return connector_status_connected; 377 } 378 379 /** 380 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. 381 */ 382 static int intel_lvds_get_modes(struct drm_connector *connector) 383 { 384 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector); 385 struct drm_device *dev = connector->dev; 386 struct drm_display_mode *mode; 387 388 /* use cached edid if we have one */ 389 if (!IS_ERR_OR_NULL(lvds_connector->base.edid)) 390 return drm_add_edid_modes(connector, lvds_connector->base.edid); 391 392 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode); 393 if (mode == NULL) 394 return 0; 395 396 drm_mode_probed_add(connector, mode); 397 return 1; 398 } 399 400 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id) 401 { 402 DRM_INFO("Skipping forced modeset for %s\n", id->ident); 403 return 1; 404 } 405 406 /* The GPU hangs up on these systems if modeset is performed on LID open */ 407 static const struct dmi_system_id intel_no_modeset_on_lid[] = { 408 { 409 .callback = intel_no_modeset_on_lid_dmi_callback, 410 .ident = "Toshiba Tecra A11", 411 .matches = { 412 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 413 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"), 414 }, 415 }, 416 417 { } /* terminating entry */ 418 }; 419 420 #if 0 421 /* 422 * Lid events. Note the use of 'modeset': 423 * - we set it to MODESET_ON_LID_OPEN on lid close, 424 * and set it to MODESET_DONE on open 425 * - we use it as a "only once" bit (ie we ignore 426 * duplicate events where it was already properly set) 427 * - the suspend/resume paths will set it to 428 * MODESET_SUSPENDED and ignore the lid open event, 429 * because they restore the mode ("lid open"). 430 */ 431 static int intel_lid_notify(struct notifier_block *nb, unsigned long val, 432 void *unused) 433 { 434 struct intel_lvds_connector *lvds_connector = 435 container_of(nb, struct intel_lvds_connector, lid_notifier); 436 struct drm_connector *connector = &lvds_connector->base.base; 437 struct drm_device *dev = connector->dev; 438 struct drm_i915_private *dev_priv = dev->dev_private; 439 440 if (dev->switch_power_state != DRM_SWITCH_POWER_ON) 441 return NOTIFY_OK; 442 443 mutex_lock(&dev_priv->modeset_restore_lock); 444 if (dev_priv->modeset_restore == MODESET_SUSPENDED) 445 goto exit; 446 /* 447 * check and update the status of LVDS connector after receiving 448 * the LID nofication event. 449 */ 450 connector->status = connector->funcs->detect(connector, false); 451 452 /* Don't force modeset on machines where it causes a GPU lockup */ 453 if (dmi_check_system(intel_no_modeset_on_lid)) 454 goto exit; 455 if (!acpi_lid_open()) { 456 /* do modeset on next lid open event */ 457 dev_priv->modeset_restore = MODESET_ON_LID_OPEN; 458 goto exit; 459 } 460 461 if (dev_priv->modeset_restore == MODESET_DONE) 462 goto exit; 463 464 /* 465 * Some old platform's BIOS love to wreak havoc while the lid is closed. 466 * We try to detect this here and undo any damage. The split for PCH 467 * platforms is rather conservative and a bit arbitrary expect that on 468 * those platforms VGA disabling requires actual legacy VGA I/O access, 469 * and as part of the cleanup in the hw state restore we also redisable 470 * the vga plane. 471 */ 472 if (!HAS_PCH_SPLIT(dev)) { 473 drm_modeset_lock_all(dev); 474 intel_display_resume(dev); 475 drm_modeset_unlock_all(dev); 476 } 477 478 dev_priv->modeset_restore = MODESET_DONE; 479 480 exit: 481 mutex_unlock(&dev_priv->modeset_restore_lock); 482 return NOTIFY_OK; 483 } 484 #endif 485 486 /** 487 * intel_lvds_destroy - unregister and free LVDS structures 488 * @connector: connector to free 489 * 490 * Unregister the DDC bus for this connector then free the driver private 491 * structure. 492 */ 493 static void intel_lvds_destroy(struct drm_connector *connector) 494 { 495 struct intel_lvds_connector *lvds_connector = 496 to_lvds_connector(connector); 497 498 #if 0 499 if (lvds_connector->lid_notifier.notifier_call) 500 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier); 501 #endif 502 503 if (!IS_ERR_OR_NULL(lvds_connector->base.edid)) 504 kfree(lvds_connector->base.edid); 505 506 intel_panel_fini(&lvds_connector->base.panel); 507 508 drm_connector_cleanup(connector); 509 kfree(connector); 510 } 511 512 static int intel_lvds_set_property(struct drm_connector *connector, 513 struct drm_property *property, 514 uint64_t value) 515 { 516 struct intel_connector *intel_connector = to_intel_connector(connector); 517 struct drm_device *dev = connector->dev; 518 519 if (property == dev->mode_config.scaling_mode_property) { 520 struct drm_crtc *crtc; 521 522 if (value == DRM_MODE_SCALE_NONE) { 523 DRM_DEBUG_KMS("no scaling not supported\n"); 524 return -EINVAL; 525 } 526 527 if (intel_connector->panel.fitting_mode == value) { 528 /* the LVDS scaling property is not changed */ 529 return 0; 530 } 531 intel_connector->panel.fitting_mode = value; 532 533 crtc = intel_attached_encoder(connector)->base.crtc; 534 if (crtc && crtc->state->enable) { 535 /* 536 * If the CRTC is enabled, the display will be changed 537 * according to the new panel fitting mode. 538 */ 539 intel_crtc_restore_mode(crtc); 540 } 541 } 542 543 return 0; 544 } 545 546 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = { 547 .get_modes = intel_lvds_get_modes, 548 .mode_valid = intel_lvds_mode_valid, 549 .best_encoder = intel_best_encoder, 550 }; 551 552 static const struct drm_connector_funcs intel_lvds_connector_funcs = { 553 .dpms = drm_atomic_helper_connector_dpms, 554 .detect = intel_lvds_detect, 555 .fill_modes = drm_helper_probe_single_connector_modes, 556 .set_property = intel_lvds_set_property, 557 .atomic_get_property = intel_connector_atomic_get_property, 558 .destroy = intel_lvds_destroy, 559 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 560 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 561 }; 562 563 static const struct drm_encoder_funcs intel_lvds_enc_funcs = { 564 .destroy = intel_encoder_destroy, 565 }; 566 567 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id) 568 { 569 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident); 570 return 1; 571 } 572 573 /* These systems claim to have LVDS, but really don't */ 574 static const struct dmi_system_id intel_no_lvds[] = { 575 { 576 .callback = intel_no_lvds_dmi_callback, 577 .ident = "Apple Mac Mini (Core series)", 578 .matches = { 579 DMI_MATCH(DMI_SYS_VENDOR, "Apple"), 580 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"), 581 }, 582 }, 583 { 584 .callback = intel_no_lvds_dmi_callback, 585 .ident = "Apple Mac Mini (Core 2 series)", 586 .matches = { 587 DMI_MATCH(DMI_SYS_VENDOR, "Apple"), 588 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"), 589 }, 590 }, 591 { 592 .callback = intel_no_lvds_dmi_callback, 593 .ident = "MSI IM-945GSE-A", 594 .matches = { 595 DMI_MATCH(DMI_SYS_VENDOR, "MSI"), 596 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"), 597 }, 598 }, 599 { 600 .callback = intel_no_lvds_dmi_callback, 601 .ident = "Dell Studio Hybrid", 602 .matches = { 603 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 604 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"), 605 }, 606 }, 607 { 608 .callback = intel_no_lvds_dmi_callback, 609 .ident = "Dell OptiPlex FX170", 610 .matches = { 611 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 612 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"), 613 }, 614 }, 615 { 616 .callback = intel_no_lvds_dmi_callback, 617 .ident = "AOpen Mini PC", 618 .matches = { 619 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"), 620 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"), 621 }, 622 }, 623 { 624 .callback = intel_no_lvds_dmi_callback, 625 .ident = "AOpen Mini PC MP915", 626 .matches = { 627 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), 628 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"), 629 }, 630 }, 631 { 632 .callback = intel_no_lvds_dmi_callback, 633 .ident = "AOpen i915GMm-HFS", 634 .matches = { 635 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), 636 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"), 637 }, 638 }, 639 { 640 .callback = intel_no_lvds_dmi_callback, 641 .ident = "AOpen i45GMx-I", 642 .matches = { 643 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), 644 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"), 645 }, 646 }, 647 { 648 .callback = intel_no_lvds_dmi_callback, 649 .ident = "Aopen i945GTt-VFA", 650 .matches = { 651 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), 652 }, 653 }, 654 { 655 .callback = intel_no_lvds_dmi_callback, 656 .ident = "Clientron U800", 657 .matches = { 658 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), 659 DMI_MATCH(DMI_PRODUCT_NAME, "U800"), 660 }, 661 }, 662 { 663 .callback = intel_no_lvds_dmi_callback, 664 .ident = "Clientron E830", 665 .matches = { 666 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), 667 DMI_MATCH(DMI_PRODUCT_NAME, "E830"), 668 }, 669 }, 670 { 671 .callback = intel_no_lvds_dmi_callback, 672 .ident = "Asus EeeBox PC EB1007", 673 .matches = { 674 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."), 675 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"), 676 }, 677 }, 678 { 679 .callback = intel_no_lvds_dmi_callback, 680 .ident = "Asus AT5NM10T-I", 681 .matches = { 682 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), 683 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"), 684 }, 685 }, 686 { 687 .callback = intel_no_lvds_dmi_callback, 688 .ident = "Hewlett-Packard HP t5740", 689 .matches = { 690 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 691 DMI_MATCH(DMI_PRODUCT_NAME, " t5740"), 692 }, 693 }, 694 { 695 .callback = intel_no_lvds_dmi_callback, 696 .ident = "Hewlett-Packard t5745", 697 .matches = { 698 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 699 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"), 700 }, 701 }, 702 { 703 .callback = intel_no_lvds_dmi_callback, 704 .ident = "Hewlett-Packard st5747", 705 .matches = { 706 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 707 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"), 708 }, 709 }, 710 { 711 .callback = intel_no_lvds_dmi_callback, 712 .ident = "MSI Wind Box DC500", 713 .matches = { 714 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"), 715 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"), 716 }, 717 }, 718 { 719 .callback = intel_no_lvds_dmi_callback, 720 .ident = "Gigabyte GA-D525TUD", 721 .matches = { 722 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."), 723 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"), 724 }, 725 }, 726 { 727 .callback = intel_no_lvds_dmi_callback, 728 .ident = "Supermicro X7SPA-H", 729 .matches = { 730 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), 731 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"), 732 }, 733 }, 734 { 735 .callback = intel_no_lvds_dmi_callback, 736 .ident = "Fujitsu Esprimo Q900", 737 .matches = { 738 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"), 739 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"), 740 }, 741 }, 742 { 743 .callback = intel_no_lvds_dmi_callback, 744 .ident = "Intel D410PT", 745 .matches = { 746 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"), 747 DMI_MATCH(DMI_BOARD_NAME, "D410PT"), 748 }, 749 }, 750 { 751 .callback = intel_no_lvds_dmi_callback, 752 .ident = "Intel D425KT", 753 .matches = { 754 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"), 755 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"), 756 }, 757 }, 758 { 759 .callback = intel_no_lvds_dmi_callback, 760 .ident = "Intel D510MO", 761 .matches = { 762 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"), 763 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"), 764 }, 765 }, 766 { 767 .callback = intel_no_lvds_dmi_callback, 768 .ident = "Intel D525MW", 769 .matches = { 770 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"), 771 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"), 772 }, 773 }, 774 775 { } /* terminating entry */ 776 }; 777 778 /* 779 * Enumerate the child dev array parsed from VBT to check whether 780 * the LVDS is present. 781 * If it is present, return 1. 782 * If it is not present, return false. 783 * If no child dev is parsed from VBT, it assumes that the LVDS is present. 784 */ 785 static bool lvds_is_present_in_vbt(struct drm_device *dev, 786 u8 *i2c_pin) 787 { 788 struct drm_i915_private *dev_priv = dev->dev_private; 789 int i; 790 791 if (!dev_priv->vbt.child_dev_num) 792 return true; 793 794 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { 795 union child_device_config *uchild = dev_priv->vbt.child_dev + i; 796 struct old_child_dev_config *child = &uchild->old; 797 798 /* If the device type is not LFP, continue. 799 * We have to check both the new identifiers as well as the 800 * old for compatibility with some BIOSes. 801 */ 802 if (child->device_type != DEVICE_TYPE_INT_LFP && 803 child->device_type != DEVICE_TYPE_LFP) 804 continue; 805 806 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin)) 807 *i2c_pin = child->i2c_pin; 808 809 /* However, we cannot trust the BIOS writers to populate 810 * the VBT correctly. Since LVDS requires additional 811 * information from AIM blocks, a non-zero addin offset is 812 * a good indicator that the LVDS is actually present. 813 */ 814 if (child->addin_offset) 815 return true; 816 817 /* But even then some BIOS writers perform some black magic 818 * and instantiate the device without reference to any 819 * additional data. Trust that if the VBT was written into 820 * the OpRegion then they have validated the LVDS's existence. 821 */ 822 if (dev_priv->opregion.vbt) 823 return true; 824 } 825 826 return false; 827 } 828 829 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id) 830 { 831 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident); 832 return 1; 833 } 834 835 static const struct dmi_system_id intel_dual_link_lvds[] = { 836 { 837 .callback = intel_dual_link_lvds_callback, 838 .ident = "Apple MacBook Pro 15\" (2010)", 839 .matches = { 840 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 841 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"), 842 }, 843 }, 844 { 845 .callback = intel_dual_link_lvds_callback, 846 .ident = "Apple MacBook Pro 15\" (2011)", 847 .matches = { 848 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 849 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"), 850 }, 851 }, 852 { 853 .callback = intel_dual_link_lvds_callback, 854 .ident = "Apple MacBook Pro 15\" (2012)", 855 .matches = { 856 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 857 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"), 858 }, 859 }, 860 { } /* terminating entry */ 861 }; 862 863 bool intel_is_dual_link_lvds(struct drm_device *dev) 864 { 865 struct intel_encoder *encoder; 866 struct intel_lvds_encoder *lvds_encoder; 867 868 for_each_intel_encoder(dev, encoder) { 869 if (encoder->type == INTEL_OUTPUT_LVDS) { 870 lvds_encoder = to_lvds_encoder(&encoder->base); 871 872 return lvds_encoder->is_dual_link; 873 } 874 } 875 876 return false; 877 } 878 879 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder) 880 { 881 struct drm_device *dev = lvds_encoder->base.base.dev; 882 unsigned int val; 883 struct drm_i915_private *dev_priv = dev->dev_private; 884 885 /* use the module option value if specified */ 886 if (i915.lvds_channel_mode > 0) 887 return i915.lvds_channel_mode == 2; 888 889 /* single channel LVDS is limited to 112 MHz */ 890 if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock 891 > 112999) 892 return true; 893 894 if (dmi_check_system(intel_dual_link_lvds)) 895 return true; 896 897 /* BIOS should set the proper LVDS register value at boot, but 898 * in reality, it doesn't set the value when the lid is closed; 899 * we need to check "the value to be set" in VBT when LVDS 900 * register is uninitialized. 901 */ 902 val = I915_READ(lvds_encoder->reg); 903 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED))) 904 val = dev_priv->vbt.bios_lvds_val; 905 906 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP; 907 } 908 909 static bool intel_lvds_supported(struct drm_device *dev) 910 { 911 /* With the introduction of the PCH we gained a dedicated 912 * LVDS presence pin, use it. */ 913 if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)) 914 return true; 915 916 /* Otherwise LVDS was only attached to mobile products, 917 * except for the inglorious 830gm */ 918 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev)) 919 return true; 920 921 return false; 922 } 923 924 /** 925 * intel_lvds_init - setup LVDS connectors on this device 926 * @dev: drm device 927 * 928 * Create the connector, register the LVDS DDC bus, and try to figure out what 929 * modes we can display on the LVDS panel (if present). 930 */ 931 void intel_lvds_init(struct drm_device *dev) 932 { 933 struct drm_i915_private *dev_priv = dev->dev_private; 934 struct intel_lvds_encoder *lvds_encoder; 935 struct intel_encoder *intel_encoder; 936 struct intel_lvds_connector *lvds_connector; 937 struct intel_connector *intel_connector; 938 struct drm_connector *connector; 939 struct drm_encoder *encoder; 940 struct drm_display_mode *scan; /* *modes, *bios_mode; */ 941 struct drm_display_mode *fixed_mode = NULL; 942 struct drm_display_mode *downclock_mode = NULL; 943 struct edid *edid; 944 struct drm_crtc *crtc; 945 u32 lvds; 946 int pipe; 947 u8 pin; 948 949 /* 950 * Unlock registers and just leave them unlocked. Do this before 951 * checking quirk lists to avoid bogus WARNINGs. 952 */ 953 if (HAS_PCH_SPLIT(dev)) { 954 I915_WRITE(PCH_PP_CONTROL, 955 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); 956 } else { 957 I915_WRITE(PP_CONTROL, 958 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); 959 } 960 if (!intel_lvds_supported(dev)) 961 return; 962 963 /* Skip init on machines we know falsely report LVDS */ 964 if (dmi_check_system(intel_no_lvds)) 965 return; 966 967 if (HAS_PCH_SPLIT(dev)) { 968 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0) 969 return; 970 if (dev_priv->vbt.edp_support) { 971 DRM_DEBUG_KMS("disable LVDS for eDP support\n"); 972 return; 973 } 974 } 975 976 pin = GMBUS_PIN_PANEL; 977 if (!lvds_is_present_in_vbt(dev, &pin)) { 978 u32 reg = HAS_PCH_SPLIT(dev) ? PCH_LVDS : LVDS; 979 if ((I915_READ(reg) & LVDS_PORT_EN) == 0) { 980 DRM_DEBUG_KMS("LVDS is not present in VBT\n"); 981 return; 982 } 983 DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n"); 984 } 985 986 lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL); 987 if (!lvds_encoder) 988 return; 989 990 lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL); 991 if (!lvds_connector) { 992 kfree(lvds_encoder); 993 return; 994 } 995 996 if (intel_connector_init(&lvds_connector->base) < 0) { 997 kfree(lvds_connector); 998 kfree(lvds_encoder); 999 return; 1000 } 1001 1002 lvds_encoder->attached_connector = lvds_connector; 1003 1004 intel_encoder = &lvds_encoder->base; 1005 encoder = &intel_encoder->base; 1006 intel_connector = &lvds_connector->base; 1007 connector = &intel_connector->base; 1008 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs, 1009 DRM_MODE_CONNECTOR_LVDS); 1010 1011 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs, 1012 DRM_MODE_ENCODER_LVDS); 1013 1014 intel_encoder->enable = intel_enable_lvds; 1015 intel_encoder->pre_enable = intel_pre_enable_lvds; 1016 intel_encoder->compute_config = intel_lvds_compute_config; 1017 if (HAS_PCH_SPLIT(dev_priv)) { 1018 intel_encoder->disable = pch_disable_lvds; 1019 intel_encoder->post_disable = pch_post_disable_lvds; 1020 } else { 1021 intel_encoder->disable = gmch_disable_lvds; 1022 } 1023 intel_encoder->get_hw_state = intel_lvds_get_hw_state; 1024 intel_encoder->get_config = intel_lvds_get_config; 1025 intel_connector->get_hw_state = intel_connector_get_hw_state; 1026 intel_connector->unregister = intel_connector_unregister; 1027 1028 intel_connector_attach_encoder(intel_connector, intel_encoder); 1029 intel_encoder->type = INTEL_OUTPUT_LVDS; 1030 1031 intel_encoder->cloneable = 0; 1032 if (HAS_PCH_SPLIT(dev)) 1033 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); 1034 else if (IS_GEN4(dev)) 1035 intel_encoder->crtc_mask = (1 << 0) | (1 << 1); 1036 else 1037 intel_encoder->crtc_mask = (1 << 1); 1038 1039 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); 1040 connector->display_info.subpixel_order = SubPixelHorizontalRGB; 1041 connector->interlace_allowed = false; 1042 connector->doublescan_allowed = false; 1043 1044 if (HAS_PCH_SPLIT(dev)) { 1045 lvds_encoder->reg = PCH_LVDS; 1046 } else { 1047 lvds_encoder->reg = LVDS; 1048 } 1049 1050 /* create the scaling mode property */ 1051 drm_mode_create_scaling_mode_property(dev); 1052 drm_object_attach_property(&connector->base, 1053 dev->mode_config.scaling_mode_property, 1054 DRM_MODE_SCALE_ASPECT); 1055 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT; 1056 /* 1057 * LVDS discovery: 1058 * 1) check for EDID on DDC 1059 * 2) check for VBT data 1060 * 3) check to see if LVDS is already on 1061 * if none of the above, no panel 1062 * 4) make sure lid is open 1063 * if closed, act like it's not there for now 1064 */ 1065 1066 /* 1067 * Attempt to get the fixed panel mode from DDC. Assume that the 1068 * preferred mode is the right one. 1069 */ 1070 mutex_lock(&dev->mode_config.mutex); 1071 edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin)); 1072 if (edid) { 1073 if (drm_add_edid_modes(connector, edid)) { 1074 drm_mode_connector_update_edid_property(connector, 1075 edid); 1076 } else { 1077 kfree(edid); 1078 edid = ERR_PTR(-EINVAL); 1079 } 1080 } else { 1081 edid = ERR_PTR(-ENOENT); 1082 } 1083 lvds_connector->base.edid = edid; 1084 1085 if (IS_ERR_OR_NULL(edid)) { 1086 /* Didn't get an EDID, so 1087 * Set wide sync ranges so we get all modes 1088 * handed to valid_mode for checking 1089 */ 1090 connector->display_info.min_vfreq = 0; 1091 connector->display_info.max_vfreq = 200; 1092 connector->display_info.min_hfreq = 0; 1093 connector->display_info.max_hfreq = 200; 1094 } 1095 1096 list_for_each_entry(scan, &connector->probed_modes, head) { 1097 if (scan->type & DRM_MODE_TYPE_PREFERRED) { 1098 DRM_DEBUG_KMS("using preferred mode from EDID: "); 1099 drm_mode_debug_printmodeline(scan); 1100 1101 fixed_mode = drm_mode_duplicate(dev, scan); 1102 if (fixed_mode) 1103 goto out; 1104 } 1105 } 1106 1107 /* Failed to get EDID, what about VBT? */ 1108 if (dev_priv->vbt.lfp_lvds_vbt_mode) { 1109 DRM_DEBUG_KMS("using mode from VBT: "); 1110 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode); 1111 1112 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode); 1113 if (fixed_mode) { 1114 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 1115 goto out; 1116 } 1117 } 1118 1119 /* 1120 * If we didn't get EDID, try checking if the panel is already turned 1121 * on. If so, assume that whatever is currently programmed is the 1122 * correct mode. 1123 */ 1124 1125 /* Ironlake: FIXME if still fail, not try pipe mode now */ 1126 if (HAS_PCH_SPLIT(dev)) 1127 goto failed; 1128 1129 lvds = I915_READ(LVDS); 1130 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; 1131 crtc = intel_get_crtc_for_pipe(dev, pipe); 1132 1133 if (crtc && (lvds & LVDS_PORT_EN)) { 1134 fixed_mode = intel_crtc_mode_get(dev, crtc); 1135 if (fixed_mode) { 1136 DRM_DEBUG_KMS("using current (BIOS) mode: "); 1137 drm_mode_debug_printmodeline(fixed_mode); 1138 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 1139 goto out; 1140 } 1141 } 1142 1143 /* If we still don't have a mode after all that, give up. */ 1144 if (!fixed_mode) 1145 goto failed; 1146 1147 out: 1148 mutex_unlock(&dev->mode_config.mutex); 1149 1150 intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode); 1151 1152 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder); 1153 DRM_DEBUG_KMS("detected %s-link lvds configuration\n", 1154 lvds_encoder->is_dual_link ? "dual" : "single"); 1155 1156 lvds_encoder->a3_power = I915_READ(lvds_encoder->reg) & 1157 LVDS_A3_POWER_MASK; 1158 1159 #if 0 1160 lvds_connector->lid_notifier.notifier_call = intel_lid_notify; 1161 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) { 1162 DRM_DEBUG_KMS("lid notifier registration failed\n"); 1163 lvds_connector->lid_notifier.notifier_call = NULL; 1164 } 1165 drm_connector_register(connector); 1166 #endif 1167 1168 intel_panel_setup_backlight(connector, INVALID_PIPE); 1169 1170 return; 1171 1172 failed: 1173 mutex_unlock(&dev->mode_config.mutex); 1174 1175 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); 1176 drm_connector_cleanup(connector); 1177 drm_encoder_cleanup(encoder); 1178 kfree(lvds_encoder); 1179 kfree(lvds_connector); 1180 return; 1181 } 1182