1 /* 2 * Copyright © 2006-2010 Intel Corporation 3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Dave Airlie <airlied@linux.ie> 27 * Jesse Barnes <jesse.barnes@intel.com> 28 * Chris Wilson <chris@chris-wilson.co.uk> 29 */ 30 31 #include <linux/kernel.h> 32 #include <linux/moduleparam.h> 33 #include <linux/pwm.h> 34 #include "intel_drv.h" 35 36 #define CRC_PMIC_PWM_PERIOD_NS 21333 37 38 void 39 intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, 40 struct drm_display_mode *adjusted_mode) 41 { 42 drm_mode_copy(adjusted_mode, fixed_mode); 43 44 drm_mode_set_crtcinfo(adjusted_mode, 0); 45 } 46 47 /** 48 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID 49 * @dev: drm device 50 * @fixed_mode : panel native mode 51 * @connector: LVDS/eDP connector 52 * 53 * Return downclock_avail 54 * Find the reduced downclock for LVDS/eDP in EDID. 55 */ 56 struct drm_display_mode * 57 intel_find_panel_downclock(struct drm_device *dev, 58 struct drm_display_mode *fixed_mode, 59 struct drm_connector *connector) 60 { 61 struct drm_display_mode *scan, *tmp_mode; 62 int temp_downclock; 63 64 temp_downclock = fixed_mode->clock; 65 tmp_mode = NULL; 66 67 list_for_each_entry(scan, &connector->probed_modes, head) { 68 /* 69 * If one mode has the same resolution with the fixed_panel 70 * mode while they have the different refresh rate, it means 71 * that the reduced downclock is found. In such 72 * case we can set the different FPx0/1 to dynamically select 73 * between low and high frequency. 74 */ 75 if (scan->hdisplay == fixed_mode->hdisplay && 76 scan->hsync_start == fixed_mode->hsync_start && 77 scan->hsync_end == fixed_mode->hsync_end && 78 scan->htotal == fixed_mode->htotal && 79 scan->vdisplay == fixed_mode->vdisplay && 80 scan->vsync_start == fixed_mode->vsync_start && 81 scan->vsync_end == fixed_mode->vsync_end && 82 scan->vtotal == fixed_mode->vtotal) { 83 if (scan->clock < temp_downclock) { 84 /* 85 * The downclock is already found. But we 86 * expect to find the lower downclock. 87 */ 88 temp_downclock = scan->clock; 89 tmp_mode = scan; 90 } 91 } 92 } 93 94 if (temp_downclock < fixed_mode->clock) 95 return drm_mode_duplicate(dev, tmp_mode); 96 else 97 return NULL; 98 } 99 100 /* adjusted_mode has been preset to be the panel's fixed mode */ 101 void 102 intel_pch_panel_fitting(struct intel_crtc *intel_crtc, 103 struct intel_crtc_state *pipe_config, 104 int fitting_mode) 105 { 106 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 107 int x = 0, y = 0, width = 0, height = 0; 108 109 /* Native modes don't need fitting */ 110 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && 111 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h) 112 goto done; 113 114 switch (fitting_mode) { 115 case DRM_MODE_SCALE_CENTER: 116 width = pipe_config->pipe_src_w; 117 height = pipe_config->pipe_src_h; 118 x = (adjusted_mode->crtc_hdisplay - width + 1)/2; 119 y = (adjusted_mode->crtc_vdisplay - height + 1)/2; 120 break; 121 122 case DRM_MODE_SCALE_ASPECT: 123 /* Scale but preserve the aspect ratio */ 124 { 125 u32 scaled_width = adjusted_mode->crtc_hdisplay 126 * pipe_config->pipe_src_h; 127 u32 scaled_height = pipe_config->pipe_src_w 128 * adjusted_mode->crtc_vdisplay; 129 if (scaled_width > scaled_height) { /* pillar */ 130 width = scaled_height / pipe_config->pipe_src_h; 131 if (width & 1) 132 width++; 133 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 134 y = 0; 135 height = adjusted_mode->crtc_vdisplay; 136 } else if (scaled_width < scaled_height) { /* letter */ 137 height = scaled_width / pipe_config->pipe_src_w; 138 if (height & 1) 139 height++; 140 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 141 x = 0; 142 width = adjusted_mode->crtc_hdisplay; 143 } else { 144 x = y = 0; 145 width = adjusted_mode->crtc_hdisplay; 146 height = adjusted_mode->crtc_vdisplay; 147 } 148 } 149 break; 150 151 case DRM_MODE_SCALE_FULLSCREEN: 152 x = y = 0; 153 width = adjusted_mode->crtc_hdisplay; 154 height = adjusted_mode->crtc_vdisplay; 155 break; 156 157 default: 158 WARN(1, "bad panel fit mode: %d\n", fitting_mode); 159 return; 160 } 161 162 done: 163 pipe_config->pch_pfit.pos = (x << 16) | y; 164 pipe_config->pch_pfit.size = (width << 16) | height; 165 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0; 166 } 167 168 static void 169 centre_horizontally(struct drm_display_mode *adjusted_mode, 170 int width) 171 { 172 u32 border, sync_pos, blank_width, sync_width; 173 174 /* keep the hsync and hblank widths constant */ 175 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; 176 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; 177 sync_pos = (blank_width - sync_width + 1) / 2; 178 179 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 180 border += border & 1; /* make the border even */ 181 182 adjusted_mode->crtc_hdisplay = width; 183 adjusted_mode->crtc_hblank_start = width + border; 184 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width; 185 186 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos; 187 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width; 188 } 189 190 static void 191 centre_vertically(struct drm_display_mode *adjusted_mode, 192 int height) 193 { 194 u32 border, sync_pos, blank_width, sync_width; 195 196 /* keep the vsync and vblank widths constant */ 197 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start; 198 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start; 199 sync_pos = (blank_width - sync_width + 1) / 2; 200 201 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 202 203 adjusted_mode->crtc_vdisplay = height; 204 adjusted_mode->crtc_vblank_start = height + border; 205 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width; 206 207 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos; 208 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width; 209 } 210 211 static inline u32 panel_fitter_scaling(u32 source, u32 target) 212 { 213 /* 214 * Floating point operation is not supported. So the FACTOR 215 * is defined, which can avoid the floating point computation 216 * when calculating the panel ratio. 217 */ 218 #define ACCURACY 12 219 #define FACTOR (1 << ACCURACY) 220 u32 ratio = source * FACTOR / target; 221 return (FACTOR * ratio + FACTOR/2) / FACTOR; 222 } 223 224 static void i965_scale_aspect(struct intel_crtc_state *pipe_config, 225 u32 *pfit_control) 226 { 227 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 228 u32 scaled_width = adjusted_mode->crtc_hdisplay * 229 pipe_config->pipe_src_h; 230 u32 scaled_height = pipe_config->pipe_src_w * 231 adjusted_mode->crtc_vdisplay; 232 233 /* 965+ is easy, it does everything in hw */ 234 if (scaled_width > scaled_height) 235 *pfit_control |= PFIT_ENABLE | 236 PFIT_SCALING_PILLAR; 237 else if (scaled_width < scaled_height) 238 *pfit_control |= PFIT_ENABLE | 239 PFIT_SCALING_LETTER; 240 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w) 241 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; 242 } 243 244 static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config, 245 u32 *pfit_control, u32 *pfit_pgm_ratios, 246 u32 *border) 247 { 248 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 249 u32 scaled_width = adjusted_mode->crtc_hdisplay * 250 pipe_config->pipe_src_h; 251 u32 scaled_height = pipe_config->pipe_src_w * 252 adjusted_mode->crtc_vdisplay; 253 u32 bits; 254 255 /* 256 * For earlier chips we have to calculate the scaling 257 * ratio by hand and program it into the 258 * PFIT_PGM_RATIO register 259 */ 260 if (scaled_width > scaled_height) { /* pillar */ 261 centre_horizontally(adjusted_mode, 262 scaled_height / 263 pipe_config->pipe_src_h); 264 265 *border = LVDS_BORDER_ENABLE; 266 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) { 267 bits = panel_fitter_scaling(pipe_config->pipe_src_h, 268 adjusted_mode->crtc_vdisplay); 269 270 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 271 bits << PFIT_VERT_SCALE_SHIFT); 272 *pfit_control |= (PFIT_ENABLE | 273 VERT_INTERP_BILINEAR | 274 HORIZ_INTERP_BILINEAR); 275 } 276 } else if (scaled_width < scaled_height) { /* letter */ 277 centre_vertically(adjusted_mode, 278 scaled_width / 279 pipe_config->pipe_src_w); 280 281 *border = LVDS_BORDER_ENABLE; 282 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) { 283 bits = panel_fitter_scaling(pipe_config->pipe_src_w, 284 adjusted_mode->crtc_hdisplay); 285 286 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 287 bits << PFIT_VERT_SCALE_SHIFT); 288 *pfit_control |= (PFIT_ENABLE | 289 VERT_INTERP_BILINEAR | 290 HORIZ_INTERP_BILINEAR); 291 } 292 } else { 293 /* Aspects match, Let hw scale both directions */ 294 *pfit_control |= (PFIT_ENABLE | 295 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | 296 VERT_INTERP_BILINEAR | 297 HORIZ_INTERP_BILINEAR); 298 } 299 } 300 301 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, 302 struct intel_crtc_state *pipe_config, 303 int fitting_mode) 304 { 305 struct drm_device *dev = intel_crtc->base.dev; 306 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; 307 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 308 309 /* Native modes don't need fitting */ 310 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && 311 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h) 312 goto out; 313 314 switch (fitting_mode) { 315 case DRM_MODE_SCALE_CENTER: 316 /* 317 * For centered modes, we have to calculate border widths & 318 * heights and modify the values programmed into the CRTC. 319 */ 320 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w); 321 centre_vertically(adjusted_mode, pipe_config->pipe_src_h); 322 border = LVDS_BORDER_ENABLE; 323 break; 324 case DRM_MODE_SCALE_ASPECT: 325 /* Scale but preserve the aspect ratio */ 326 if (INTEL_INFO(dev)->gen >= 4) 327 i965_scale_aspect(pipe_config, &pfit_control); 328 else 329 i9xx_scale_aspect(pipe_config, &pfit_control, 330 &pfit_pgm_ratios, &border); 331 break; 332 case DRM_MODE_SCALE_FULLSCREEN: 333 /* 334 * Full scaling, even if it changes the aspect ratio. 335 * Fortunately this is all done for us in hw. 336 */ 337 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay || 338 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) { 339 pfit_control |= PFIT_ENABLE; 340 if (INTEL_INFO(dev)->gen >= 4) 341 pfit_control |= PFIT_SCALING_AUTO; 342 else 343 pfit_control |= (VERT_AUTO_SCALE | 344 VERT_INTERP_BILINEAR | 345 HORIZ_AUTO_SCALE | 346 HORIZ_INTERP_BILINEAR); 347 } 348 break; 349 default: 350 WARN(1, "bad panel fit mode: %d\n", fitting_mode); 351 return; 352 } 353 354 /* 965+ wants fuzzy fitting */ 355 /* FIXME: handle multiple panels by failing gracefully */ 356 if (INTEL_INFO(dev)->gen >= 4) 357 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | 358 PFIT_FILTER_FUZZY); 359 360 out: 361 if ((pfit_control & PFIT_ENABLE) == 0) { 362 pfit_control = 0; 363 pfit_pgm_ratios = 0; 364 } 365 366 /* Make sure pre-965 set dither correctly for 18bpp panels. */ 367 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18) 368 pfit_control |= PANEL_8TO6_DITHER_ENABLE; 369 370 pipe_config->gmch_pfit.control = pfit_control; 371 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios; 372 pipe_config->gmch_pfit.lvds_border_bits = border; 373 } 374 375 enum drm_connector_status 376 intel_panel_detect(struct drm_device *dev) 377 { 378 struct drm_i915_private *dev_priv = dev->dev_private; 379 380 /* Assume that the BIOS does not lie through the OpRegion... */ 381 if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) { 382 return *dev_priv->opregion.lid_state & 0x1 ? 383 connector_status_connected : 384 connector_status_disconnected; 385 } 386 387 switch (i915.panel_ignore_lid) { 388 case -2: 389 return connector_status_connected; 390 case -1: 391 return connector_status_disconnected; 392 default: 393 return connector_status_unknown; 394 } 395 } 396 397 /** 398 * scale - scale values from one range to another 399 * 400 * @source_val: value in range [@source_min..@source_max] 401 * 402 * Return @source_val in range [@source_min..@source_max] scaled to range 403 * [@target_min..@target_max]. 404 */ 405 static uint32_t scale(uint32_t source_val, 406 uint32_t source_min, uint32_t source_max, 407 uint32_t target_min, uint32_t target_max) 408 { 409 uint64_t target_val; 410 411 WARN_ON(source_min > source_max); 412 WARN_ON(target_min > target_max); 413 414 /* defensive */ 415 source_val = clamp(source_val, source_min, source_max); 416 417 /* avoid overflows */ 418 target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) * 419 (target_max - target_min), source_max - source_min); 420 target_val += target_min; 421 422 return target_val; 423 } 424 425 /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */ 426 static inline u32 scale_user_to_hw(struct intel_connector *connector, 427 u32 user_level, u32 user_max) 428 { 429 struct intel_panel *panel = &connector->panel; 430 431 return scale(user_level, 0, user_max, 432 panel->backlight.min, panel->backlight.max); 433 } 434 435 /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result 436 * to [hw_min..hw_max]. */ 437 static inline u32 clamp_user_to_hw(struct intel_connector *connector, 438 u32 user_level, u32 user_max) 439 { 440 struct intel_panel *panel = &connector->panel; 441 u32 hw_level; 442 443 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max); 444 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max); 445 446 return hw_level; 447 } 448 449 /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */ 450 static inline u32 scale_hw_to_user(struct intel_connector *connector, 451 u32 hw_level, u32 user_max) 452 { 453 struct intel_panel *panel = &connector->panel; 454 455 return scale(hw_level, panel->backlight.min, panel->backlight.max, 456 0, user_max); 457 } 458 459 static u32 intel_panel_compute_brightness(struct intel_connector *connector, 460 u32 val) 461 { 462 struct drm_device *dev = connector->base.dev; 463 struct drm_i915_private *dev_priv = dev->dev_private; 464 struct intel_panel *panel = &connector->panel; 465 466 WARN_ON(panel->backlight.max == 0); 467 468 if (i915.invert_brightness < 0) 469 return val; 470 471 if (i915.invert_brightness > 0 || 472 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { 473 return panel->backlight.max - val; 474 } 475 476 return val; 477 } 478 479 static u32 lpt_get_backlight(struct intel_connector *connector) 480 { 481 struct drm_device *dev = connector->base.dev; 482 struct drm_i915_private *dev_priv = dev->dev_private; 483 484 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; 485 } 486 487 static u32 pch_get_backlight(struct intel_connector *connector) 488 { 489 struct drm_device *dev = connector->base.dev; 490 struct drm_i915_private *dev_priv = dev->dev_private; 491 492 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 493 } 494 495 static u32 i9xx_get_backlight(struct intel_connector *connector) 496 { 497 struct drm_device *dev = connector->base.dev; 498 struct drm_i915_private *dev_priv = dev->dev_private; 499 struct intel_panel *panel = &connector->panel; 500 u32 val; 501 502 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 503 if (INTEL_INFO(dev)->gen < 4) 504 val >>= 1; 505 506 if (panel->backlight.combination_mode) { 507 u8 lbpc; 508 509 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc); 510 val *= lbpc; 511 } 512 513 return val; 514 } 515 516 static u32 _vlv_get_backlight(struct drm_device *dev, enum i915_pipe pipe) 517 { 518 struct drm_i915_private *dev_priv = dev->dev_private; 519 520 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) 521 return 0; 522 523 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; 524 } 525 526 static u32 vlv_get_backlight(struct intel_connector *connector) 527 { 528 struct drm_device *dev = connector->base.dev; 529 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 530 531 return _vlv_get_backlight(dev, pipe); 532 } 533 534 static u32 bxt_get_backlight(struct intel_connector *connector) 535 { 536 struct drm_device *dev = connector->base.dev; 537 struct intel_panel *panel = &connector->panel; 538 struct drm_i915_private *dev_priv = dev->dev_private; 539 540 return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller)); 541 } 542 543 static u32 pwm_get_backlight(struct intel_connector *connector) 544 { 545 struct intel_panel *panel = &connector->panel; 546 int duty_ns; 547 548 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm); 549 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS); 550 } 551 552 #if 0 553 static u32 intel_panel_get_backlight(struct intel_connector *connector) 554 { 555 struct drm_device *dev = connector->base.dev; 556 struct drm_i915_private *dev_priv = dev->dev_private; 557 struct intel_panel *panel = &connector->panel; 558 u32 val = 0; 559 560 mutex_lock(&dev_priv->backlight_lock); 561 562 if (panel->backlight.enabled) { 563 val = panel->backlight.get(connector); 564 val = intel_panel_compute_brightness(connector, val); 565 } 566 567 mutex_unlock(&dev_priv->backlight_lock); 568 569 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); 570 return val; 571 } 572 #endif 573 574 static void lpt_set_backlight(struct intel_connector *connector, u32 level) 575 { 576 struct drm_device *dev = connector->base.dev; 577 struct drm_i915_private *dev_priv = dev->dev_private; 578 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; 579 I915_WRITE(BLC_PWM_PCH_CTL2, val | level); 580 } 581 582 static void pch_set_backlight(struct intel_connector *connector, u32 level) 583 { 584 struct drm_device *dev = connector->base.dev; 585 struct drm_i915_private *dev_priv = dev->dev_private; 586 u32 tmp; 587 588 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; 589 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level); 590 } 591 592 static void i9xx_set_backlight(struct intel_connector *connector, u32 level) 593 { 594 struct drm_device *dev = connector->base.dev; 595 struct drm_i915_private *dev_priv = dev->dev_private; 596 struct intel_panel *panel = &connector->panel; 597 u32 tmp, mask; 598 599 WARN_ON(panel->backlight.max == 0); 600 601 if (panel->backlight.combination_mode) { 602 u8 lbpc; 603 604 lbpc = level * 0xfe / panel->backlight.max + 1; 605 level /= lbpc; 606 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc); 607 } 608 609 if (IS_GEN4(dev)) { 610 mask = BACKLIGHT_DUTY_CYCLE_MASK; 611 } else { 612 level <<= 1; 613 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; 614 } 615 616 tmp = I915_READ(BLC_PWM_CTL) & ~mask; 617 I915_WRITE(BLC_PWM_CTL, tmp | level); 618 } 619 620 static void vlv_set_backlight(struct intel_connector *connector, u32 level) 621 { 622 struct drm_device *dev = connector->base.dev; 623 struct drm_i915_private *dev_priv = dev->dev_private; 624 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 625 u32 tmp; 626 627 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) 628 return; 629 630 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; 631 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level); 632 } 633 634 static void bxt_set_backlight(struct intel_connector *connector, u32 level) 635 { 636 struct drm_device *dev = connector->base.dev; 637 struct drm_i915_private *dev_priv = dev->dev_private; 638 struct intel_panel *panel = &connector->panel; 639 640 I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level); 641 } 642 643 static void pwm_set_backlight(struct intel_connector *connector, u32 level) 644 { 645 struct intel_panel *panel = &connector->panel; 646 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100); 647 648 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS); 649 } 650 651 static void 652 intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level) 653 { 654 struct intel_panel *panel = &connector->panel; 655 656 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level); 657 658 level = intel_panel_compute_brightness(connector, level); 659 panel->backlight.set(connector, level); 660 } 661 662 /* set backlight brightness to level in range [0..max], scaling wrt hw min */ 663 static void intel_panel_set_backlight(struct intel_connector *connector, 664 u32 user_level, u32 user_max) 665 { 666 struct drm_device *dev = connector->base.dev; 667 struct drm_i915_private *dev_priv = dev->dev_private; 668 struct intel_panel *panel = &connector->panel; 669 u32 hw_level; 670 671 if (!panel->backlight.present) 672 return; 673 674 mutex_lock(&dev_priv->backlight_lock); 675 676 WARN_ON(panel->backlight.max == 0); 677 678 hw_level = scale_user_to_hw(connector, user_level, user_max); 679 panel->backlight.level = hw_level; 680 681 if (panel->backlight.enabled) 682 intel_panel_actually_set_backlight(connector, hw_level); 683 684 mutex_unlock(&dev_priv->backlight_lock); 685 } 686 687 /* set backlight brightness to level in range [0..max], assuming hw min is 688 * respected. 689 */ 690 void intel_panel_set_backlight_acpi(struct intel_connector *connector, 691 u32 user_level, u32 user_max) 692 { 693 struct drm_device *dev = connector->base.dev; 694 struct drm_i915_private *dev_priv = dev->dev_private; 695 struct intel_panel *panel = &connector->panel; 696 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 697 u32 hw_level; 698 699 /* 700 * INVALID_PIPE may occur during driver init because 701 * connection_mutex isn't held across the entire backlight 702 * setup + modeset readout, and the BIOS can issue the 703 * requests at any time. 704 */ 705 if (!panel->backlight.present || pipe == INVALID_PIPE) 706 return; 707 708 mutex_lock(&dev_priv->backlight_lock); 709 710 WARN_ON(panel->backlight.max == 0); 711 712 hw_level = clamp_user_to_hw(connector, user_level, user_max); 713 panel->backlight.level = hw_level; 714 715 if (panel->backlight.device) 716 panel->backlight.device->props.brightness = 717 scale_hw_to_user(connector, 718 panel->backlight.level, 719 panel->backlight.device->props.max_brightness); 720 721 if (panel->backlight.enabled) 722 intel_panel_actually_set_backlight(connector, hw_level); 723 724 mutex_unlock(&dev_priv->backlight_lock); 725 } 726 727 static void lpt_disable_backlight(struct intel_connector *connector) 728 { 729 struct drm_device *dev = connector->base.dev; 730 struct drm_i915_private *dev_priv = dev->dev_private; 731 u32 tmp; 732 733 intel_panel_actually_set_backlight(connector, 0); 734 735 /* 736 * Although we don't support or enable CPU PWM with LPT/SPT based 737 * systems, it may have been enabled prior to loading the 738 * driver. Disable to avoid warnings on LCPLL disable. 739 * 740 * This needs rework if we need to add support for CPU PWM on PCH split 741 * platforms. 742 */ 743 tmp = I915_READ(BLC_PWM_CPU_CTL2); 744 if (tmp & BLM_PWM_ENABLE) { 745 DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n"); 746 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); 747 } 748 749 tmp = I915_READ(BLC_PWM_PCH_CTL1); 750 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 751 } 752 753 static void pch_disable_backlight(struct intel_connector *connector) 754 { 755 struct drm_device *dev = connector->base.dev; 756 struct drm_i915_private *dev_priv = dev->dev_private; 757 u32 tmp; 758 759 intel_panel_actually_set_backlight(connector, 0); 760 761 tmp = I915_READ(BLC_PWM_CPU_CTL2); 762 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); 763 764 tmp = I915_READ(BLC_PWM_PCH_CTL1); 765 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 766 } 767 768 static void i9xx_disable_backlight(struct intel_connector *connector) 769 { 770 intel_panel_actually_set_backlight(connector, 0); 771 } 772 773 static void i965_disable_backlight(struct intel_connector *connector) 774 { 775 struct drm_device *dev = connector->base.dev; 776 struct drm_i915_private *dev_priv = dev->dev_private; 777 u32 tmp; 778 779 intel_panel_actually_set_backlight(connector, 0); 780 781 tmp = I915_READ(BLC_PWM_CTL2); 782 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); 783 } 784 785 static void vlv_disable_backlight(struct intel_connector *connector) 786 { 787 struct drm_device *dev = connector->base.dev; 788 struct drm_i915_private *dev_priv = dev->dev_private; 789 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 790 u32 tmp; 791 792 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) 793 return; 794 795 intel_panel_actually_set_backlight(connector, 0); 796 797 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe)); 798 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE); 799 } 800 801 static void bxt_disable_backlight(struct intel_connector *connector) 802 { 803 struct drm_device *dev = connector->base.dev; 804 struct drm_i915_private *dev_priv = dev->dev_private; 805 struct intel_panel *panel = &connector->panel; 806 u32 tmp, val; 807 808 intel_panel_actually_set_backlight(connector, 0); 809 810 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 811 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 812 tmp & ~BXT_BLC_PWM_ENABLE); 813 814 if (panel->backlight.controller == 1) { 815 val = I915_READ(UTIL_PIN_CTL); 816 val &= ~UTIL_PIN_ENABLE; 817 I915_WRITE(UTIL_PIN_CTL, val); 818 } 819 } 820 821 static void pwm_disable_backlight(struct intel_connector *connector) 822 { 823 struct intel_panel *panel = &connector->panel; 824 825 /* Disable the backlight */ 826 pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS); 827 usleep_range(2000, 3000); 828 pwm_disable(panel->backlight.pwm); 829 } 830 831 void intel_panel_disable_backlight(struct intel_connector *connector) 832 { 833 struct drm_device *dev = connector->base.dev; 834 struct drm_i915_private *dev_priv = dev->dev_private; 835 struct intel_panel *panel = &connector->panel; 836 837 if (!panel->backlight.present) 838 return; 839 840 /* 841 * Do not disable backlight on the vga_switcheroo path. When switching 842 * away from i915, the other client may depend on i915 to handle the 843 * backlight. This will leave the backlight on unnecessarily when 844 * another client is not activated. 845 */ 846 if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) { 847 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n"); 848 return; 849 } 850 851 mutex_lock(&dev_priv->backlight_lock); 852 853 if (panel->backlight.device) 854 panel->backlight.device->props.power = FB_BLANK_POWERDOWN; 855 panel->backlight.enabled = false; 856 panel->backlight.disable(connector); 857 858 mutex_unlock(&dev_priv->backlight_lock); 859 } 860 861 static void lpt_enable_backlight(struct intel_connector *connector) 862 { 863 struct drm_device *dev = connector->base.dev; 864 struct drm_i915_private *dev_priv = dev->dev_private; 865 struct intel_panel *panel = &connector->panel; 866 u32 pch_ctl1, pch_ctl2; 867 868 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 869 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 870 DRM_DEBUG_KMS("pch backlight already enabled\n"); 871 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 872 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); 873 } 874 875 pch_ctl2 = panel->backlight.max << 16; 876 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); 877 878 pch_ctl1 = 0; 879 if (panel->backlight.active_low_pwm) 880 pch_ctl1 |= BLM_PCH_POLARITY; 881 882 /* After LPT, override is the default. */ 883 if (HAS_PCH_LPT(dev_priv)) 884 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE; 885 886 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); 887 POSTING_READ(BLC_PWM_PCH_CTL1); 888 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); 889 890 /* This won't stick until the above enable. */ 891 intel_panel_actually_set_backlight(connector, panel->backlight.level); 892 } 893 894 static void pch_enable_backlight(struct intel_connector *connector) 895 { 896 struct drm_device *dev = connector->base.dev; 897 struct drm_i915_private *dev_priv = dev->dev_private; 898 struct intel_panel *panel = &connector->panel; 899 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 900 enum transcoder cpu_transcoder = 901 intel_pipe_to_cpu_transcoder(dev_priv, pipe); 902 u32 cpu_ctl2, pch_ctl1, pch_ctl2; 903 904 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); 905 if (cpu_ctl2 & BLM_PWM_ENABLE) { 906 DRM_DEBUG_KMS("cpu backlight already enabled\n"); 907 cpu_ctl2 &= ~BLM_PWM_ENABLE; 908 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); 909 } 910 911 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 912 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 913 DRM_DEBUG_KMS("pch backlight already enabled\n"); 914 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 915 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); 916 } 917 918 if (cpu_transcoder == TRANSCODER_EDP) 919 cpu_ctl2 = BLM_TRANSCODER_EDP; 920 else 921 cpu_ctl2 = BLM_PIPE(cpu_transcoder); 922 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); 923 POSTING_READ(BLC_PWM_CPU_CTL2); 924 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); 925 926 /* This won't stick until the above enable. */ 927 intel_panel_actually_set_backlight(connector, panel->backlight.level); 928 929 pch_ctl2 = panel->backlight.max << 16; 930 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); 931 932 pch_ctl1 = 0; 933 if (panel->backlight.active_low_pwm) 934 pch_ctl1 |= BLM_PCH_POLARITY; 935 936 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); 937 POSTING_READ(BLC_PWM_PCH_CTL1); 938 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); 939 } 940 941 static void i9xx_enable_backlight(struct intel_connector *connector) 942 { 943 struct drm_device *dev = connector->base.dev; 944 struct drm_i915_private *dev_priv = dev->dev_private; 945 struct intel_panel *panel = &connector->panel; 946 u32 ctl, freq; 947 948 ctl = I915_READ(BLC_PWM_CTL); 949 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { 950 DRM_DEBUG_KMS("backlight already enabled\n"); 951 I915_WRITE(BLC_PWM_CTL, 0); 952 } 953 954 freq = panel->backlight.max; 955 if (panel->backlight.combination_mode) 956 freq /= 0xff; 957 958 ctl = freq << 17; 959 if (panel->backlight.combination_mode) 960 ctl |= BLM_LEGACY_MODE; 961 if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm) 962 ctl |= BLM_POLARITY_PNV; 963 964 I915_WRITE(BLC_PWM_CTL, ctl); 965 POSTING_READ(BLC_PWM_CTL); 966 967 /* XXX: combine this into above write? */ 968 intel_panel_actually_set_backlight(connector, panel->backlight.level); 969 970 /* 971 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is 972 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2 973 * that has backlight. 974 */ 975 if (IS_GEN2(dev)) 976 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE); 977 } 978 979 static void i965_enable_backlight(struct intel_connector *connector) 980 { 981 struct drm_device *dev = connector->base.dev; 982 struct drm_i915_private *dev_priv = dev->dev_private; 983 struct intel_panel *panel = &connector->panel; 984 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 985 u32 ctl, ctl2, freq; 986 987 ctl2 = I915_READ(BLC_PWM_CTL2); 988 if (ctl2 & BLM_PWM_ENABLE) { 989 DRM_DEBUG_KMS("backlight already enabled\n"); 990 ctl2 &= ~BLM_PWM_ENABLE; 991 I915_WRITE(BLC_PWM_CTL2, ctl2); 992 } 993 994 freq = panel->backlight.max; 995 if (panel->backlight.combination_mode) 996 freq /= 0xff; 997 998 ctl = freq << 16; 999 I915_WRITE(BLC_PWM_CTL, ctl); 1000 1001 ctl2 = BLM_PIPE(pipe); 1002 if (panel->backlight.combination_mode) 1003 ctl2 |= BLM_COMBINATION_MODE; 1004 if (panel->backlight.active_low_pwm) 1005 ctl2 |= BLM_POLARITY_I965; 1006 I915_WRITE(BLC_PWM_CTL2, ctl2); 1007 POSTING_READ(BLC_PWM_CTL2); 1008 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); 1009 1010 intel_panel_actually_set_backlight(connector, panel->backlight.level); 1011 } 1012 1013 static void vlv_enable_backlight(struct intel_connector *connector) 1014 { 1015 struct drm_device *dev = connector->base.dev; 1016 struct drm_i915_private *dev_priv = dev->dev_private; 1017 struct intel_panel *panel = &connector->panel; 1018 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 1019 u32 ctl, ctl2; 1020 1021 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) 1022 return; 1023 1024 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); 1025 if (ctl2 & BLM_PWM_ENABLE) { 1026 DRM_DEBUG_KMS("backlight already enabled\n"); 1027 ctl2 &= ~BLM_PWM_ENABLE; 1028 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); 1029 } 1030 1031 ctl = panel->backlight.max << 16; 1032 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl); 1033 1034 /* XXX: combine this into above write? */ 1035 intel_panel_actually_set_backlight(connector, panel->backlight.level); 1036 1037 ctl2 = 0; 1038 if (panel->backlight.active_low_pwm) 1039 ctl2 |= BLM_POLARITY_I965; 1040 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); 1041 POSTING_READ(VLV_BLC_PWM_CTL2(pipe)); 1042 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE); 1043 } 1044 1045 static void bxt_enable_backlight(struct intel_connector *connector) 1046 { 1047 struct drm_device *dev = connector->base.dev; 1048 struct drm_i915_private *dev_priv = dev->dev_private; 1049 struct intel_panel *panel = &connector->panel; 1050 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 1051 u32 pwm_ctl, val; 1052 1053 /* To use 2nd set of backlight registers, utility pin has to be 1054 * enabled with PWM mode. 1055 * The field should only be changed when the utility pin is disabled 1056 */ 1057 if (panel->backlight.controller == 1) { 1058 val = I915_READ(UTIL_PIN_CTL); 1059 if (val & UTIL_PIN_ENABLE) { 1060 DRM_DEBUG_KMS("util pin already enabled\n"); 1061 val &= ~UTIL_PIN_ENABLE; 1062 I915_WRITE(UTIL_PIN_CTL, val); 1063 } 1064 1065 val = 0; 1066 if (panel->backlight.util_pin_active_low) 1067 val |= UTIL_PIN_POLARITY; 1068 I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) | 1069 UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE); 1070 } 1071 1072 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1073 if (pwm_ctl & BXT_BLC_PWM_ENABLE) { 1074 DRM_DEBUG_KMS("backlight already enabled\n"); 1075 pwm_ctl &= ~BXT_BLC_PWM_ENABLE; 1076 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 1077 pwm_ctl); 1078 } 1079 1080 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller), 1081 panel->backlight.max); 1082 1083 intel_panel_actually_set_backlight(connector, panel->backlight.level); 1084 1085 pwm_ctl = 0; 1086 if (panel->backlight.active_low_pwm) 1087 pwm_ctl |= BXT_BLC_PWM_POLARITY; 1088 1089 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl); 1090 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1091 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 1092 pwm_ctl | BXT_BLC_PWM_ENABLE); 1093 } 1094 1095 static void pwm_enable_backlight(struct intel_connector *connector) 1096 { 1097 struct intel_panel *panel = &connector->panel; 1098 1099 pwm_enable(panel->backlight.pwm); 1100 intel_panel_actually_set_backlight(connector, panel->backlight.level); 1101 } 1102 1103 void intel_panel_enable_backlight(struct intel_connector *connector) 1104 { 1105 struct drm_device *dev = connector->base.dev; 1106 struct drm_i915_private *dev_priv = dev->dev_private; 1107 struct intel_panel *panel = &connector->panel; 1108 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 1109 1110 if (!panel->backlight.present) 1111 return; 1112 1113 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe)); 1114 1115 mutex_lock(&dev_priv->backlight_lock); 1116 1117 WARN_ON(panel->backlight.max == 0); 1118 1119 if (panel->backlight.level <= panel->backlight.min) { 1120 panel->backlight.level = panel->backlight.max; 1121 if (panel->backlight.device) 1122 panel->backlight.device->props.brightness = 1123 scale_hw_to_user(connector, 1124 panel->backlight.level, 1125 panel->backlight.device->props.max_brightness); 1126 } 1127 1128 panel->backlight.enable(connector); 1129 panel->backlight.enabled = true; 1130 if (panel->backlight.device) 1131 panel->backlight.device->props.power = FB_BLANK_UNBLANK; 1132 1133 mutex_unlock(&dev_priv->backlight_lock); 1134 } 1135 1136 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) 1137 static int intel_backlight_device_update_status(struct backlight_device *bd) 1138 { 1139 #if 0 1140 struct intel_connector *connector = bl_get_data(bd); 1141 struct intel_panel *panel = &connector->panel; 1142 struct drm_device *dev = connector->base.dev; 1143 1144 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1145 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", 1146 bd->props.brightness, bd->props.max_brightness); 1147 intel_panel_set_backlight(connector, bd->props.brightness, 1148 bd->props.max_brightness); 1149 1150 /* 1151 * Allow flipping bl_power as a sub-state of enabled. Sadly the 1152 * backlight class device does not make it easy to to differentiate 1153 * between callbacks for brightness and bl_power, so our backlight_power 1154 * callback needs to take this into account. 1155 */ 1156 if (panel->backlight.enabled) { 1157 if (panel->backlight.power) { 1158 bool enable = bd->props.power == FB_BLANK_UNBLANK && 1159 bd->props.brightness != 0; 1160 panel->backlight.power(connector, enable); 1161 } 1162 } else { 1163 bd->props.power = FB_BLANK_POWERDOWN; 1164 } 1165 1166 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1167 #endif 1168 return 0; 1169 } 1170 1171 static int intel_backlight_device_get_brightness(struct backlight_device *bd) 1172 { 1173 #if 0 1174 struct intel_connector *connector = bl_get_data(bd); 1175 struct drm_device *dev = connector->base.dev; 1176 struct drm_i915_private *dev_priv = dev->dev_private; 1177 u32 hw_level; 1178 int ret; 1179 1180 intel_runtime_pm_get(dev_priv); 1181 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1182 1183 hw_level = intel_panel_get_backlight(connector); 1184 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness); 1185 1186 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1187 intel_runtime_pm_put(dev_priv); 1188 1189 return ret; 1190 #endif 1191 return 0; 1192 } 1193 1194 static const struct backlight_ops intel_backlight_device_ops = { 1195 .update_status = intel_backlight_device_update_status, 1196 .get_brightness = intel_backlight_device_get_brightness, 1197 }; 1198 1199 static int intel_backlight_device_register(struct intel_connector *connector) 1200 { 1201 struct intel_panel *panel = &connector->panel; 1202 struct backlight_properties props; 1203 1204 if (WARN_ON(panel->backlight.device)) 1205 return -ENODEV; 1206 1207 if (!panel->backlight.present) 1208 return 0; 1209 1210 WARN_ON(panel->backlight.max == 0); 1211 1212 memset(&props, 0, sizeof(props)); 1213 props.type = BACKLIGHT_RAW; 1214 1215 /* 1216 * Note: Everything should work even if the backlight device max 1217 * presented to the userspace is arbitrarily chosen. 1218 */ 1219 props.max_brightness = panel->backlight.max; 1220 props.brightness = scale_hw_to_user(connector, 1221 panel->backlight.level, 1222 props.max_brightness); 1223 1224 if (panel->backlight.enabled) 1225 props.power = FB_BLANK_UNBLANK; 1226 else 1227 props.power = FB_BLANK_POWERDOWN; 1228 1229 /* 1230 * Note: using the same name independent of the connector prevents 1231 * registration of multiple backlight devices in the driver. 1232 */ 1233 #if 0 1234 panel->backlight.device = 1235 backlight_device_register("intel_backlight", 1236 connector->base.kdev, 1237 connector, 1238 &intel_backlight_device_ops, &props); 1239 1240 if (IS_ERR(panel->backlight.device)) { 1241 DRM_ERROR("Failed to register backlight: %ld\n", 1242 PTR_ERR(panel->backlight.device)); 1243 panel->backlight.device = NULL; 1244 return -ENODEV; 1245 } 1246 1247 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n", 1248 connector->base.name); 1249 #endif 1250 1251 return 0; 1252 } 1253 1254 static void intel_backlight_device_unregister(struct intel_connector *connector) 1255 { 1256 #if 0 1257 struct intel_panel *panel = &connector->panel; 1258 1259 if (panel->backlight.device) { 1260 backlight_device_unregister(panel->backlight.device); 1261 panel->backlight.device = NULL; 1262 } 1263 #endif 1264 } 1265 #else /* CONFIG_BACKLIGHT_CLASS_DEVICE */ 1266 static int intel_backlight_device_register(struct intel_connector *connector) 1267 { 1268 return 0; 1269 } 1270 static void intel_backlight_device_unregister(struct intel_connector *connector) 1271 { 1272 } 1273 #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ 1274 1275 /* 1276 * SPT: This value represents the period of the PWM stream in clock periods 1277 * multiplied by 16 (default increment) or 128 (alternate increment selected in 1278 * SCHICKEN_1 bit 0). PWM clock is 24 MHz. 1279 */ 1280 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1281 { 1282 struct drm_device *dev = connector->base.dev; 1283 struct drm_i915_private *dev_priv = dev->dev_private; 1284 u32 mul, clock; 1285 1286 if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY) 1287 mul = 128; 1288 else 1289 mul = 16; 1290 1291 clock = MHz(24); 1292 1293 return clock / (pwm_freq_hz * mul); 1294 } 1295 1296 /* 1297 * LPT: This value represents the period of the PWM stream in clock periods 1298 * multiplied by 128 (default increment) or 16 (alternate increment, selected in 1299 * LPT SOUTH_CHICKEN2 register bit 5). 1300 */ 1301 static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1302 { 1303 struct drm_device *dev = connector->base.dev; 1304 struct drm_i915_private *dev_priv = dev->dev_private; 1305 u32 mul, clock; 1306 1307 if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY) 1308 mul = 16; 1309 else 1310 mul = 128; 1311 1312 if (dev_priv->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE) 1313 clock = MHz(135); /* LPT:H */ 1314 else 1315 clock = MHz(24); /* LPT:LP */ 1316 1317 return clock / (pwm_freq_hz * mul); 1318 } 1319 1320 /* 1321 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH 1322 * display raw clocks multiplied by 128. 1323 */ 1324 static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1325 { 1326 struct drm_device *dev = connector->base.dev; 1327 int clock = MHz(intel_pch_rawclk(dev)); 1328 1329 return clock / (pwm_freq_hz * 128); 1330 } 1331 1332 /* 1333 * Gen2: This field determines the number of time base events (display core 1334 * clock frequency/32) in total for a complete cycle of modulated backlight 1335 * control. 1336 * 1337 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock) 1338 * divided by 32. 1339 */ 1340 static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1341 { 1342 struct drm_device *dev = connector->base.dev; 1343 struct drm_i915_private *dev_priv = dev->dev_private; 1344 int clock; 1345 1346 if (IS_PINEVIEW(dev)) 1347 clock = intel_hrawclk(dev); 1348 else 1349 clock = 1000 * dev_priv->display.get_display_clock_speed(dev); 1350 1351 return clock / (pwm_freq_hz * 32); 1352 } 1353 1354 /* 1355 * Gen4: This value represents the period of the PWM stream in display core 1356 * clocks multiplied by 128. 1357 */ 1358 static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1359 { 1360 struct drm_device *dev = connector->base.dev; 1361 struct drm_i915_private *dev_priv = dev->dev_private; 1362 int clock = 1000 * dev_priv->display.get_display_clock_speed(dev); 1363 1364 return clock / (pwm_freq_hz * 128); 1365 } 1366 1367 /* 1368 * VLV: This value represents the period of the PWM stream in display core 1369 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks 1370 * multiplied by 16. CHV uses a 19.2MHz S0IX clock. 1371 */ 1372 static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1373 { 1374 struct drm_device *dev = connector->base.dev; 1375 struct drm_i915_private *dev_priv = dev->dev_private; 1376 int clock; 1377 1378 if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) { 1379 if (IS_CHERRYVIEW(dev)) 1380 return KHz(19200) / (pwm_freq_hz * 16); 1381 else 1382 return MHz(25) / (pwm_freq_hz * 16); 1383 } else { 1384 clock = intel_hrawclk(dev); 1385 return MHz(clock) / (pwm_freq_hz * 128); 1386 } 1387 } 1388 1389 static u32 get_backlight_max_vbt(struct intel_connector *connector) 1390 { 1391 struct drm_device *dev = connector->base.dev; 1392 struct drm_i915_private *dev_priv = dev->dev_private; 1393 struct intel_panel *panel = &connector->panel; 1394 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz; 1395 u32 pwm; 1396 1397 if (!pwm_freq_hz) { 1398 DRM_DEBUG_KMS("backlight frequency not specified in VBT\n"); 1399 return 0; 1400 } 1401 1402 if (!panel->backlight.hz_to_pwm) { 1403 DRM_DEBUG_KMS("backlight frequency setting from VBT currently not supported on this platform\n"); 1404 return 0; 1405 } 1406 1407 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz); 1408 if (!pwm) { 1409 DRM_DEBUG_KMS("backlight frequency conversion failed\n"); 1410 return 0; 1411 } 1412 1413 DRM_DEBUG_KMS("backlight frequency %u Hz from VBT\n", pwm_freq_hz); 1414 1415 return pwm; 1416 } 1417 1418 /* 1419 * Note: The setup hooks can't assume pipe is set! 1420 */ 1421 static u32 get_backlight_min_vbt(struct intel_connector *connector) 1422 { 1423 struct drm_device *dev = connector->base.dev; 1424 struct drm_i915_private *dev_priv = dev->dev_private; 1425 struct intel_panel *panel = &connector->panel; 1426 int min; 1427 1428 WARN_ON(panel->backlight.max == 0); 1429 1430 /* 1431 * XXX: If the vbt value is 255, it makes min equal to max, which leads 1432 * to problems. There are such machines out there. Either our 1433 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard 1434 * against this by letting the minimum be at most (arbitrarily chosen) 1435 * 25% of the max. 1436 */ 1437 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64); 1438 if (min != dev_priv->vbt.backlight.min_brightness) { 1439 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n", 1440 dev_priv->vbt.backlight.min_brightness, min); 1441 } 1442 1443 /* vbt value is a coefficient in range [0..255] */ 1444 return scale(min, 0, 255, 0, panel->backlight.max); 1445 } 1446 1447 static int lpt_setup_backlight(struct intel_connector *connector, enum i915_pipe unused) 1448 { 1449 struct drm_device *dev = connector->base.dev; 1450 struct drm_i915_private *dev_priv = dev->dev_private; 1451 struct intel_panel *panel = &connector->panel; 1452 u32 pch_ctl1, pch_ctl2, val; 1453 1454 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 1455 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1456 1457 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); 1458 panel->backlight.max = pch_ctl2 >> 16; 1459 1460 if (!panel->backlight.max) 1461 panel->backlight.max = get_backlight_max_vbt(connector); 1462 1463 if (!panel->backlight.max) 1464 return -ENODEV; 1465 1466 panel->backlight.min = get_backlight_min_vbt(connector); 1467 1468 val = lpt_get_backlight(connector); 1469 panel->backlight.level = intel_panel_compute_brightness(connector, val); 1470 1471 panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) && 1472 panel->backlight.level != 0; 1473 1474 return 0; 1475 } 1476 1477 static int pch_setup_backlight(struct intel_connector *connector, enum i915_pipe unused) 1478 { 1479 struct drm_device *dev = connector->base.dev; 1480 struct drm_i915_private *dev_priv = dev->dev_private; 1481 struct intel_panel *panel = &connector->panel; 1482 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; 1483 1484 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 1485 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1486 1487 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); 1488 panel->backlight.max = pch_ctl2 >> 16; 1489 1490 if (!panel->backlight.max) 1491 panel->backlight.max = get_backlight_max_vbt(connector); 1492 1493 if (!panel->backlight.max) 1494 return -ENODEV; 1495 1496 panel->backlight.min = get_backlight_min_vbt(connector); 1497 1498 val = pch_get_backlight(connector); 1499 panel->backlight.level = intel_panel_compute_brightness(connector, val); 1500 1501 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); 1502 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && 1503 (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0; 1504 1505 return 0; 1506 } 1507 1508 static int i9xx_setup_backlight(struct intel_connector *connector, enum i915_pipe unused) 1509 { 1510 struct drm_device *dev = connector->base.dev; 1511 struct drm_i915_private *dev_priv = dev->dev_private; 1512 struct intel_panel *panel = &connector->panel; 1513 u32 ctl, val; 1514 1515 ctl = I915_READ(BLC_PWM_CTL); 1516 1517 if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev)) 1518 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; 1519 1520 if (IS_PINEVIEW(dev)) 1521 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; 1522 1523 panel->backlight.max = ctl >> 17; 1524 1525 if (!panel->backlight.max) { 1526 panel->backlight.max = get_backlight_max_vbt(connector); 1527 panel->backlight.max >>= 1; 1528 } 1529 1530 if (!panel->backlight.max) 1531 return -ENODEV; 1532 1533 if (panel->backlight.combination_mode) 1534 panel->backlight.max *= 0xff; 1535 1536 panel->backlight.min = get_backlight_min_vbt(connector); 1537 1538 val = i9xx_get_backlight(connector); 1539 panel->backlight.level = intel_panel_compute_brightness(connector, val); 1540 1541 panel->backlight.enabled = panel->backlight.level != 0; 1542 1543 return 0; 1544 } 1545 1546 static int i965_setup_backlight(struct intel_connector *connector, enum i915_pipe unused) 1547 { 1548 struct drm_device *dev = connector->base.dev; 1549 struct drm_i915_private *dev_priv = dev->dev_private; 1550 struct intel_panel *panel = &connector->panel; 1551 u32 ctl, ctl2, val; 1552 1553 ctl2 = I915_READ(BLC_PWM_CTL2); 1554 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; 1555 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1556 1557 ctl = I915_READ(BLC_PWM_CTL); 1558 panel->backlight.max = ctl >> 16; 1559 1560 if (!panel->backlight.max) 1561 panel->backlight.max = get_backlight_max_vbt(connector); 1562 1563 if (!panel->backlight.max) 1564 return -ENODEV; 1565 1566 if (panel->backlight.combination_mode) 1567 panel->backlight.max *= 0xff; 1568 1569 panel->backlight.min = get_backlight_min_vbt(connector); 1570 1571 val = i9xx_get_backlight(connector); 1572 panel->backlight.level = intel_panel_compute_brightness(connector, val); 1573 1574 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) && 1575 panel->backlight.level != 0; 1576 1577 return 0; 1578 } 1579 1580 static int vlv_setup_backlight(struct intel_connector *connector, enum i915_pipe pipe) 1581 { 1582 struct drm_device *dev = connector->base.dev; 1583 struct drm_i915_private *dev_priv = dev->dev_private; 1584 struct intel_panel *panel = &connector->panel; 1585 u32 ctl, ctl2, val; 1586 1587 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) 1588 return -ENODEV; 1589 1590 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); 1591 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1592 1593 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe)); 1594 panel->backlight.max = ctl >> 16; 1595 1596 if (!panel->backlight.max) 1597 panel->backlight.max = get_backlight_max_vbt(connector); 1598 1599 if (!panel->backlight.max) 1600 return -ENODEV; 1601 1602 panel->backlight.min = get_backlight_min_vbt(connector); 1603 1604 val = _vlv_get_backlight(dev, pipe); 1605 panel->backlight.level = intel_panel_compute_brightness(connector, val); 1606 1607 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) && 1608 panel->backlight.level != 0; 1609 1610 return 0; 1611 } 1612 1613 #ifdef __DragonFly__ 1614 /* 1615 * Read max backlight level 1616 */ 1617 static int 1618 sysctl_backlight_max(SYSCTL_HANDLER_ARGS) 1619 { 1620 int err, val; 1621 struct intel_connector *connector = arg1; 1622 struct drm_device *dev = connector->base.dev; 1623 struct drm_i915_private *dev_priv = dev->dev_private; 1624 struct intel_panel *panel = &connector->panel; 1625 1626 mutex_lock(&dev_priv->backlight_lock); 1627 val = panel->backlight.max; 1628 mutex_unlock(&dev_priv->backlight_lock); 1629 1630 err = sysctl_handle_int(oidp, &val, 0, req); 1631 return(err); 1632 } 1633 1634 /* 1635 * Read/write backlight level 1636 */ 1637 static int 1638 sysctl_backlight_handler(SYSCTL_HANDLER_ARGS) 1639 { 1640 struct intel_connector *connector = arg1; 1641 struct drm_device *dev = connector->base.dev; 1642 struct drm_i915_private *dev_priv = dev->dev_private; 1643 struct intel_panel *panel = &connector->panel; 1644 int err, val; 1645 u32 user_level, max_brightness; 1646 1647 mutex_lock(&dev_priv->backlight_lock); 1648 max_brightness = panel->backlight.max; 1649 user_level = scale_hw_to_user(connector, panel->backlight.level, 1650 max_brightness); 1651 mutex_unlock(&dev_priv->backlight_lock); 1652 1653 val = user_level; 1654 err = sysctl_handle_int(oidp, &val, 0, req); 1655 if (err != 0 || req->newptr == NULL) { 1656 return(err); 1657 } 1658 1659 if (val != user_level && val >= 0 && val <= max_brightness) { 1660 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1661 intel_panel_set_backlight(arg1, val, max_brightness); 1662 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1663 } 1664 1665 return(err); 1666 } 1667 #endif /* __DragonFly__ */ 1668 1669 static int 1670 bxt_setup_backlight(struct intel_connector *connector, enum i915_pipe unused) 1671 { 1672 struct drm_device *dev = connector->base.dev; 1673 struct drm_i915_private *dev_priv = dev->dev_private; 1674 struct intel_panel *panel = &connector->panel; 1675 u32 pwm_ctl, val; 1676 1677 /* 1678 * For BXT hard coding the Backlight controller to 0. 1679 * TODO : Read the controller value from VBT and generalize 1680 */ 1681 panel->backlight.controller = 0; 1682 1683 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1684 1685 /* Keeping the check if controller 1 is to be programmed. 1686 * This will come into affect once the VBT parsing 1687 * is fixed for controller selection, and controller 1 is used 1688 * for a prticular display configuration. 1689 */ 1690 if (panel->backlight.controller == 1) { 1691 val = I915_READ(UTIL_PIN_CTL); 1692 panel->backlight.util_pin_active_low = 1693 val & UTIL_PIN_POLARITY; 1694 } 1695 1696 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; 1697 panel->backlight.max = 1698 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller)); 1699 1700 if (!panel->backlight.max) 1701 panel->backlight.max = get_backlight_max_vbt(connector); 1702 1703 if (!panel->backlight.max) 1704 return -ENODEV; 1705 1706 val = bxt_get_backlight(connector); 1707 panel->backlight.level = intel_panel_compute_brightness(connector, val); 1708 1709 panel->backlight.enabled = (pwm_ctl & BXT_BLC_PWM_ENABLE) && 1710 panel->backlight.level != 0; 1711 1712 return 0; 1713 } 1714 1715 static int pwm_setup_backlight(struct intel_connector *connector, 1716 enum i915_pipe pipe) 1717 { 1718 struct drm_device *dev = connector->base.dev; 1719 struct intel_panel *panel = &connector->panel; 1720 int retval; 1721 1722 /* Get the PWM chip for backlight control */ 1723 panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight"); 1724 if (IS_ERR(panel->backlight.pwm)) { 1725 DRM_ERROR("Failed to own the pwm chip\n"); 1726 panel->backlight.pwm = NULL; 1727 return -ENODEV; 1728 } 1729 1730 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS, 1731 CRC_PMIC_PWM_PERIOD_NS); 1732 if (retval < 0) { 1733 DRM_ERROR("Failed to configure the pwm chip\n"); 1734 pwm_put(panel->backlight.pwm); 1735 panel->backlight.pwm = NULL; 1736 return retval; 1737 } 1738 1739 panel->backlight.min = 0; /* 0% */ 1740 panel->backlight.max = 100; /* 100% */ 1741 panel->backlight.level = DIV_ROUND_UP( 1742 pwm_get_duty_cycle(panel->backlight.pwm) * 100, 1743 CRC_PMIC_PWM_PERIOD_NS); 1744 panel->backlight.enabled = panel->backlight.level != 0; 1745 1746 return 0; 1747 } 1748 1749 int intel_panel_setup_backlight(struct drm_connector *connector, enum i915_pipe pipe) 1750 { 1751 struct drm_device *dev = connector->dev; 1752 struct drm_i915_private *dev_priv = dev->dev_private; 1753 struct intel_connector *intel_connector = to_intel_connector(connector); 1754 struct intel_panel *panel = &intel_connector->panel; 1755 int ret; 1756 1757 if (!dev_priv->vbt.backlight.present) { 1758 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) { 1759 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n"); 1760 } else { 1761 DRM_DEBUG_KMS("no backlight present per VBT\n"); 1762 return 0; 1763 } 1764 } 1765 1766 /* ensure intel_panel has been initialized first */ 1767 if (WARN_ON(!panel->backlight.setup)) 1768 return -ENODEV; 1769 1770 /* set level and max in panel struct */ 1771 mutex_lock(&dev_priv->backlight_lock); 1772 ret = panel->backlight.setup(intel_connector, pipe); 1773 mutex_unlock(&dev_priv->backlight_lock); 1774 1775 if (ret) { 1776 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n", 1777 connector->name); 1778 return ret; 1779 } 1780 1781 panel->backlight.present = true; 1782 1783 #ifdef __DragonFly__ 1784 SYSCTL_ADD_PROC(&connector->dev->sysctl->ctx, &sysctl__hw_children, 1785 OID_AUTO, "backlight_max", 1786 CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_ANYBODY, 1787 connector, sizeof(int), 1788 sysctl_backlight_max, 1789 "I", "Max backlight level"); 1790 SYSCTL_ADD_PROC(&connector->dev->sysctl->ctx, &sysctl__hw_children, 1791 OID_AUTO, "backlight_level", 1792 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_ANYBODY, 1793 connector, sizeof(int), 1794 sysctl_backlight_handler, 1795 "I", "Backlight level"); 1796 #endif 1797 1798 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n", 1799 connector->name, 1800 panel->backlight.enabled ? "enabled" : "disabled", 1801 panel->backlight.level, panel->backlight.max); 1802 1803 return 0; 1804 } 1805 1806 void intel_panel_destroy_backlight(struct drm_connector *connector) 1807 { 1808 struct intel_connector *intel_connector = to_intel_connector(connector); 1809 struct intel_panel *panel = &intel_connector->panel; 1810 1811 /* dispose of the pwm */ 1812 if (panel->backlight.pwm) 1813 pwm_put(panel->backlight.pwm); 1814 1815 panel->backlight.present = false; 1816 } 1817 1818 /* Set up chip specific backlight functions */ 1819 static void 1820 intel_panel_init_backlight_funcs(struct intel_panel *panel) 1821 { 1822 struct intel_connector *intel_connector = 1823 container_of(panel, struct intel_connector, panel); 1824 struct drm_device *dev = intel_connector->base.dev; 1825 struct drm_i915_private *dev_priv = dev->dev_private; 1826 1827 if (IS_BROXTON(dev)) { 1828 panel->backlight.setup = bxt_setup_backlight; 1829 panel->backlight.enable = bxt_enable_backlight; 1830 panel->backlight.disable = bxt_disable_backlight; 1831 panel->backlight.set = bxt_set_backlight; 1832 panel->backlight.get = bxt_get_backlight; 1833 } else if (HAS_PCH_LPT(dev) || HAS_PCH_SPT(dev)) { 1834 panel->backlight.setup = lpt_setup_backlight; 1835 panel->backlight.enable = lpt_enable_backlight; 1836 panel->backlight.disable = lpt_disable_backlight; 1837 panel->backlight.set = lpt_set_backlight; 1838 panel->backlight.get = lpt_get_backlight; 1839 if (HAS_PCH_LPT(dev)) 1840 panel->backlight.hz_to_pwm = lpt_hz_to_pwm; 1841 else 1842 panel->backlight.hz_to_pwm = spt_hz_to_pwm; 1843 } else if (HAS_PCH_SPLIT(dev)) { 1844 panel->backlight.setup = pch_setup_backlight; 1845 panel->backlight.enable = pch_enable_backlight; 1846 panel->backlight.disable = pch_disable_backlight; 1847 panel->backlight.set = pch_set_backlight; 1848 panel->backlight.get = pch_get_backlight; 1849 panel->backlight.hz_to_pwm = pch_hz_to_pwm; 1850 } else if (IS_VALLEYVIEW(dev)) { 1851 if (dev_priv->vbt.has_mipi) { 1852 panel->backlight.setup = pwm_setup_backlight; 1853 panel->backlight.enable = pwm_enable_backlight; 1854 panel->backlight.disable = pwm_disable_backlight; 1855 panel->backlight.set = pwm_set_backlight; 1856 panel->backlight.get = pwm_get_backlight; 1857 } else { 1858 panel->backlight.setup = vlv_setup_backlight; 1859 panel->backlight.enable = vlv_enable_backlight; 1860 panel->backlight.disable = vlv_disable_backlight; 1861 panel->backlight.set = vlv_set_backlight; 1862 panel->backlight.get = vlv_get_backlight; 1863 panel->backlight.hz_to_pwm = vlv_hz_to_pwm; 1864 } 1865 } else if (IS_GEN4(dev)) { 1866 panel->backlight.setup = i965_setup_backlight; 1867 panel->backlight.enable = i965_enable_backlight; 1868 panel->backlight.disable = i965_disable_backlight; 1869 panel->backlight.set = i9xx_set_backlight; 1870 panel->backlight.get = i9xx_get_backlight; 1871 panel->backlight.hz_to_pwm = i965_hz_to_pwm; 1872 } else { 1873 panel->backlight.setup = i9xx_setup_backlight; 1874 panel->backlight.enable = i9xx_enable_backlight; 1875 panel->backlight.disable = i9xx_disable_backlight; 1876 panel->backlight.set = i9xx_set_backlight; 1877 panel->backlight.get = i9xx_get_backlight; 1878 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm; 1879 } 1880 } 1881 1882 int intel_panel_init(struct intel_panel *panel, 1883 struct drm_display_mode *fixed_mode, 1884 struct drm_display_mode *downclock_mode) 1885 { 1886 intel_panel_init_backlight_funcs(panel); 1887 1888 panel->fixed_mode = fixed_mode; 1889 panel->downclock_mode = downclock_mode; 1890 1891 return 0; 1892 } 1893 1894 void intel_panel_fini(struct intel_panel *panel) 1895 { 1896 struct intel_connector *intel_connector = 1897 container_of(panel, struct intel_connector, panel); 1898 1899 if (panel->fixed_mode) 1900 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode); 1901 1902 if (panel->downclock_mode) 1903 drm_mode_destroy(intel_connector->base.dev, 1904 panel->downclock_mode); 1905 } 1906 1907 void intel_backlight_register(struct drm_device *dev) 1908 { 1909 struct intel_connector *connector; 1910 1911 list_for_each_entry(connector, &dev->mode_config.connector_list, base.head) 1912 intel_backlight_device_register(connector); 1913 } 1914 1915 void intel_backlight_unregister(struct drm_device *dev) 1916 { 1917 struct intel_connector *connector; 1918 1919 list_for_each_entry(connector, &dev->mode_config.connector_list, base.head) 1920 intel_backlight_device_unregister(connector); 1921 } 1922