1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Eric Anholt <eric@anholt.net> 27 * 28 * $FreeBSD: head/sys/dev/drm2/i915/intel_sdvo.c 249041 2013-04-03 08:27:35Z dumbbell $ 29 */ 30 31 #include <drm/drmP.h> 32 #include <drm/drm_crtc.h> 33 #include <drm/drm_edid.h> 34 #include "intel_drv.h" 35 #include <drm/i915_drm.h> 36 #include "i915_drv.h" 37 #include "intel_sdvo_regs.h" 38 39 #include <bus/iicbus/iic.h> 40 #include <bus/iicbus/iiconf.h> 41 #include "iicbus_if.h" 42 43 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) 44 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) 45 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) 46 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0) 47 48 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ 49 SDVO_TV_MASK) 50 51 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) 52 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) 53 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) 54 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) 55 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) 56 57 58 static const char *tv_format_names[] = { 59 "NTSC_M" , "NTSC_J" , "NTSC_443", 60 "PAL_B" , "PAL_D" , "PAL_G" , 61 "PAL_H" , "PAL_I" , "PAL_M" , 62 "PAL_N" , "PAL_NC" , "PAL_60" , 63 "SECAM_B" , "SECAM_D" , "SECAM_G" , 64 "SECAM_K" , "SECAM_K1", "SECAM_L" , 65 "SECAM_60" 66 }; 67 68 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) 69 70 struct intel_sdvo { 71 struct intel_encoder base; 72 73 device_t i2c; 74 u8 slave_addr; 75 76 device_t ddc_iic_bus, ddc; 77 78 /* Register for the SDVO device: SDVOB or SDVOC */ 79 int sdvo_reg; 80 81 /* Active outputs controlled by this SDVO output */ 82 uint16_t controlled_output; 83 84 /* 85 * Capabilities of the SDVO device returned by 86 * i830_sdvo_get_capabilities() 87 */ 88 struct intel_sdvo_caps caps; 89 90 /* Pixel clock limitations reported by the SDVO device, in kHz */ 91 int pixel_clock_min, pixel_clock_max; 92 93 /* 94 * For multiple function SDVO device, 95 * this is for current attached outputs. 96 */ 97 uint16_t attached_output; 98 99 /* 100 * Hotplug activation bits for this device 101 */ 102 uint8_t hotplug_active[2]; 103 104 /** 105 * This is used to select the color range of RBG outputs in HDMI mode. 106 * It is only valid when using TMDS encoding and 8 bit per color mode. 107 */ 108 uint32_t color_range; 109 110 /** 111 * This is set if we're going to treat the device as TV-out. 112 * 113 * While we have these nice friendly flags for output types that ought 114 * to decide this for us, the S-Video output on our HDMI+S-Video card 115 * shows up as RGB1 (VGA). 116 */ 117 bool is_tv; 118 119 /* This is for current tv format name */ 120 int tv_format_index; 121 122 /** 123 * This is set if we treat the device as HDMI, instead of DVI. 124 */ 125 bool is_hdmi; 126 bool has_hdmi_monitor; 127 bool has_hdmi_audio; 128 129 /** 130 * This is set if we detect output of sdvo device as LVDS and 131 * have a valid fixed mode to use with the panel. 132 */ 133 bool is_lvds; 134 135 /** 136 * This is sdvo fixed pannel mode pointer 137 */ 138 struct drm_display_mode *sdvo_lvds_fixed_mode; 139 140 /* DDC bus used by this SDVO encoder */ 141 uint8_t ddc_bus; 142 143 /* Input timings for adjusted_mode */ 144 struct intel_sdvo_dtd input_dtd; 145 }; 146 147 struct intel_sdvo_connector { 148 struct intel_connector base; 149 150 /* Mark the type of connector */ 151 uint16_t output_flag; 152 153 enum hdmi_force_audio force_audio; 154 155 /* This contains all current supported TV format */ 156 u8 tv_format_supported[TV_FORMAT_NUM]; 157 int format_supported_num; 158 struct drm_property *tv_format; 159 160 /* add the property for the SDVO-TV */ 161 struct drm_property *left; 162 struct drm_property *right; 163 struct drm_property *top; 164 struct drm_property *bottom; 165 struct drm_property *hpos; 166 struct drm_property *vpos; 167 struct drm_property *contrast; 168 struct drm_property *saturation; 169 struct drm_property *hue; 170 struct drm_property *sharpness; 171 struct drm_property *flicker_filter; 172 struct drm_property *flicker_filter_adaptive; 173 struct drm_property *flicker_filter_2d; 174 struct drm_property *tv_chroma_filter; 175 struct drm_property *tv_luma_filter; 176 struct drm_property *dot_crawl; 177 178 /* add the property for the SDVO-TV/LVDS */ 179 struct drm_property *brightness; 180 181 /* Add variable to record current setting for the above property */ 182 u32 left_margin, right_margin, top_margin, bottom_margin; 183 184 /* this is to get the range of margin.*/ 185 u32 max_hscan, max_vscan; 186 u32 max_hpos, cur_hpos; 187 u32 max_vpos, cur_vpos; 188 u32 cur_brightness, max_brightness; 189 u32 cur_contrast, max_contrast; 190 u32 cur_saturation, max_saturation; 191 u32 cur_hue, max_hue; 192 u32 cur_sharpness, max_sharpness; 193 u32 cur_flicker_filter, max_flicker_filter; 194 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive; 195 u32 cur_flicker_filter_2d, max_flicker_filter_2d; 196 u32 cur_tv_chroma_filter, max_tv_chroma_filter; 197 u32 cur_tv_luma_filter, max_tv_luma_filter; 198 u32 cur_dot_crawl, max_dot_crawl; 199 }; 200 201 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder) 202 { 203 return container_of(encoder, struct intel_sdvo, base.base); 204 } 205 206 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) 207 { 208 return container_of(intel_attached_encoder(connector), 209 struct intel_sdvo, base); 210 } 211 212 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector) 213 { 214 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base); 215 } 216 217 static bool 218 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags); 219 static bool 220 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 221 struct intel_sdvo_connector *intel_sdvo_connector, 222 int type); 223 static bool 224 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 225 struct intel_sdvo_connector *intel_sdvo_connector); 226 227 /** 228 * Writes the SDVOB or SDVOC with the given value, but always writes both 229 * SDVOB and SDVOC to work around apparent hardware issues (according to 230 * comments in the BIOS). 231 */ 232 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) 233 { 234 struct drm_device *dev = intel_sdvo->base.base.dev; 235 struct drm_i915_private *dev_priv = dev->dev_private; 236 u32 bval = val, cval = val; 237 int i; 238 239 if (intel_sdvo->sdvo_reg == PCH_SDVOB) { 240 I915_WRITE(intel_sdvo->sdvo_reg, val); 241 I915_READ(intel_sdvo->sdvo_reg); 242 return; 243 } 244 245 if (intel_sdvo->sdvo_reg == SDVOB) { 246 cval = I915_READ(SDVOC); 247 } else { 248 bval = I915_READ(SDVOB); 249 } 250 /* 251 * Write the registers twice for luck. Sometimes, 252 * writing them only once doesn't appear to 'stick'. 253 * The BIOS does this too. Yay, magic 254 */ 255 for (i = 0; i < 2; i++) 256 { 257 I915_WRITE(SDVOB, bval); 258 I915_READ(SDVOB); 259 I915_WRITE(SDVOC, cval); 260 I915_READ(SDVOC); 261 } 262 } 263 264 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) 265 { 266 struct iic_msg msgs[] = { 267 { 268 .slave = intel_sdvo->slave_addr << 1, 269 .flags = 0, 270 .len = 1, 271 .buf = &addr, 272 }, 273 { 274 .slave = intel_sdvo->slave_addr << 1, 275 .flags = IIC_M_RD, 276 .len = 1, 277 .buf = ch, 278 } 279 }; 280 int ret; 281 282 if ((ret = iicbus_transfer(intel_sdvo->i2c, msgs, 2)) == 0) 283 return true; 284 285 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); 286 return false; 287 } 288 289 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} 290 /** Mapping of command numbers to names, for debug output */ 291 static const struct _sdvo_cmd_name { 292 u8 cmd; 293 const char *name; 294 } sdvo_cmd_names[] = { 295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), 296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), 297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), 298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), 299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), 300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), 301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), 302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), 303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), 304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), 305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), 306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), 307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), 308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), 309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), 310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), 311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), 312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), 314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), 316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), 317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), 318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), 319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), 320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), 321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), 322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), 323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), 324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), 325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), 326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), 327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), 328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), 329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), 330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), 331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), 332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), 333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), 334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), 335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), 336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), 337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), 338 339 /* Add the op code for SDVO enhancements */ 340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), 341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), 342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), 343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), 344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), 345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), 346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), 347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), 348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), 349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), 350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), 351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), 352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), 353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), 354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), 355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), 356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), 357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), 358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), 359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), 360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), 361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), 362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), 363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), 364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), 365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), 366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), 367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), 368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), 369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), 370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), 371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), 372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), 373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), 374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), 375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), 376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), 377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), 378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), 379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), 380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), 381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), 382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), 383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), 384 385 /* HDMI op code */ 386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), 387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), 388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), 389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), 390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), 391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), 392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), 393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), 394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), 395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), 396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), 397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), 398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), 399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), 400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), 401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), 402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), 403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), 404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), 405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), 406 }; 407 408 #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB) 409 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC") 410 411 static void 412 intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd, 413 const void *args, int args_len) 414 { 415 int i; 416 417 if ((drm_debug_flag & DRM_DEBUGBITS_KMS) == 0) 418 return; 419 DRM_DEBUG_KMS("%s: W: %02X ", SDVO_NAME(intel_sdvo), cmd); 420 for (i = 0; i < args_len; i++) 421 kprintf("%02X ", ((const u8 *)args)[i]); 422 for (; i < 8; i++) 423 kprintf(" "); 424 for (i = 0; i < DRM_ARRAY_SIZE(sdvo_cmd_names); i++) { 425 if (cmd == sdvo_cmd_names[i].cmd) { 426 kprintf("(%s)", sdvo_cmd_names[i].name); 427 break; 428 } 429 } 430 if (i == DRM_ARRAY_SIZE(sdvo_cmd_names)) 431 kprintf("(%02X)", cmd); 432 kprintf("\n"); 433 } 434 435 static const char *cmd_status_names[] = { 436 "Power on", 437 "Success", 438 "Not supported", 439 "Invalid arg", 440 "Pending", 441 "Target not specified", 442 "Scaling not supported" 443 }; 444 445 static bool 446 intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, const void *args, 447 int args_len) 448 { 449 u8 buf[args_len*2 + 2], status; 450 struct iic_msg msgs[args_len + 3]; 451 int i, ret; 452 453 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); 454 455 for (i = 0; i < args_len; i++) { 456 msgs[i].slave = intel_sdvo->slave_addr << 1; 457 msgs[i].flags = 0; 458 msgs[i].len = 2; 459 msgs[i].buf = buf + 2 *i; 460 buf[2*i + 0] = SDVO_I2C_ARG_0 - i; 461 buf[2*i + 1] = ((const u8*)args)[i]; 462 } 463 msgs[i].slave = intel_sdvo->slave_addr << 1; 464 msgs[i].flags = 0; 465 msgs[i].len = 2; 466 msgs[i].buf = buf + 2*i; 467 buf[2*i + 0] = SDVO_I2C_OPCODE; 468 buf[2*i + 1] = cmd; 469 470 /* the following two are to read the response */ 471 status = SDVO_I2C_CMD_STATUS; 472 msgs[i+1].slave = intel_sdvo->slave_addr << 1; 473 msgs[i+1].flags = 0; 474 msgs[i+1].len = 1; 475 msgs[i+1].buf = &status; 476 477 msgs[i+2].slave = intel_sdvo->slave_addr << 1; 478 msgs[i+2].flags = IIC_M_RD; 479 msgs[i+2].len = 1; 480 msgs[i+2].buf = &status; 481 482 ret = iicbus_transfer(intel_sdvo->i2c, msgs, i+3); 483 if (ret != 0) { 484 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); 485 return (false); 486 } 487 #if 0 488 if (ret != i+3) { 489 /* failure in I2C transfer */ 490 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); 491 return false; 492 } 493 #endif 494 495 return true; 496 } 497 498 static bool 499 intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, void *response, 500 int response_len) 501 { 502 u8 retry = 5; 503 u8 status; 504 int i; 505 506 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo)); 507 508 /* 509 * The documentation states that all commands will be 510 * processed within 15µs, and that we need only poll 511 * the status byte a maximum of 3 times in order for the 512 * command to be complete. 513 * 514 * Check 5 times in case the hardware failed to read the docs. 515 */ 516 if (!intel_sdvo_read_byte(intel_sdvo, SDVO_I2C_CMD_STATUS, &status)) 517 goto log_fail; 518 519 while (status == SDVO_CMD_STATUS_PENDING && retry--) { 520 DELAY(15); 521 if (!intel_sdvo_read_byte(intel_sdvo, 522 SDVO_I2C_CMD_STATUS, &status)) 523 goto log_fail; 524 } 525 526 if ((drm_debug_flag & DRM_DEBUGBITS_KMS) != 0) { 527 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) 528 kprintf("(%s)", cmd_status_names[status]); 529 else 530 kprintf("(??? %d)", status); 531 } 532 533 if (status != SDVO_CMD_STATUS_SUCCESS) 534 goto log_fail; 535 536 /* Read the command response */ 537 for (i = 0; i < response_len; i++) { 538 if (!intel_sdvo_read_byte(intel_sdvo, 539 SDVO_I2C_RETURN_0 + i, 540 &((u8 *)response)[i])) 541 goto log_fail; 542 if ((drm_debug_flag & DRM_DEBUGBITS_KMS) != 0) 543 kprintf(" %02X", ((u8 *)response)[i]); 544 } 545 if ((drm_debug_flag & DRM_DEBUGBITS_KMS) != 0) 546 kprintf("\n"); 547 return (true); 548 549 log_fail: 550 if ((drm_debug_flag & DRM_DEBUGBITS_KMS) != 0) 551 kprintf("... failed\n"); 552 return (false); 553 } 554 555 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) 556 { 557 if (mode->clock >= 100000) 558 return 1; 559 else if (mode->clock >= 50000) 560 return 2; 561 else 562 return 4; 563 } 564 565 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, 566 u8 ddc_bus) 567 { 568 /* This must be the immediately preceding write before the i2c xfer */ 569 return intel_sdvo_write_cmd(intel_sdvo, 570 SDVO_CMD_SET_CONTROL_BUS_SWITCH, 571 &ddc_bus, 1); 572 } 573 574 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) 575 { 576 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) 577 return false; 578 579 return intel_sdvo_read_response(intel_sdvo, NULL, 0); 580 } 581 582 static bool 583 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len) 584 { 585 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0)) 586 return false; 587 588 return intel_sdvo_read_response(intel_sdvo, value, len); 589 } 590 591 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo) 592 { 593 struct intel_sdvo_set_target_input_args targets = {0}; 594 return intel_sdvo_set_value(intel_sdvo, 595 SDVO_CMD_SET_TARGET_INPUT, 596 &targets, sizeof(targets)); 597 } 598 599 /** 600 * Return whether each input is trained. 601 * 602 * This function is making an assumption about the layout of the response, 603 * which should be checked against the docs. 604 */ 605 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2) 606 { 607 struct intel_sdvo_get_trained_inputs_response response; 608 609 CTASSERT(sizeof(response) == 1); 610 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, 611 &response, sizeof(response))) 612 return false; 613 614 *input_1 = response.input0_trained; 615 *input_2 = response.input1_trained; 616 return true; 617 } 618 619 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, 620 u16 outputs) 621 { 622 return intel_sdvo_set_value(intel_sdvo, 623 SDVO_CMD_SET_ACTIVE_OUTPUTS, 624 &outputs, sizeof(outputs)); 625 } 626 627 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, 628 int mode) 629 { 630 u8 state = SDVO_ENCODER_STATE_ON; 631 632 switch (mode) { 633 case DRM_MODE_DPMS_ON: 634 state = SDVO_ENCODER_STATE_ON; 635 break; 636 case DRM_MODE_DPMS_STANDBY: 637 state = SDVO_ENCODER_STATE_STANDBY; 638 break; 639 case DRM_MODE_DPMS_SUSPEND: 640 state = SDVO_ENCODER_STATE_SUSPEND; 641 break; 642 case DRM_MODE_DPMS_OFF: 643 state = SDVO_ENCODER_STATE_OFF; 644 break; 645 } 646 647 return intel_sdvo_set_value(intel_sdvo, 648 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); 649 } 650 651 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, 652 int *clock_min, 653 int *clock_max) 654 { 655 struct intel_sdvo_pixel_clock_range clocks; 656 657 CTASSERT(sizeof(clocks) == 4); 658 if (!intel_sdvo_get_value(intel_sdvo, 659 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, 660 &clocks, sizeof(clocks))) 661 return false; 662 663 /* Convert the values from units of 10 kHz to kHz. */ 664 *clock_min = clocks.min * 10; 665 *clock_max = clocks.max * 10; 666 return true; 667 } 668 669 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo, 670 u16 outputs) 671 { 672 return intel_sdvo_set_value(intel_sdvo, 673 SDVO_CMD_SET_TARGET_OUTPUT, 674 &outputs, sizeof(outputs)); 675 } 676 677 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd, 678 struct intel_sdvo_dtd *dtd) 679 { 680 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 681 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 682 } 683 684 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo, 685 struct intel_sdvo_dtd *dtd) 686 { 687 return intel_sdvo_set_timing(intel_sdvo, 688 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); 689 } 690 691 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo, 692 struct intel_sdvo_dtd *dtd) 693 { 694 return intel_sdvo_set_timing(intel_sdvo, 695 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); 696 } 697 698 static bool 699 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo, 700 uint16_t clock, 701 uint16_t width, 702 uint16_t height) 703 { 704 struct intel_sdvo_preferred_input_timing_args args; 705 706 memset(&args, 0, sizeof(args)); 707 args.clock = clock; 708 args.width = width; 709 args.height = height; 710 args.interlace = 0; 711 712 if (intel_sdvo->is_lvds && 713 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || 714 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) 715 args.scaled = 1; 716 717 return intel_sdvo_set_value(intel_sdvo, 718 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 719 &args, sizeof(args)); 720 } 721 722 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo, 723 struct intel_sdvo_dtd *dtd) 724 { 725 CTASSERT(sizeof(dtd->part1) == 8); 726 CTASSERT(sizeof(dtd->part2) == 8); 727 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, 728 &dtd->part1, sizeof(dtd->part1)) && 729 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, 730 &dtd->part2, sizeof(dtd->part2)); 731 } 732 733 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val) 734 { 735 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); 736 } 737 738 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, 739 const struct drm_display_mode *mode) 740 { 741 uint16_t width, height; 742 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; 743 uint16_t h_sync_offset, v_sync_offset; 744 int mode_clock; 745 746 width = mode->crtc_hdisplay; 747 height = mode->crtc_vdisplay; 748 749 /* do some mode translations */ 750 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start; 751 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; 752 753 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start; 754 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start; 755 756 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start; 757 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start; 758 759 mode_clock = mode->clock; 760 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1; 761 mode_clock /= 10; 762 dtd->part1.clock = mode_clock; 763 764 dtd->part1.h_active = width & 0xff; 765 dtd->part1.h_blank = h_blank_len & 0xff; 766 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | 767 ((h_blank_len >> 8) & 0xf); 768 dtd->part1.v_active = height & 0xff; 769 dtd->part1.v_blank = v_blank_len & 0xff; 770 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | 771 ((v_blank_len >> 8) & 0xf); 772 773 dtd->part2.h_sync_off = h_sync_offset & 0xff; 774 dtd->part2.h_sync_width = h_sync_len & 0xff; 775 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | 776 (v_sync_len & 0xf); 777 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | 778 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | 779 ((v_sync_len & 0x30) >> 4); 780 781 dtd->part2.dtd_flags = 0x18; 782 if (mode->flags & DRM_MODE_FLAG_PHSYNC) 783 dtd->part2.dtd_flags |= 0x2; 784 if (mode->flags & DRM_MODE_FLAG_PVSYNC) 785 dtd->part2.dtd_flags |= 0x4; 786 787 dtd->part2.sdvo_flags = 0; 788 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; 789 dtd->part2.reserved = 0; 790 } 791 792 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, 793 const struct intel_sdvo_dtd *dtd) 794 { 795 mode->hdisplay = dtd->part1.h_active; 796 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; 797 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; 798 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; 799 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; 800 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; 801 mode->htotal = mode->hdisplay + dtd->part1.h_blank; 802 mode->htotal += (dtd->part1.h_high & 0xf) << 8; 803 804 mode->vdisplay = dtd->part1.v_active; 805 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; 806 mode->vsync_start = mode->vdisplay; 807 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; 808 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; 809 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0; 810 mode->vsync_end = mode->vsync_start + 811 (dtd->part2.v_sync_off_width & 0xf); 812 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; 813 mode->vtotal = mode->vdisplay + dtd->part1.v_blank; 814 mode->vtotal += (dtd->part1.v_high & 0xf) << 8; 815 816 mode->clock = dtd->part1.clock * 10; 817 818 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); 819 if (dtd->part2.dtd_flags & 0x2) 820 mode->flags |= DRM_MODE_FLAG_PHSYNC; 821 if (dtd->part2.dtd_flags & 0x4) 822 mode->flags |= DRM_MODE_FLAG_PVSYNC; 823 } 824 825 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) 826 { 827 struct intel_sdvo_encode encode; 828 829 CTASSERT(sizeof(encode) == 2); 830 return intel_sdvo_get_value(intel_sdvo, 831 SDVO_CMD_GET_SUPP_ENCODE, 832 &encode, sizeof(encode)); 833 } 834 835 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo, 836 uint8_t mode) 837 { 838 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); 839 } 840 841 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo, 842 uint8_t mode) 843 { 844 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); 845 } 846 847 #if 0 848 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) 849 { 850 int i, j; 851 uint8_t set_buf_index[2]; 852 uint8_t av_split; 853 uint8_t buf_size; 854 uint8_t buf[48]; 855 uint8_t *pos; 856 857 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); 858 859 for (i = 0; i <= av_split; i++) { 860 set_buf_index[0] = i; set_buf_index[1] = 0; 861 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, 862 set_buf_index, 2); 863 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); 864 intel_sdvo_read_response(encoder, &buf_size, 1); 865 866 pos = buf; 867 for (j = 0; j <= buf_size; j += 8) { 868 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, 869 NULL, 0); 870 intel_sdvo_read_response(encoder, pos, 8); 871 pos += 8; 872 } 873 } 874 } 875 #endif 876 877 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) 878 { 879 struct dip_infoframe avi_if = { 880 .type = DIP_TYPE_AVI, 881 .ver = DIP_VERSION_AVI, 882 .len = DIP_LEN_AVI, 883 }; 884 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC; 885 uint8_t set_buf_index[2] = { 1, 0 }; 886 uint64_t *data = (uint64_t *)&avi_if; 887 unsigned i; 888 889 intel_dip_infoframe_csum(&avi_if); 890 891 if (!intel_sdvo_set_value(intel_sdvo, 892 SDVO_CMD_SET_HBUF_INDEX, 893 set_buf_index, 2)) 894 return false; 895 896 for (i = 0; i < sizeof(avi_if); i += 8) { 897 if (!intel_sdvo_set_value(intel_sdvo, 898 SDVO_CMD_SET_HBUF_DATA, 899 data, 8)) 900 return false; 901 data++; 902 } 903 904 return intel_sdvo_set_value(intel_sdvo, 905 SDVO_CMD_SET_HBUF_TXRATE, 906 &tx_rate, 1); 907 } 908 909 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) 910 { 911 struct intel_sdvo_tv_format format; 912 uint32_t format_map; 913 914 format_map = 1 << intel_sdvo->tv_format_index; 915 memset(&format, 0, sizeof(format)); 916 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); 917 918 CTASSERT(sizeof(format) == 6); 919 return intel_sdvo_set_value(intel_sdvo, 920 SDVO_CMD_SET_TV_FORMAT, 921 &format, sizeof(format)); 922 } 923 924 static bool 925 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo, 926 const struct drm_display_mode *mode) 927 { 928 struct intel_sdvo_dtd output_dtd; 929 930 if (!intel_sdvo_set_target_output(intel_sdvo, 931 intel_sdvo->attached_output)) 932 return false; 933 934 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 935 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 936 return false; 937 938 return true; 939 } 940 941 static bool 942 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo, 943 const struct drm_display_mode *mode, 944 struct drm_display_mode *adjusted_mode) 945 { 946 /* Reset the input timing to the screen. Assume always input 0. */ 947 if (!intel_sdvo_set_target_input(intel_sdvo)) 948 return false; 949 950 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo, 951 mode->clock / 10, 952 mode->hdisplay, 953 mode->vdisplay)) 954 return false; 955 956 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo, 957 &intel_sdvo->input_dtd)) 958 return false; 959 960 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd); 961 962 return true; 963 } 964 965 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, 966 const struct drm_display_mode *mode, 967 struct drm_display_mode *adjusted_mode) 968 { 969 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); 970 int multiplier; 971 972 /* We need to construct preferred input timings based on our 973 * output timings. To do that, we have to set the output 974 * timings, even though this isn't really the right place in 975 * the sequence to do it. Oh well. 976 */ 977 if (intel_sdvo->is_tv) { 978 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) 979 return false; 980 981 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo, 982 mode, 983 adjusted_mode); 984 } else if (intel_sdvo->is_lvds) { 985 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, 986 intel_sdvo->sdvo_lvds_fixed_mode)) 987 return false; 988 989 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo, 990 mode, 991 adjusted_mode); 992 } 993 994 /* Make the CRTC code factor in the SDVO pixel multiplier. The 995 * SDVO device will factor out the multiplier during mode_set. 996 */ 997 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode); 998 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier); 999 1000 return true; 1001 } 1002 1003 static void intel_sdvo_mode_set(struct drm_encoder *encoder, 1004 struct drm_display_mode *mode, 1005 struct drm_display_mode *adjusted_mode) 1006 { 1007 struct drm_device *dev = encoder->dev; 1008 struct drm_i915_private *dev_priv = dev->dev_private; 1009 struct drm_crtc *crtc = encoder->crtc; 1010 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 1011 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); 1012 u32 sdvox; 1013 struct intel_sdvo_in_out_map in_out; 1014 struct intel_sdvo_dtd input_dtd, output_dtd; 1015 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode); 1016 int rate; 1017 1018 if (!mode) 1019 return; 1020 1021 /* First, set the input mapping for the first input to our controlled 1022 * output. This is only correct if we're a single-input device, in 1023 * which case the first input is the output from the appropriate SDVO 1024 * channel on the motherboard. In a two-input device, the first input 1025 * will be SDVOB and the second SDVOC. 1026 */ 1027 in_out.in0 = intel_sdvo->attached_output; 1028 in_out.in1 = 0; 1029 1030 intel_sdvo_set_value(intel_sdvo, 1031 SDVO_CMD_SET_IN_OUT_MAP, 1032 &in_out, sizeof(in_out)); 1033 1034 /* Set the output timings to the screen */ 1035 if (!intel_sdvo_set_target_output(intel_sdvo, 1036 intel_sdvo->attached_output)) 1037 return; 1038 1039 /* lvds has a special fixed output timing. */ 1040 if (intel_sdvo->is_lvds) 1041 intel_sdvo_get_dtd_from_mode(&output_dtd, 1042 intel_sdvo->sdvo_lvds_fixed_mode); 1043 else 1044 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1045 (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd); 1046 1047 /* Set the input timing to the screen. Assume always input 0. */ 1048 if (!intel_sdvo_set_target_input(intel_sdvo)) 1049 return; 1050 1051 if (intel_sdvo->has_hdmi_monitor) { 1052 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); 1053 intel_sdvo_set_colorimetry(intel_sdvo, 1054 SDVO_COLORIMETRY_RGB256); 1055 intel_sdvo_set_avi_infoframe(intel_sdvo); 1056 } else 1057 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); 1058 1059 if (intel_sdvo->is_tv && 1060 !intel_sdvo_set_tv_format(intel_sdvo)) 1061 return; 1062 1063 /* We have tried to get input timing in mode_fixup, and filled into 1064 * adjusted_mode. 1065 */ 1066 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); 1067 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd); 1068 1069 switch (pixel_multiplier) { 1070 default: 1071 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; 1072 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; 1073 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; 1074 } 1075 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate)) 1076 return; 1077 1078 /* Set the SDVO control regs. */ 1079 if (INTEL_INFO(dev)->gen >= 4) { 1080 /* The real mode polarity is set by the SDVO commands, using 1081 * struct intel_sdvo_dtd. */ 1082 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; 1083 if (intel_sdvo->is_hdmi) 1084 sdvox |= intel_sdvo->color_range; 1085 if (INTEL_INFO(dev)->gen < 5) 1086 sdvox |= SDVO_BORDER_ENABLE; 1087 } else { 1088 sdvox = I915_READ(intel_sdvo->sdvo_reg); 1089 switch (intel_sdvo->sdvo_reg) { 1090 case SDVOB: 1091 sdvox &= SDVOB_PRESERVE_MASK; 1092 break; 1093 case SDVOC: 1094 sdvox &= SDVOC_PRESERVE_MASK; 1095 break; 1096 } 1097 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; 1098 } 1099 1100 if (INTEL_PCH_TYPE(dev) >= PCH_CPT) 1101 sdvox |= TRANSCODER_CPT(intel_crtc->pipe); 1102 else 1103 sdvox |= TRANSCODER(intel_crtc->pipe); 1104 1105 if (intel_sdvo->has_hdmi_audio) 1106 sdvox |= SDVO_AUDIO_ENABLE; 1107 1108 if (INTEL_INFO(dev)->gen >= 4) { 1109 /* done in crtc_mode_set as the dpll_md reg must be written early */ 1110 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { 1111 /* done in crtc_mode_set as it lives inside the dpll register */ 1112 } else { 1113 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT; 1114 } 1115 1116 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && 1117 INTEL_INFO(dev)->gen < 5) 1118 sdvox |= SDVO_STALL_SELECT; 1119 intel_sdvo_write_sdvox(intel_sdvo, sdvox); 1120 } 1121 1122 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode) 1123 { 1124 struct drm_device *dev = encoder->dev; 1125 struct drm_i915_private *dev_priv = dev->dev_private; 1126 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); 1127 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); 1128 u32 temp; 1129 1130 if (mode != DRM_MODE_DPMS_ON) { 1131 intel_sdvo_set_active_outputs(intel_sdvo, 0); 1132 if (0) 1133 intel_sdvo_set_encoder_power_state(intel_sdvo, mode); 1134 1135 if (mode == DRM_MODE_DPMS_OFF) { 1136 temp = I915_READ(intel_sdvo->sdvo_reg); 1137 if ((temp & SDVO_ENABLE) != 0) { 1138 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE); 1139 } 1140 } 1141 } else { 1142 bool input1, input2; 1143 int i; 1144 u8 status; 1145 1146 temp = I915_READ(intel_sdvo->sdvo_reg); 1147 if ((temp & SDVO_ENABLE) == 0) 1148 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE); 1149 for (i = 0; i < 2; i++) 1150 intel_wait_for_vblank(dev, intel_crtc->pipe); 1151 1152 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2); 1153 /* Warn if the device reported failure to sync. 1154 * A lot of SDVO devices fail to notify of sync, but it's 1155 * a given it the status is a success, we succeeded. 1156 */ 1157 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) { 1158 DRM_DEBUG_KMS("First %s output reported failure to " 1159 "sync\n", SDVO_NAME(intel_sdvo)); 1160 } 1161 1162 if (0) 1163 intel_sdvo_set_encoder_power_state(intel_sdvo, mode); 1164 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); 1165 } 1166 return; 1167 } 1168 1169 static int intel_sdvo_mode_valid(struct drm_connector *connector, 1170 struct drm_display_mode *mode) 1171 { 1172 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1173 1174 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 1175 return MODE_NO_DBLESCAN; 1176 1177 if (intel_sdvo->pixel_clock_min > mode->clock) 1178 return MODE_CLOCK_LOW; 1179 1180 if (intel_sdvo->pixel_clock_max < mode->clock) 1181 return MODE_CLOCK_HIGH; 1182 1183 if (intel_sdvo->is_lvds) { 1184 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) 1185 return MODE_PANEL; 1186 1187 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) 1188 return MODE_PANEL; 1189 } 1190 1191 return MODE_OK; 1192 } 1193 1194 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) 1195 { 1196 CTASSERT(sizeof(*caps) == 8); 1197 if (!intel_sdvo_get_value(intel_sdvo, 1198 SDVO_CMD_GET_DEVICE_CAPS, 1199 caps, sizeof(*caps))) 1200 return false; 1201 1202 DRM_DEBUG_KMS("SDVO capabilities:\n" 1203 " vendor_id: %d\n" 1204 " device_id: %d\n" 1205 " device_rev_id: %d\n" 1206 " sdvo_version_major: %d\n" 1207 " sdvo_version_minor: %d\n" 1208 " sdvo_inputs_mask: %d\n" 1209 " smooth_scaling: %d\n" 1210 " sharp_scaling: %d\n" 1211 " up_scaling: %d\n" 1212 " down_scaling: %d\n" 1213 " stall_support: %d\n" 1214 " output_flags: %d\n", 1215 caps->vendor_id, 1216 caps->device_id, 1217 caps->device_rev_id, 1218 caps->sdvo_version_major, 1219 caps->sdvo_version_minor, 1220 caps->sdvo_inputs_mask, 1221 caps->smooth_scaling, 1222 caps->sharp_scaling, 1223 caps->up_scaling, 1224 caps->down_scaling, 1225 caps->stall_support, 1226 caps->output_flags); 1227 1228 return true; 1229 } 1230 1231 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo) 1232 { 1233 struct drm_device *dev = intel_sdvo->base.base.dev; 1234 u8 response[2]; 1235 1236 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise 1237 * on the line. */ 1238 if (IS_I945G(dev) || IS_I945GM(dev)) 1239 return false; 1240 1241 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, 1242 &response, 2) && response[0]; 1243 } 1244 1245 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder) 1246 { 1247 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); 1248 1249 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, 1250 &intel_sdvo->hotplug_active, 2); 1251 } 1252 1253 static bool 1254 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo) 1255 { 1256 /* Is there more than one type of output? */ 1257 return bitcount16(intel_sdvo->caps.output_flags) > 1; 1258 } 1259 1260 static struct edid * 1261 intel_sdvo_get_edid(struct drm_connector *connector) 1262 { 1263 struct intel_sdvo *sdvo = intel_attached_sdvo(connector); 1264 return drm_get_edid(connector, sdvo->ddc); 1265 } 1266 1267 /* Mac mini hack -- use the same DDC as the analog connector */ 1268 static struct edid * 1269 intel_sdvo_get_analog_edid(struct drm_connector *connector) 1270 { 1271 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1272 1273 return drm_get_edid(connector, 1274 dev_priv->gmbus[dev_priv->crt_ddc_pin]); 1275 } 1276 1277 static enum drm_connector_status 1278 intel_sdvo_tmds_sink_detect(struct drm_connector *connector) 1279 { 1280 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1281 enum drm_connector_status status; 1282 struct edid *edid; 1283 1284 edid = intel_sdvo_get_edid(connector); 1285 1286 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { 1287 u8 ddc, saved_ddc = intel_sdvo->ddc_bus; 1288 1289 /* 1290 * Don't use the 1 as the argument of DDC bus switch to get 1291 * the EDID. It is used for SDVO SPD ROM. 1292 */ 1293 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { 1294 intel_sdvo->ddc_bus = ddc; 1295 edid = intel_sdvo_get_edid(connector); 1296 if (edid) 1297 break; 1298 } 1299 /* 1300 * If we found the EDID on the other bus, 1301 * assume that is the correct DDC bus. 1302 */ 1303 if (edid == NULL) 1304 intel_sdvo->ddc_bus = saved_ddc; 1305 } 1306 1307 /* 1308 * When there is no edid and no monitor is connected with VGA 1309 * port, try to use the CRT ddc to read the EDID for DVI-connector. 1310 */ 1311 if (edid == NULL) 1312 edid = intel_sdvo_get_analog_edid(connector); 1313 1314 status = connector_status_unknown; 1315 if (edid != NULL) { 1316 /* DDC bus is shared, match EDID to connector type */ 1317 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 1318 status = connector_status_connected; 1319 if (intel_sdvo->is_hdmi) { 1320 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); 1321 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); 1322 } 1323 } else 1324 status = connector_status_disconnected; 1325 connector->display_info.raw_edid = NULL; 1326 drm_free(edid, DRM_MEM_KMS); 1327 } 1328 1329 if (status == connector_status_connected) { 1330 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1331 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO) 1332 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON); 1333 } 1334 1335 return status; 1336 } 1337 1338 static bool 1339 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, 1340 struct edid *edid) 1341 { 1342 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); 1343 bool connector_is_digital = !!IS_DIGITAL(sdvo); 1344 1345 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n", 1346 connector_is_digital, monitor_is_digital); 1347 return connector_is_digital == monitor_is_digital; 1348 } 1349 1350 static enum drm_connector_status 1351 intel_sdvo_detect(struct drm_connector *connector, bool force) 1352 { 1353 uint16_t response; 1354 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1355 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1356 enum drm_connector_status ret; 1357 1358 if (!intel_sdvo_write_cmd(intel_sdvo, 1359 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0)) 1360 return connector_status_unknown; 1361 1362 /* add 30ms delay when the output type might be TV */ 1363 if (intel_sdvo->caps.output_flags & 1364 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0)) 1365 DELAY(30*1000); 1366 1367 if (!intel_sdvo_read_response(intel_sdvo, &response, 2)) 1368 return connector_status_unknown; 1369 1370 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", 1371 response & 0xff, response >> 8, 1372 intel_sdvo_connector->output_flag); 1373 1374 if (response == 0) 1375 return connector_status_disconnected; 1376 1377 intel_sdvo->attached_output = response; 1378 1379 intel_sdvo->has_hdmi_monitor = false; 1380 intel_sdvo->has_hdmi_audio = false; 1381 1382 if ((intel_sdvo_connector->output_flag & response) == 0) 1383 ret = connector_status_disconnected; 1384 else if (IS_TMDS(intel_sdvo_connector)) 1385 ret = intel_sdvo_tmds_sink_detect(connector); 1386 else { 1387 struct edid *edid; 1388 1389 /* if we have an edid check it matches the connection */ 1390 edid = intel_sdvo_get_edid(connector); 1391 if (edid == NULL) 1392 edid = intel_sdvo_get_analog_edid(connector); 1393 if (edid != NULL) { 1394 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector, 1395 edid)) 1396 ret = connector_status_connected; 1397 else 1398 ret = connector_status_disconnected; 1399 1400 connector->display_info.raw_edid = NULL; 1401 drm_free(edid, DRM_MEM_KMS); 1402 } else 1403 ret = connector_status_connected; 1404 } 1405 1406 /* May update encoder flag for like clock for SDVO TV, etc.*/ 1407 if (ret == connector_status_connected) { 1408 intel_sdvo->is_tv = false; 1409 intel_sdvo->is_lvds = false; 1410 intel_sdvo->base.needs_tv_clock = false; 1411 1412 if (response & SDVO_TV_MASK) { 1413 intel_sdvo->is_tv = true; 1414 intel_sdvo->base.needs_tv_clock = true; 1415 } 1416 if (response & SDVO_LVDS_MASK) 1417 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL; 1418 } 1419 1420 return ret; 1421 } 1422 1423 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) 1424 { 1425 struct edid *edid; 1426 1427 /* set the bus switch and get the modes */ 1428 edid = intel_sdvo_get_edid(connector); 1429 1430 /* 1431 * Mac mini hack. On this device, the DVI-I connector shares one DDC 1432 * link between analog and digital outputs. So, if the regular SDVO 1433 * DDC fails, check to see if the analog output is disconnected, in 1434 * which case we'll look there for the digital DDC data. 1435 */ 1436 if (edid == NULL) 1437 edid = intel_sdvo_get_analog_edid(connector); 1438 1439 if (edid != NULL) { 1440 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector), 1441 edid)) { 1442 drm_mode_connector_update_edid_property(connector, edid); 1443 drm_add_edid_modes(connector, edid); 1444 } 1445 1446 connector->display_info.raw_edid = NULL; 1447 drm_free(edid, DRM_MEM_KMS); 1448 } 1449 } 1450 1451 /* 1452 * Set of SDVO TV modes. 1453 * Note! This is in reply order (see loop in get_tv_modes). 1454 * XXX: all 60Hz refresh? 1455 */ 1456 static const struct drm_display_mode sdvo_tv_modes[] = { 1457 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, 1458 416, 0, 200, 201, 232, 233, 0, 1459 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1460 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, 1461 416, 0, 240, 241, 272, 273, 0, 1462 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1463 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, 1464 496, 0, 300, 301, 332, 333, 0, 1465 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1466 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, 1467 736, 0, 350, 351, 382, 383, 0, 1468 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1469 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, 1470 736, 0, 400, 401, 432, 433, 0, 1471 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1472 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, 1473 736, 0, 480, 481, 512, 513, 0, 1474 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1475 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, 1476 800, 0, 480, 481, 512, 513, 0, 1477 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1478 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, 1479 800, 0, 576, 577, 608, 609, 0, 1480 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1481 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, 1482 816, 0, 350, 351, 382, 383, 0, 1483 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1484 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, 1485 816, 0, 400, 401, 432, 433, 0, 1486 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1487 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, 1488 816, 0, 480, 481, 512, 513, 0, 1489 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1490 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, 1491 816, 0, 540, 541, 572, 573, 0, 1492 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1493 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, 1494 816, 0, 576, 577, 608, 609, 0, 1495 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1496 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, 1497 864, 0, 576, 577, 608, 609, 0, 1498 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1499 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, 1500 896, 0, 600, 601, 632, 633, 0, 1501 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1502 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, 1503 928, 0, 624, 625, 656, 657, 0, 1504 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1505 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, 1506 1016, 0, 766, 767, 798, 799, 0, 1507 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1508 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, 1509 1120, 0, 768, 769, 800, 801, 0, 1510 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1511 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, 1512 1376, 0, 1024, 1025, 1056, 1057, 0, 1513 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1514 }; 1515 1516 static void intel_sdvo_get_tv_modes(struct drm_connector *connector) 1517 { 1518 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1519 struct intel_sdvo_sdtv_resolution_request tv_res; 1520 uint32_t reply = 0, format_map = 0; 1521 int i; 1522 1523 /* Read the list of supported input resolutions for the selected TV 1524 * format. 1525 */ 1526 format_map = 1 << intel_sdvo->tv_format_index; 1527 memcpy(&tv_res, &format_map, 1528 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request))); 1529 1530 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output)) 1531 return; 1532 1533 CTASSERT(sizeof(tv_res) == 3); 1534 if (!intel_sdvo_write_cmd(intel_sdvo, 1535 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, 1536 &tv_res, sizeof(tv_res))) 1537 return; 1538 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3)) 1539 return; 1540 1541 for (i = 0; i < DRM_ARRAY_SIZE(sdvo_tv_modes); i++) 1542 if (reply & (1 << i)) { 1543 struct drm_display_mode *nmode; 1544 nmode = drm_mode_duplicate(connector->dev, 1545 &sdvo_tv_modes[i]); 1546 if (nmode) 1547 drm_mode_probed_add(connector, nmode); 1548 } 1549 } 1550 1551 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) 1552 { 1553 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1554 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1555 struct drm_display_mode *newmode; 1556 1557 /* 1558 * Attempt to get the mode list from DDC. 1559 * Assume that the preferred modes are 1560 * arranged in priority order. 1561 */ 1562 intel_ddc_get_modes(connector, intel_sdvo->i2c); 1563 if (!list_empty(&connector->probed_modes)) 1564 goto end; 1565 1566 /* Fetch modes from VBT */ 1567 if (dev_priv->sdvo_lvds_vbt_mode != NULL) { 1568 newmode = drm_mode_duplicate(connector->dev, 1569 dev_priv->sdvo_lvds_vbt_mode); 1570 if (newmode != NULL) { 1571 /* Guarantee the mode is preferred */ 1572 newmode->type = (DRM_MODE_TYPE_PREFERRED | 1573 DRM_MODE_TYPE_DRIVER); 1574 drm_mode_probed_add(connector, newmode); 1575 } 1576 } 1577 1578 end: 1579 list_for_each_entry(newmode, &connector->probed_modes, head) { 1580 if (newmode->type & DRM_MODE_TYPE_PREFERRED) { 1581 intel_sdvo->sdvo_lvds_fixed_mode = 1582 drm_mode_duplicate(connector->dev, newmode); 1583 1584 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode, 1585 0); 1586 1587 intel_sdvo->is_lvds = true; 1588 break; 1589 } 1590 } 1591 1592 } 1593 1594 static int intel_sdvo_get_modes(struct drm_connector *connector) 1595 { 1596 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1597 1598 if (IS_TV(intel_sdvo_connector)) 1599 intel_sdvo_get_tv_modes(connector); 1600 else if (IS_LVDS(intel_sdvo_connector)) 1601 intel_sdvo_get_lvds_modes(connector); 1602 else 1603 intel_sdvo_get_ddc_modes(connector); 1604 1605 return !list_empty(&connector->probed_modes); 1606 } 1607 1608 static void 1609 intel_sdvo_destroy_enhance_property(struct drm_connector *connector) 1610 { 1611 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1612 struct drm_device *dev = connector->dev; 1613 1614 if (intel_sdvo_connector->left) 1615 drm_property_destroy(dev, intel_sdvo_connector->left); 1616 if (intel_sdvo_connector->right) 1617 drm_property_destroy(dev, intel_sdvo_connector->right); 1618 if (intel_sdvo_connector->top) 1619 drm_property_destroy(dev, intel_sdvo_connector->top); 1620 if (intel_sdvo_connector->bottom) 1621 drm_property_destroy(dev, intel_sdvo_connector->bottom); 1622 if (intel_sdvo_connector->hpos) 1623 drm_property_destroy(dev, intel_sdvo_connector->hpos); 1624 if (intel_sdvo_connector->vpos) 1625 drm_property_destroy(dev, intel_sdvo_connector->vpos); 1626 if (intel_sdvo_connector->saturation) 1627 drm_property_destroy(dev, intel_sdvo_connector->saturation); 1628 if (intel_sdvo_connector->contrast) 1629 drm_property_destroy(dev, intel_sdvo_connector->contrast); 1630 if (intel_sdvo_connector->hue) 1631 drm_property_destroy(dev, intel_sdvo_connector->hue); 1632 if (intel_sdvo_connector->sharpness) 1633 drm_property_destroy(dev, intel_sdvo_connector->sharpness); 1634 if (intel_sdvo_connector->flicker_filter) 1635 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter); 1636 if (intel_sdvo_connector->flicker_filter_2d) 1637 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d); 1638 if (intel_sdvo_connector->flicker_filter_adaptive) 1639 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive); 1640 if (intel_sdvo_connector->tv_luma_filter) 1641 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter); 1642 if (intel_sdvo_connector->tv_chroma_filter) 1643 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter); 1644 if (intel_sdvo_connector->dot_crawl) 1645 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl); 1646 if (intel_sdvo_connector->brightness) 1647 drm_property_destroy(dev, intel_sdvo_connector->brightness); 1648 } 1649 1650 static void intel_sdvo_destroy(struct drm_connector *connector) 1651 { 1652 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1653 1654 if (intel_sdvo_connector->tv_format) 1655 drm_property_destroy(connector->dev, 1656 intel_sdvo_connector->tv_format); 1657 1658 intel_sdvo_destroy_enhance_property(connector); 1659 #if 0 1660 drm_sysfs_connector_remove(connector); 1661 #endif 1662 drm_connector_cleanup(connector); 1663 drm_free(connector, DRM_MEM_KMS); 1664 } 1665 1666 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) 1667 { 1668 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1669 struct edid *edid; 1670 bool has_audio = false; 1671 1672 if (!intel_sdvo->is_hdmi) 1673 return false; 1674 1675 edid = intel_sdvo_get_edid(connector); 1676 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) 1677 has_audio = drm_detect_monitor_audio(edid); 1678 1679 return has_audio; 1680 } 1681 1682 static int 1683 intel_sdvo_set_property(struct drm_connector *connector, 1684 struct drm_property *property, 1685 uint64_t val) 1686 { 1687 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1688 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1689 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1690 uint16_t temp_value; 1691 uint8_t cmd; 1692 int ret; 1693 1694 ret = drm_connector_property_set_value(connector, property, val); 1695 if (ret) 1696 return ret; 1697 1698 if (property == dev_priv->force_audio_property) { 1699 int i = val; 1700 bool has_audio; 1701 1702 if (i == intel_sdvo_connector->force_audio) 1703 return 0; 1704 1705 intel_sdvo_connector->force_audio = i; 1706 1707 if (i == HDMI_AUDIO_AUTO) 1708 has_audio = intel_sdvo_detect_hdmi_audio(connector); 1709 else 1710 has_audio = (i == HDMI_AUDIO_ON); 1711 1712 if (has_audio == intel_sdvo->has_hdmi_audio) 1713 return 0; 1714 1715 intel_sdvo->has_hdmi_audio = has_audio; 1716 goto done; 1717 } 1718 1719 if (property == dev_priv->broadcast_rgb_property) { 1720 if (val == !!intel_sdvo->color_range) 1721 return 0; 1722 1723 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0; 1724 goto done; 1725 } 1726 1727 #define CHECK_PROPERTY(name, NAME) \ 1728 if (intel_sdvo_connector->name == property) { \ 1729 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \ 1730 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \ 1731 cmd = SDVO_CMD_SET_##NAME; \ 1732 intel_sdvo_connector->cur_##name = temp_value; \ 1733 goto set_value; \ 1734 } 1735 1736 if (property == intel_sdvo_connector->tv_format) { 1737 if (val >= TV_FORMAT_NUM) 1738 return -EINVAL; 1739 1740 if (intel_sdvo->tv_format_index == 1741 intel_sdvo_connector->tv_format_supported[val]) 1742 return 0; 1743 1744 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val]; 1745 goto done; 1746 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) { 1747 temp_value = val; 1748 if (intel_sdvo_connector->left == property) { 1749 drm_connector_property_set_value(connector, 1750 intel_sdvo_connector->right, val); 1751 if (intel_sdvo_connector->left_margin == temp_value) 1752 return 0; 1753 1754 intel_sdvo_connector->left_margin = temp_value; 1755 intel_sdvo_connector->right_margin = temp_value; 1756 temp_value = intel_sdvo_connector->max_hscan - 1757 intel_sdvo_connector->left_margin; 1758 cmd = SDVO_CMD_SET_OVERSCAN_H; 1759 goto set_value; 1760 } else if (intel_sdvo_connector->right == property) { 1761 drm_connector_property_set_value(connector, 1762 intel_sdvo_connector->left, val); 1763 if (intel_sdvo_connector->right_margin == temp_value) 1764 return 0; 1765 1766 intel_sdvo_connector->left_margin = temp_value; 1767 intel_sdvo_connector->right_margin = temp_value; 1768 temp_value = intel_sdvo_connector->max_hscan - 1769 intel_sdvo_connector->left_margin; 1770 cmd = SDVO_CMD_SET_OVERSCAN_H; 1771 goto set_value; 1772 } else if (intel_sdvo_connector->top == property) { 1773 drm_connector_property_set_value(connector, 1774 intel_sdvo_connector->bottom, val); 1775 if (intel_sdvo_connector->top_margin == temp_value) 1776 return 0; 1777 1778 intel_sdvo_connector->top_margin = temp_value; 1779 intel_sdvo_connector->bottom_margin = temp_value; 1780 temp_value = intel_sdvo_connector->max_vscan - 1781 intel_sdvo_connector->top_margin; 1782 cmd = SDVO_CMD_SET_OVERSCAN_V; 1783 goto set_value; 1784 } else if (intel_sdvo_connector->bottom == property) { 1785 drm_connector_property_set_value(connector, 1786 intel_sdvo_connector->top, val); 1787 if (intel_sdvo_connector->bottom_margin == temp_value) 1788 return 0; 1789 1790 intel_sdvo_connector->top_margin = temp_value; 1791 intel_sdvo_connector->bottom_margin = temp_value; 1792 temp_value = intel_sdvo_connector->max_vscan - 1793 intel_sdvo_connector->top_margin; 1794 cmd = SDVO_CMD_SET_OVERSCAN_V; 1795 goto set_value; 1796 } 1797 CHECK_PROPERTY(hpos, HPOS) 1798 CHECK_PROPERTY(vpos, VPOS) 1799 CHECK_PROPERTY(saturation, SATURATION) 1800 CHECK_PROPERTY(contrast, CONTRAST) 1801 CHECK_PROPERTY(hue, HUE) 1802 CHECK_PROPERTY(brightness, BRIGHTNESS) 1803 CHECK_PROPERTY(sharpness, SHARPNESS) 1804 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER) 1805 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D) 1806 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE) 1807 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER) 1808 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER) 1809 CHECK_PROPERTY(dot_crawl, DOT_CRAWL) 1810 } 1811 1812 return -EINVAL; /* unknown property */ 1813 1814 set_value: 1815 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2)) 1816 return -EIO; 1817 1818 1819 done: 1820 if (intel_sdvo->base.base.crtc) { 1821 struct drm_crtc *crtc = intel_sdvo->base.base.crtc; 1822 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, 1823 crtc->y, crtc->fb); 1824 } 1825 1826 return 0; 1827 #undef CHECK_PROPERTY 1828 } 1829 1830 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = { 1831 .dpms = intel_sdvo_dpms, 1832 .mode_fixup = intel_sdvo_mode_fixup, 1833 .prepare = intel_encoder_prepare, 1834 .mode_set = intel_sdvo_mode_set, 1835 .commit = intel_encoder_commit, 1836 }; 1837 1838 static const struct drm_connector_funcs intel_sdvo_connector_funcs = { 1839 .dpms = drm_helper_connector_dpms, 1840 .detect = intel_sdvo_detect, 1841 .fill_modes = drm_helper_probe_single_connector_modes, 1842 .set_property = intel_sdvo_set_property, 1843 .destroy = intel_sdvo_destroy, 1844 }; 1845 1846 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { 1847 .get_modes = intel_sdvo_get_modes, 1848 .mode_valid = intel_sdvo_mode_valid, 1849 .best_encoder = intel_best_encoder, 1850 }; 1851 1852 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) 1853 { 1854 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); 1855 1856 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL) 1857 drm_mode_destroy(encoder->dev, 1858 intel_sdvo->sdvo_lvds_fixed_mode); 1859 1860 device_delete_child(intel_sdvo->base.base.dev->device, 1861 intel_sdvo->ddc_iic_bus); 1862 intel_encoder_destroy(encoder); 1863 } 1864 1865 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { 1866 .destroy = intel_sdvo_enc_destroy, 1867 }; 1868 1869 static void 1870 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) 1871 { 1872 uint16_t mask = 0; 1873 unsigned int num_bits; 1874 1875 /* Make a mask of outputs less than or equal to our own priority in the 1876 * list. 1877 */ 1878 switch (sdvo->controlled_output) { 1879 case SDVO_OUTPUT_LVDS1: 1880 mask |= SDVO_OUTPUT_LVDS1; 1881 case SDVO_OUTPUT_LVDS0: 1882 mask |= SDVO_OUTPUT_LVDS0; 1883 case SDVO_OUTPUT_TMDS1: 1884 mask |= SDVO_OUTPUT_TMDS1; 1885 case SDVO_OUTPUT_TMDS0: 1886 mask |= SDVO_OUTPUT_TMDS0; 1887 case SDVO_OUTPUT_RGB1: 1888 mask |= SDVO_OUTPUT_RGB1; 1889 case SDVO_OUTPUT_RGB0: 1890 mask |= SDVO_OUTPUT_RGB0; 1891 break; 1892 } 1893 1894 /* Count bits to find what number we are in the priority list. */ 1895 mask &= sdvo->caps.output_flags; 1896 num_bits = bitcount16(mask); 1897 /* If more than 3 outputs, default to DDC bus 3 for now. */ 1898 if (num_bits > 3) 1899 num_bits = 3; 1900 1901 /* Corresponds to SDVO_CONTROL_BUS_DDCx */ 1902 sdvo->ddc_bus = 1 << num_bits; 1903 } 1904 1905 /** 1906 * Choose the appropriate DDC bus for control bus switch command for this 1907 * SDVO output based on the controlled output. 1908 * 1909 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS 1910 * outputs, then LVDS outputs. 1911 */ 1912 static void 1913 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, 1914 struct intel_sdvo *sdvo, u32 reg) 1915 { 1916 struct sdvo_device_mapping *mapping; 1917 1918 if (IS_SDVOB(reg)) 1919 mapping = &(dev_priv->sdvo_mappings[0]); 1920 else 1921 mapping = &(dev_priv->sdvo_mappings[1]); 1922 1923 if (mapping->initialized) 1924 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); 1925 else 1926 intel_sdvo_guess_ddc_bus(sdvo); 1927 } 1928 1929 static void 1930 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, 1931 struct intel_sdvo *sdvo, u32 reg) 1932 { 1933 struct sdvo_device_mapping *mapping; 1934 u8 pin; 1935 1936 if (IS_SDVOB(reg)) 1937 mapping = &dev_priv->sdvo_mappings[0]; 1938 else 1939 mapping = &dev_priv->sdvo_mappings[1]; 1940 1941 pin = GMBUS_PORT_DPB; 1942 if (mapping->initialized) 1943 pin = mapping->i2c_pin; 1944 1945 if (pin < GMBUS_NUM_PORTS) { 1946 sdvo->i2c = dev_priv->gmbus[pin]; 1947 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ); 1948 intel_gmbus_force_bit(sdvo->i2c, true); 1949 } else { 1950 sdvo->i2c = dev_priv->gmbus[GMBUS_PORT_DPB]; 1951 } 1952 } 1953 1954 static bool 1955 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) 1956 { 1957 return intel_sdvo_check_supp_encode(intel_sdvo); 1958 } 1959 1960 static u8 1961 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg) 1962 { 1963 struct drm_i915_private *dev_priv = dev->dev_private; 1964 struct sdvo_device_mapping *my_mapping, *other_mapping; 1965 1966 if (IS_SDVOB(sdvo_reg)) { 1967 my_mapping = &dev_priv->sdvo_mappings[0]; 1968 other_mapping = &dev_priv->sdvo_mappings[1]; 1969 } else { 1970 my_mapping = &dev_priv->sdvo_mappings[1]; 1971 other_mapping = &dev_priv->sdvo_mappings[0]; 1972 } 1973 1974 /* If the BIOS described our SDVO device, take advantage of it. */ 1975 if (my_mapping->slave_addr) 1976 return my_mapping->slave_addr; 1977 1978 /* If the BIOS only described a different SDVO device, use the 1979 * address that it isn't using. 1980 */ 1981 if (other_mapping->slave_addr) { 1982 if (other_mapping->slave_addr == 0x70) 1983 return 0x72; 1984 else 1985 return 0x70; 1986 } 1987 1988 /* No SDVO device info is found for another DVO port, 1989 * so use mapping assumption we had before BIOS parsing. 1990 */ 1991 if (IS_SDVOB(sdvo_reg)) 1992 return 0x70; 1993 else 1994 return 0x72; 1995 } 1996 1997 static void 1998 intel_sdvo_connector_init(struct intel_sdvo_connector *connector, 1999 struct intel_sdvo *encoder) 2000 { 2001 drm_connector_init(encoder->base.base.dev, 2002 &connector->base.base, 2003 &intel_sdvo_connector_funcs, 2004 connector->base.base.connector_type); 2005 2006 drm_connector_helper_add(&connector->base.base, 2007 &intel_sdvo_connector_helper_funcs); 2008 2009 connector->base.base.interlace_allowed = 1; 2010 connector->base.base.doublescan_allowed = 0; 2011 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; 2012 2013 intel_connector_attach_encoder(&connector->base, &encoder->base); 2014 #if 0 2015 drm_sysfs_connector_add(&connector->base.base); 2016 #endif 2017 } 2018 2019 static void 2020 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector) 2021 { 2022 struct drm_device *dev = connector->base.base.dev; 2023 2024 intel_attach_force_audio_property(&connector->base.base); 2025 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) 2026 intel_attach_broadcast_rgb_property(&connector->base.base); 2027 } 2028 2029 static bool 2030 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) 2031 { 2032 struct drm_encoder *encoder = &intel_sdvo->base.base; 2033 struct drm_connector *connector; 2034 struct intel_encoder *intel_encoder = to_intel_encoder(encoder); 2035 struct intel_connector *intel_connector; 2036 struct intel_sdvo_connector *intel_sdvo_connector; 2037 2038 intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector), 2039 DRM_MEM_KMS, M_WAITOK | M_ZERO); 2040 2041 if (device == 0) { 2042 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; 2043 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; 2044 } else if (device == 1) { 2045 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; 2046 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; 2047 } 2048 2049 intel_connector = &intel_sdvo_connector->base; 2050 connector = &intel_connector->base; 2051 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) { 2052 connector->polled = DRM_CONNECTOR_POLL_HPD; 2053 intel_sdvo->hotplug_active[0] |= 1 << device; 2054 /* Some SDVO devices have one-shot hotplug interrupts. 2055 * Ensure that they get re-enabled when an interrupt happens. 2056 */ 2057 intel_encoder->hot_plug = intel_sdvo_enable_hotplug; 2058 intel_sdvo_enable_hotplug(intel_encoder); 2059 } 2060 else 2061 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; 2062 encoder->encoder_type = DRM_MODE_ENCODER_TMDS; 2063 connector->connector_type = DRM_MODE_CONNECTOR_DVID; 2064 2065 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { 2066 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; 2067 intel_sdvo->is_hdmi = true; 2068 } 2069 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2070 (1 << INTEL_ANALOG_CLONE_BIT)); 2071 2072 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2073 if (intel_sdvo->is_hdmi) 2074 intel_sdvo_add_hdmi_properties(intel_sdvo_connector); 2075 2076 return true; 2077 } 2078 2079 static bool 2080 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) 2081 { 2082 struct drm_encoder *encoder = &intel_sdvo->base.base; 2083 struct drm_connector *connector; 2084 struct intel_connector *intel_connector; 2085 struct intel_sdvo_connector *intel_sdvo_connector; 2086 2087 intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector), 2088 DRM_MEM_KMS, M_WAITOK | M_ZERO); 2089 if (!intel_sdvo_connector) 2090 return false; 2091 2092 intel_connector = &intel_sdvo_connector->base; 2093 connector = &intel_connector->base; 2094 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; 2095 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; 2096 2097 intel_sdvo->controlled_output |= type; 2098 intel_sdvo_connector->output_flag = type; 2099 2100 intel_sdvo->is_tv = true; 2101 intel_sdvo->base.needs_tv_clock = true; 2102 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; 2103 2104 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2105 2106 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type)) 2107 goto err; 2108 2109 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2110 goto err; 2111 2112 return true; 2113 2114 err: 2115 intel_sdvo_destroy(connector); 2116 return false; 2117 } 2118 2119 static bool 2120 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device) 2121 { 2122 struct drm_encoder *encoder = &intel_sdvo->base.base; 2123 struct drm_connector *connector; 2124 struct intel_connector *intel_connector; 2125 struct intel_sdvo_connector *intel_sdvo_connector; 2126 2127 intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector), 2128 DRM_MEM_KMS, M_WAITOK | M_ZERO); 2129 2130 intel_connector = &intel_sdvo_connector->base; 2131 connector = &intel_connector->base; 2132 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 2133 encoder->encoder_type = DRM_MODE_ENCODER_DAC; 2134 connector->connector_type = DRM_MODE_CONNECTOR_VGA; 2135 2136 if (device == 0) { 2137 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; 2138 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; 2139 } else if (device == 1) { 2140 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; 2141 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; 2142 } 2143 2144 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2145 (1 << INTEL_ANALOG_CLONE_BIT)); 2146 2147 intel_sdvo_connector_init(intel_sdvo_connector, 2148 intel_sdvo); 2149 return true; 2150 } 2151 2152 static bool 2153 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) 2154 { 2155 struct drm_encoder *encoder = &intel_sdvo->base.base; 2156 struct drm_connector *connector; 2157 struct intel_connector *intel_connector; 2158 struct intel_sdvo_connector *intel_sdvo_connector; 2159 2160 intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector), 2161 DRM_MEM_KMS, M_WAITOK | M_ZERO); 2162 2163 intel_connector = &intel_sdvo_connector->base; 2164 connector = &intel_connector->base; 2165 encoder->encoder_type = DRM_MODE_ENCODER_LVDS; 2166 connector->connector_type = DRM_MODE_CONNECTOR_LVDS; 2167 2168 if (device == 0) { 2169 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; 2170 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; 2171 } else if (device == 1) { 2172 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; 2173 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; 2174 } 2175 2176 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) | 2177 (1 << INTEL_SDVO_LVDS_CLONE_BIT)); 2178 2179 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2180 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2181 goto err; 2182 2183 return true; 2184 2185 err: 2186 intel_sdvo_destroy(connector); 2187 return false; 2188 } 2189 2190 static bool 2191 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags) 2192 { 2193 intel_sdvo->is_tv = false; 2194 intel_sdvo->base.needs_tv_clock = false; 2195 intel_sdvo->is_lvds = false; 2196 2197 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ 2198 2199 if (flags & SDVO_OUTPUT_TMDS0) 2200 if (!intel_sdvo_dvi_init(intel_sdvo, 0)) 2201 return false; 2202 2203 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) 2204 if (!intel_sdvo_dvi_init(intel_sdvo, 1)) 2205 return false; 2206 2207 /* TV has no XXX1 function block */ 2208 if (flags & SDVO_OUTPUT_SVID0) 2209 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0)) 2210 return false; 2211 2212 if (flags & SDVO_OUTPUT_CVBS0) 2213 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0)) 2214 return false; 2215 2216 if (flags & SDVO_OUTPUT_RGB0) 2217 if (!intel_sdvo_analog_init(intel_sdvo, 0)) 2218 return false; 2219 2220 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) 2221 if (!intel_sdvo_analog_init(intel_sdvo, 1)) 2222 return false; 2223 2224 if (flags & SDVO_OUTPUT_LVDS0) 2225 if (!intel_sdvo_lvds_init(intel_sdvo, 0)) 2226 return false; 2227 2228 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) 2229 if (!intel_sdvo_lvds_init(intel_sdvo, 1)) 2230 return false; 2231 2232 if ((flags & SDVO_OUTPUT_MASK) == 0) { 2233 unsigned char bytes[2]; 2234 2235 intel_sdvo->controlled_output = 0; 2236 memcpy(bytes, &intel_sdvo->caps.output_flags, 2); 2237 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", 2238 SDVO_NAME(intel_sdvo), 2239 bytes[0], bytes[1]); 2240 return false; 2241 } 2242 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); 2243 2244 return true; 2245 } 2246 2247 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 2248 struct intel_sdvo_connector *intel_sdvo_connector, 2249 int type) 2250 { 2251 struct drm_device *dev = intel_sdvo->base.base.dev; 2252 struct intel_sdvo_tv_format format; 2253 uint32_t format_map, i; 2254 2255 if (!intel_sdvo_set_target_output(intel_sdvo, type)) 2256 return false; 2257 2258 CTASSERT(sizeof(format) == 6); 2259 if (!intel_sdvo_get_value(intel_sdvo, 2260 SDVO_CMD_GET_SUPPORTED_TV_FORMATS, 2261 &format, sizeof(format))) 2262 return false; 2263 2264 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); 2265 2266 if (format_map == 0) 2267 return false; 2268 2269 intel_sdvo_connector->format_supported_num = 0; 2270 for (i = 0 ; i < TV_FORMAT_NUM; i++) 2271 if (format_map & (1 << i)) 2272 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i; 2273 2274 2275 intel_sdvo_connector->tv_format = 2276 drm_property_create(dev, DRM_MODE_PROP_ENUM, 2277 "mode", intel_sdvo_connector->format_supported_num); 2278 if (!intel_sdvo_connector->tv_format) 2279 return false; 2280 2281 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) 2282 drm_property_add_enum( 2283 intel_sdvo_connector->tv_format, i, 2284 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]); 2285 2286 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0]; 2287 drm_connector_attach_property(&intel_sdvo_connector->base.base, 2288 intel_sdvo_connector->tv_format, 0); 2289 return true; 2290 2291 } 2292 2293 #define ENHANCEMENT(name, NAME) do { \ 2294 if (enhancements.name) { \ 2295 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ 2296 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ 2297 return false; \ 2298 intel_sdvo_connector->max_##name = data_value[0]; \ 2299 intel_sdvo_connector->cur_##name = response; \ 2300 intel_sdvo_connector->name = \ 2301 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ 2302 if (!intel_sdvo_connector->name) return false; \ 2303 drm_connector_attach_property(connector, \ 2304 intel_sdvo_connector->name, \ 2305 intel_sdvo_connector->cur_##name); \ 2306 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ 2307 data_value[0], data_value[1], response); \ 2308 } \ 2309 } while (0) 2310 2311 static bool 2312 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo, 2313 struct intel_sdvo_connector *intel_sdvo_connector, 2314 struct intel_sdvo_enhancements_reply enhancements) 2315 { 2316 struct drm_device *dev = intel_sdvo->base.base.dev; 2317 struct drm_connector *connector = &intel_sdvo_connector->base.base; 2318 uint16_t response, data_value[2]; 2319 2320 /* when horizontal overscan is supported, Add the left/right property */ 2321 if (enhancements.overscan_h) { 2322 if (!intel_sdvo_get_value(intel_sdvo, 2323 SDVO_CMD_GET_MAX_OVERSCAN_H, 2324 &data_value, 4)) 2325 return false; 2326 2327 if (!intel_sdvo_get_value(intel_sdvo, 2328 SDVO_CMD_GET_OVERSCAN_H, 2329 &response, 2)) 2330 return false; 2331 2332 intel_sdvo_connector->max_hscan = data_value[0]; 2333 intel_sdvo_connector->left_margin = data_value[0] - response; 2334 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin; 2335 intel_sdvo_connector->left = 2336 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); 2337 if (!intel_sdvo_connector->left) 2338 return false; 2339 2340 drm_connector_attach_property(connector, 2341 intel_sdvo_connector->left, 2342 intel_sdvo_connector->left_margin); 2343 2344 intel_sdvo_connector->right = 2345 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); 2346 if (!intel_sdvo_connector->right) 2347 return false; 2348 2349 drm_connector_attach_property(connector, 2350 intel_sdvo_connector->right, 2351 intel_sdvo_connector->right_margin); 2352 DRM_DEBUG_KMS("h_overscan: max %d, " 2353 "default %d, current %d\n", 2354 data_value[0], data_value[1], response); 2355 } 2356 2357 if (enhancements.overscan_v) { 2358 if (!intel_sdvo_get_value(intel_sdvo, 2359 SDVO_CMD_GET_MAX_OVERSCAN_V, 2360 &data_value, 4)) 2361 return false; 2362 2363 if (!intel_sdvo_get_value(intel_sdvo, 2364 SDVO_CMD_GET_OVERSCAN_V, 2365 &response, 2)) 2366 return false; 2367 2368 intel_sdvo_connector->max_vscan = data_value[0]; 2369 intel_sdvo_connector->top_margin = data_value[0] - response; 2370 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin; 2371 intel_sdvo_connector->top = 2372 drm_property_create_range(dev, 0, 2373 "top_margin", 0, data_value[0]); 2374 if (!intel_sdvo_connector->top) 2375 return false; 2376 2377 drm_connector_attach_property(connector, 2378 intel_sdvo_connector->top, 2379 intel_sdvo_connector->top_margin); 2380 2381 intel_sdvo_connector->bottom = 2382 drm_property_create_range(dev, 0, 2383 "bottom_margin", 0, data_value[0]); 2384 if (!intel_sdvo_connector->bottom) 2385 return false; 2386 2387 drm_connector_attach_property(connector, 2388 intel_sdvo_connector->bottom, 2389 intel_sdvo_connector->bottom_margin); 2390 DRM_DEBUG_KMS("v_overscan: max %d, " 2391 "default %d, current %d\n", 2392 data_value[0], data_value[1], response); 2393 } 2394 2395 ENHANCEMENT(hpos, HPOS); 2396 ENHANCEMENT(vpos, VPOS); 2397 ENHANCEMENT(saturation, SATURATION); 2398 ENHANCEMENT(contrast, CONTRAST); 2399 ENHANCEMENT(hue, HUE); 2400 ENHANCEMENT(sharpness, SHARPNESS); 2401 ENHANCEMENT(brightness, BRIGHTNESS); 2402 ENHANCEMENT(flicker_filter, FLICKER_FILTER); 2403 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 2404 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D); 2405 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER); 2406 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER); 2407 2408 if (enhancements.dot_crawl) { 2409 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) 2410 return false; 2411 2412 intel_sdvo_connector->max_dot_crawl = 1; 2413 intel_sdvo_connector->cur_dot_crawl = response & 0x1; 2414 intel_sdvo_connector->dot_crawl = 2415 drm_property_create_range(dev, 0, "dot_crawl", 0, 1); 2416 if (!intel_sdvo_connector->dot_crawl) 2417 return false; 2418 2419 drm_connector_attach_property(connector, 2420 intel_sdvo_connector->dot_crawl, 2421 intel_sdvo_connector->cur_dot_crawl); 2422 DRM_DEBUG_KMS("dot crawl: current %d\n", response); 2423 } 2424 2425 return true; 2426 } 2427 2428 static bool 2429 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo, 2430 struct intel_sdvo_connector *intel_sdvo_connector, 2431 struct intel_sdvo_enhancements_reply enhancements) 2432 { 2433 struct drm_device *dev = intel_sdvo->base.base.dev; 2434 struct drm_connector *connector = &intel_sdvo_connector->base.base; 2435 uint16_t response, data_value[2]; 2436 2437 ENHANCEMENT(brightness, BRIGHTNESS); 2438 2439 return true; 2440 } 2441 #undef ENHANCEMENT 2442 2443 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 2444 struct intel_sdvo_connector *intel_sdvo_connector) 2445 { 2446 union { 2447 struct intel_sdvo_enhancements_reply reply; 2448 uint16_t response; 2449 } enhancements; 2450 2451 CTASSERT(sizeof(enhancements) == 2); 2452 2453 enhancements.response = 0; 2454 intel_sdvo_get_value(intel_sdvo, 2455 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, 2456 &enhancements, sizeof(enhancements)); 2457 if (enhancements.response == 0) { 2458 DRM_DEBUG_KMS("No enhancement is supported\n"); 2459 return true; 2460 } 2461 2462 if (IS_TV(intel_sdvo_connector)) 2463 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply); 2464 else if (IS_LVDS(intel_sdvo_connector)) 2465 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply); 2466 else 2467 return true; 2468 } 2469 2470 struct intel_sdvo_ddc_proxy_sc { 2471 struct intel_sdvo *intel_sdvo; 2472 device_t port; 2473 }; 2474 2475 static int 2476 intel_sdvo_ddc_proxy_probe(device_t idev) 2477 { 2478 2479 return (BUS_PROBE_DEFAULT); 2480 } 2481 2482 static int 2483 intel_sdvo_ddc_proxy_attach(device_t idev) 2484 { 2485 struct intel_sdvo_ddc_proxy_sc *sc; 2486 2487 sc = device_get_softc(idev); 2488 sc->port = device_add_child(idev, "iicbus", -1); 2489 if (sc->port == NULL) 2490 return (ENXIO); 2491 device_quiet(sc->port); 2492 bus_generic_attach(idev); 2493 return (0); 2494 } 2495 2496 static int 2497 intel_sdvo_ddc_proxy_detach(device_t idev) 2498 { 2499 struct intel_sdvo_ddc_proxy_sc *sc; 2500 device_t port; 2501 2502 sc = device_get_softc(idev); 2503 port = sc->port; 2504 bus_generic_detach(idev); 2505 if (port != NULL) 2506 device_delete_child(idev, port); 2507 return (0); 2508 } 2509 2510 static int 2511 intel_sdvo_ddc_proxy_reset(device_t idev, u_char speed, u_char addr, 2512 u_char *oldaddr) 2513 { 2514 struct intel_sdvo_ddc_proxy_sc *sc; 2515 struct intel_sdvo *sdvo; 2516 2517 sc = device_get_softc(idev); 2518 sdvo = sc->intel_sdvo; 2519 2520 return (IICBUS_RESET(device_get_parent(sdvo->i2c), speed, addr, 2521 oldaddr)); 2522 } 2523 2524 static int 2525 intel_sdvo_ddc_proxy_transfer(device_t idev, struct iic_msg *msgs, uint32_t num) 2526 { 2527 struct intel_sdvo_ddc_proxy_sc *sc; 2528 struct intel_sdvo *sdvo; 2529 2530 sc = device_get_softc(idev); 2531 sdvo = sc->intel_sdvo; 2532 2533 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) 2534 return (EIO); 2535 2536 return (iicbus_transfer(sdvo->i2c, msgs, num)); 2537 } 2538 2539 static bool 2540 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, struct drm_device *dev, 2541 int sdvo_reg) 2542 { 2543 struct intel_sdvo_ddc_proxy_sc *sc; 2544 int ret; 2545 2546 sdvo->ddc_iic_bus = device_add_child(dev->device, 2547 "intel_sdvo_ddc_proxy", sdvo_reg); 2548 if (sdvo->ddc_iic_bus == NULL) { 2549 DRM_ERROR("cannot create ddc proxy bus %d\n", sdvo_reg); 2550 return (false); 2551 } 2552 device_quiet(sdvo->ddc_iic_bus); 2553 ret = device_probe_and_attach(sdvo->ddc_iic_bus); 2554 if (ret != 0) { 2555 DRM_ERROR("cannot attach proxy bus %d error %d\n", 2556 sdvo_reg, ret); 2557 device_delete_child(dev->device, sdvo->ddc_iic_bus); 2558 return (false); 2559 } 2560 sc = device_get_softc(sdvo->ddc_iic_bus); 2561 sc->intel_sdvo = sdvo; 2562 2563 sdvo->ddc = sc->port; 2564 return (true); 2565 } 2566 2567 static device_method_t intel_sdvo_ddc_proxy_methods[] = { 2568 DEVMETHOD(device_probe, intel_sdvo_ddc_proxy_probe), 2569 DEVMETHOD(device_attach, intel_sdvo_ddc_proxy_attach), 2570 DEVMETHOD(device_detach, intel_sdvo_ddc_proxy_detach), 2571 DEVMETHOD(iicbus_reset, intel_sdvo_ddc_proxy_reset), 2572 DEVMETHOD(iicbus_transfer, intel_sdvo_ddc_proxy_transfer), 2573 DEVMETHOD_END 2574 }; 2575 static driver_t intel_sdvo_ddc_proxy_driver = { 2576 "intel_sdvo_ddc_proxy", 2577 intel_sdvo_ddc_proxy_methods, 2578 sizeof(struct intel_sdvo_ddc_proxy_sc) 2579 }; 2580 static devclass_t intel_sdvo_devclass; 2581 DRIVER_MODULE_ORDERED(intel_sdvo_ddc_proxy, drm, intel_sdvo_ddc_proxy_driver, 2582 intel_sdvo_devclass, 0, 0, SI_ORDER_FIRST); 2583 2584 2585 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg) 2586 { 2587 struct drm_i915_private *dev_priv = dev->dev_private; 2588 struct intel_encoder *intel_encoder; 2589 struct intel_sdvo *intel_sdvo; 2590 int i; 2591 2592 intel_sdvo = kmalloc(sizeof(struct intel_sdvo), DRM_MEM_KMS, 2593 M_WAITOK | M_ZERO); 2594 2595 intel_sdvo->sdvo_reg = sdvo_reg; 2596 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1; 2597 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg); 2598 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev, sdvo_reg)) { 2599 drm_free(intel_sdvo, DRM_MEM_KMS); 2600 return false; 2601 } 2602 2603 /* encoder type will be decided later */ 2604 intel_encoder = &intel_sdvo->base; 2605 intel_encoder->type = INTEL_OUTPUT_SDVO; 2606 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0); 2607 2608 /* Read the regs to test if we can talk to the device */ 2609 for (i = 0; i < 0x40; i++) { 2610 u8 byte; 2611 2612 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { 2613 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n", 2614 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2615 goto err; 2616 } 2617 } 2618 2619 if (IS_SDVOB(sdvo_reg)) 2620 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS; 2621 else 2622 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS; 2623 2624 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs); 2625 2626 /* In default case sdvo lvds is false */ 2627 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) 2628 goto err; 2629 2630 /* Set up hotplug command - note paranoia about contents of reply. 2631 * We assume that the hardware is in a sane state, and only touch 2632 * the bits we think we understand. 2633 */ 2634 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, 2635 &intel_sdvo->hotplug_active, 2); 2636 intel_sdvo->hotplug_active[0] &= ~0x3; 2637 2638 if (!intel_sdvo_output_setup(intel_sdvo, 2639 intel_sdvo->caps.output_flags)) { 2640 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n", 2641 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2642 goto err; 2643 } 2644 2645 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg); 2646 2647 /* Set the input timing to the screen. Assume always input 0. */ 2648 if (!intel_sdvo_set_target_input(intel_sdvo)) 2649 goto err; 2650 2651 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, 2652 &intel_sdvo->pixel_clock_min, 2653 &intel_sdvo->pixel_clock_max)) 2654 goto err; 2655 2656 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " 2657 "clock range %dMHz - %dMHz, " 2658 "input 1: %c, input 2: %c, " 2659 "output 1: %c, output 2: %c\n", 2660 SDVO_NAME(intel_sdvo), 2661 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, 2662 intel_sdvo->caps.device_rev_id, 2663 intel_sdvo->pixel_clock_min / 1000, 2664 intel_sdvo->pixel_clock_max / 1000, 2665 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', 2666 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', 2667 /* check currently supported outputs */ 2668 intel_sdvo->caps.output_flags & 2669 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', 2670 intel_sdvo->caps.output_flags & 2671 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 2672 return true; 2673 2674 err: 2675 drm_encoder_cleanup(&intel_encoder->base); 2676 drm_free(intel_sdvo, DRM_MEM_KMS); 2677 2678 return false; 2679 } 2680