1 /* 2 * Copyright (c) 2014-2015 François Tigeot 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #ifndef _ASM_IO_H_ 28 #define _ASM_IO_H_ 29 30 #include <machine/pmap.h> 31 #include <vm/vm.h> 32 33 #include <asm/page.h> 34 35 #define ioread8(addr) *(volatile uint8_t *)((char *)addr) 36 #define ioread16(addr) *(volatile uint16_t *)((char *)addr) 37 #define ioread32(addr) *(volatile uint32_t *)((char *)addr) 38 39 #define iowrite8(data, addr) \ 40 do { \ 41 *(volatile uint8_t *)((char *)addr) = data; \ 42 } while (0) 43 44 #define iowrite16(data, addr) \ 45 do { \ 46 *(volatile uint16_t *)((char *)addr) = data; \ 47 } while (0) 48 49 #define iowrite32(data, addr) \ 50 do { \ 51 *(volatile uint32_t *)((char *)addr) = data; \ 52 } while (0) 53 54 #include <linux/vmalloc.h> 55 56 /* ioremap function family: map bus addresses into CPU space */ 57 static inline void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size) 58 { 59 return pmap_mapdev_uncacheable(offset, size); 60 } 61 62 static inline void __iomem *ioremap_wc(resource_size_t phys_addr, unsigned long size) 63 { 64 return pmap_mapdev_attr(phys_addr, size, VM_MEMATTR_WRITE_COMBINING); 65 } 66 67 static inline void __iomem *ioremap(resource_size_t offset, unsigned long size) 68 { 69 return ioremap_nocache(offset, size); 70 } 71 72 static inline void iounmap(void __iomem *ptr, unsigned long size) 73 { 74 pmap_unmapdev((vm_offset_t) ptr, size); 75 } 76 77 #define mmiowb cpu_sfence 78 79 #endif /* _ASM_IO_H_ */ 80