1 /* 2 * Copyright (c) 2014-2019 François Tigeot <ftigeot@wolfpond.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #ifndef LINUX_PCI_H 28 #define LINUX_PCI_H 29 30 #include <linux/mod_devicetable.h> 31 32 #include <linux/types.h> 33 #include <linux/init.h> 34 #include <linux/list.h> 35 #include <linux/compiler.h> 36 #include <linux/errno.h> 37 #include <linux/kobject.h> 38 #include <linux/atomic.h> 39 #include <linux/device.h> 40 #include <linux/io.h> 41 #include <uapi/linux/pci.h> 42 43 #include <linux/pci_ids.h> 44 45 #include <sys/pciio.h> 46 #include <sys/rman.h> 47 #include <bus/pci/pcivar.h> 48 #include <bus/pci/pcireg.h> 49 50 #define PCI_ANY_ID (~0u) 51 52 struct pci_bus; 53 struct device_node; 54 55 struct pci_device_id { 56 uint32_t vendor; 57 uint32_t device; 58 uint32_t subvendor; 59 uint32_t subdevice; 60 uint32_t class; 61 uint32_t class_mask; 62 unsigned long driver_data; 63 }; 64 65 struct pci_dev { 66 struct pci_bus *bus; /* bus device is nailed to */ 67 struct device dev; 68 69 uint32_t devfn; 70 uint16_t vendor; /* vendor ID */ 71 uint16_t device; /* device ID */ 72 uint16_t subsystem_vendor; 73 uint16_t subsystem_device; 74 75 uint8_t revision; /* revision ID */ 76 77 unsigned int irq; /* handle with care */ 78 void *pci_dev_data; 79 80 unsigned int no_64bit_msi:1; 81 82 /* DragonFly-specific data */ 83 int _irq_type; 84 struct resource *_irqr; 85 int _irqrid; 86 }; 87 88 struct pci_bus { 89 struct pci_dev *self; /* handle to pdev self */ 90 struct device *dev; /* handle to dev */ 91 92 unsigned char number; /* bus addr number */ 93 }; 94 95 struct pci_driver { 96 const char *name; 97 const struct pci_device_id *id_table; 98 int (*probe)(struct pci_dev *dev, const struct pci_device_id *id); 99 void (*remove)(struct pci_dev *dev); 100 }; 101 102 #define PCI_DMA_BIDIRECTIONAL 0 103 104 /* extracted from radeon/si.c radeon/cik.c */ 105 #define PCI_EXP_LNKCTL PCIER_LINKCTRL /* 16 */ 106 #define PCI_EXP_LNKCTL2 48 107 #define PCI_EXP_LNKCTL_HAWD PCIEM_LNKCTL_HAWD /* 0x0200 */ 108 #define PCI_EXP_DEVSTA PCIER_DEVSTS /* 10 */ 109 #define PCI_EXP_DEVSTA_TRPND 0x0020 110 #define PCI_EXP_LNKCAP_CLKPM 0x00040000 111 112 static inline int 113 pci_read_config_byte(struct pci_dev *pdev, int where, u8 *val) 114 { 115 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1); 116 return 0; 117 } 118 119 static inline int 120 pci_read_config_word(struct pci_dev *pdev, int where, u16 *val) 121 { 122 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2); 123 return 0; 124 } 125 126 static inline int 127 pci_read_config_dword(struct pci_dev *pdev, int where, u32 *val) 128 { 129 *val = (u32)pci_read_config(pdev->dev.bsddev, where, 4); 130 return 0; 131 } 132 133 static inline int 134 pci_write_config_byte(struct pci_dev *pdev, int where, u8 val) 135 { 136 pci_write_config(pdev->dev.bsddev, where, val, 1); 137 return 0; 138 } 139 140 static inline int 141 pci_write_config_word(struct pci_dev *pdev, int where, u16 val) 142 { 143 pci_write_config(pdev->dev.bsddev, where, val, 2); 144 return 0; 145 } 146 147 static inline int 148 pci_write_config_dword(struct pci_dev *pdev, int where, u32 val) 149 { 150 pci_write_config(pdev->dev.bsddev, where, val, 4); 151 return 0; 152 } 153 154 /* extracted from drm/radeon/evergreen.c */ 155 static inline int 156 pcie_get_readrq(struct pci_dev *pdev) 157 { 158 u16 ctl; 159 int err, cap; 160 161 err = pci_find_extcap(pdev->dev.bsddev, PCIY_EXPRESS, &cap); 162 163 cap += PCIER_DEVCTRL; 164 165 ctl = pci_read_config(pdev->dev.bsddev, cap, 2); 166 167 return 128 << ((ctl & PCIEM_DEVCTL_MAX_READRQ_MASK) >> 12); 168 } 169 170 /* valid rq sizes: 128, 256, 512, 1024, 2048, 4096 (^2N) */ 171 static inline int 172 pcie_set_readrq(struct pci_dev *pdev, int rq) 173 { 174 u16 ctl; 175 int err, cap; 176 177 if (rq < 128 || rq > 4096 || !is_power_of_2(rq)) 178 return -EINVAL; 179 180 err = pci_find_extcap(pdev->dev.bsddev, PCIY_EXPRESS, &cap); 181 if (err) 182 return (-1); 183 184 cap += PCIER_DEVCTRL; 185 186 ctl = pci_read_config(pdev->dev.bsddev, cap, 2); 187 ctl &= ~PCIEM_DEVCTL_MAX_READRQ_MASK; 188 ctl |= ((ffs(rq) - 8) << 12); 189 pci_write_config(pdev->dev.bsddev, cap, ctl, 2); 190 return 0; 191 } 192 193 static inline struct pci_dev * 194 pci_dev_get(struct pci_dev *dev) 195 { 196 /* Linux increments a reference count here */ 197 return dev; 198 } 199 200 static inline struct pci_dev * 201 pci_dev_put(struct pci_dev *dev) 202 { 203 /* Linux decrements a reference count here */ 204 return dev; 205 } 206 207 208 static inline int 209 pci_set_dma_mask(struct pci_dev *dev, u64 mask) 210 { 211 return -EIO; 212 } 213 214 static inline int 215 pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) 216 { 217 return -EIO; 218 } 219 220 typedef int pci_power_t; 221 222 #define PCI_D0 0 223 #define PCI_D1 1 224 #define PCI_D2 2 225 #define PCI_D3hot 3 226 #define PCI_D3cold 4 227 228 #include <asm/pci.h> 229 230 static inline struct resource_list_entry* 231 _pci_get_rle(struct pci_dev *pdev, int bar) 232 { 233 struct pci_devinfo *dinfo; 234 device_t dev = pdev->dev.bsddev; 235 struct resource_list_entry *rle; 236 237 dinfo = device_get_ivars(dev); 238 239 /* Some child devices don't have registered resources, they 240 * are only present in the parent */ 241 if (dinfo == NULL) 242 dev = device_get_parent(dev); 243 dinfo = device_get_ivars(dev); 244 if (dinfo == NULL) 245 return NULL; 246 247 rle = resource_list_find(&dinfo->resources, SYS_RES_MEMORY, PCIR_BAR(bar)); 248 if (rle == NULL) { 249 rle = resource_list_find(&dinfo->resources, 250 SYS_RES_IOPORT, PCIR_BAR(bar)); 251 } 252 253 return rle; 254 } 255 256 /* 257 * Returns the first address (memory address or I/O port number) 258 * associated with one of the PCI I/O regions.The region is selected by 259 * the integer bar (the base address register), ranging from 0–5 (inclusive). 260 * The return value can be used by ioremap() 261 */ 262 static inline phys_addr_t 263 pci_resource_start(struct pci_dev *pdev, int bar) 264 { 265 struct resource *res; 266 int rid; 267 268 rid = PCIR_BAR(bar); 269 res = bus_alloc_resource_any(pdev->dev.bsddev, SYS_RES_MEMORY, &rid, RF_SHAREABLE); 270 if (res == NULL) { 271 kprintf("pci_resource_start(0x%p, 0x%x) failed\n", pdev, PCIR_BAR(bar)); 272 return -1; 273 } 274 275 return rman_get_start(res); 276 } 277 278 static inline phys_addr_t 279 pci_resource_len(struct pci_dev *pdev, int bar) 280 { 281 struct resource_list_entry *rle; 282 283 rle = _pci_get_rle(pdev, bar); 284 if (rle == NULL) 285 return -1; 286 287 return rman_get_size(rle->res); 288 } 289 290 static inline void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) 291 { 292 resource_size_t base, size; 293 294 base = pci_resource_start(dev, bar); 295 size = pci_resource_len(dev, bar); 296 297 if (base == 0) 298 return NULL; 299 300 if (maxlen && size > maxlen) 301 size = maxlen; 302 303 return ioremap(base, size); 304 } 305 306 static inline int 307 pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 *val) 308 { 309 const struct pci_dev *pdev = container_of(&bus, struct pci_dev, bus); 310 311 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1); 312 return 0; 313 } 314 315 static inline int 316 pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 *val) 317 { 318 const struct pci_dev *pdev = container_of(&bus, struct pci_dev, bus); 319 320 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2); 321 return 0; 322 } 323 324 static inline const char * 325 pci_name(struct pci_dev *pdev) 326 { 327 return device_get_desc(pdev->dev.bsddev); 328 } 329 330 static inline void * 331 pci_get_drvdata(struct pci_dev *pdev) 332 { 333 return pdev->pci_dev_data; 334 } 335 336 static inline void 337 pci_set_drvdata(struct pci_dev *pdev, void *data) 338 { 339 pdev->pci_dev_data = data; 340 } 341 342 static inline int 343 pci_register_driver(struct pci_driver *drv) 344 { 345 /* pci_register_driver not implemented */ 346 return 0; 347 } 348 349 static inline void 350 pci_unregister_driver(struct pci_driver *dev) 351 { 352 /* pci_unregister_driver not implemented */ 353 } 354 355 static inline void 356 pci_clear_master(struct pci_dev *pdev) 357 { 358 pci_disable_busmaster(pdev->dev.bsddev); 359 } 360 361 static inline void 362 pci_set_master(struct pci_dev *pdev) 363 { 364 pci_enable_busmaster(pdev->dev.bsddev); 365 } 366 367 static inline int 368 pci_pcie_cap(struct pci_dev *pdev) 369 { 370 return pci_get_pciecap_ptr(pdev->dev.bsddev); 371 } 372 373 /* DRM_MAX_PCI_RESOURCE */ 374 #define DEVICE_COUNT_RESOURCE 6 375 376 #include <uapi/linux/pci_regs.h> 377 378 /* From FreeBSD */ 379 static inline bool pcie_cap_has_devctl(const struct pci_dev *dev) 380 { 381 return true; 382 } 383 384 static inline int 385 pci_find_capability(struct pci_dev *pdev, int capid) 386 { 387 int reg; 388 389 if (pci_find_extcap(pdev->dev.bsddev, capid, ®)) 390 return (0); 391 return (reg); 392 } 393 394 static inline u16 pcie_flags_reg(struct pci_dev *dev) 395 { 396 int pos; 397 u16 reg16; 398 399 pos = pci_find_capability(dev, PCI_CAP_ID_EXP); 400 if (!pos) 401 return 0; 402 403 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16); 404 405 return reg16; 406 } 407 408 static inline int pci_pcie_type(struct pci_dev *dev) 409 { 410 return (pcie_flags_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4; 411 } 412 413 414 static inline int pcie_cap_version(struct pci_dev *dev) 415 { 416 return pcie_flags_reg(dev) & PCI_EXP_FLAGS_VERS; 417 } 418 419 static inline bool pcie_cap_has_lnkctl(struct pci_dev *dev) 420 { 421 int type = pci_pcie_type(dev); 422 423 return pcie_cap_version(dev) > 1 || 424 type == PCI_EXP_TYPE_ROOT_PORT || 425 type == PCI_EXP_TYPE_ENDPOINT || 426 type == PCI_EXP_TYPE_LEG_END; 427 } 428 429 static inline bool pcie_cap_has_sltctl(struct pci_dev *dev) 430 { 431 int type = pci_pcie_type(dev); 432 433 return pcie_cap_version(dev) > 1 || type == PCI_EXP_TYPE_ROOT_PORT || 434 (type == PCI_EXP_TYPE_DOWNSTREAM && 435 pcie_flags_reg(dev) & PCI_EXP_FLAGS_SLOT); 436 } 437 438 static inline bool pcie_cap_has_rtctl(struct pci_dev *dev) 439 { 440 int type = pci_pcie_type(dev); 441 442 return pcie_cap_version(dev) > 1 || type == PCI_EXP_TYPE_ROOT_PORT || 443 type == PCI_EXP_TYPE_RC_EC; 444 } 445 446 static inline bool 447 pcie_capability_reg_implemented(struct pci_dev *dev, int pos) 448 { 449 if (!pci_is_pcie(dev->dev.bsddev)) 450 return false; 451 452 switch (pos) { 453 case PCI_EXP_FLAGS_TYPE: 454 return true; 455 case PCI_EXP_DEVCAP: 456 case PCI_EXP_DEVCTL: 457 case PCI_EXP_DEVSTA: 458 return pcie_cap_has_devctl(dev); 459 case PCI_EXP_LNKCAP: 460 case PCI_EXP_LNKCTL: 461 case PCI_EXP_LNKSTA: 462 return pcie_cap_has_lnkctl(dev); 463 case PCI_EXP_SLTCAP: 464 case PCI_EXP_SLTCTL: 465 case PCI_EXP_SLTSTA: 466 return pcie_cap_has_sltctl(dev); 467 case PCI_EXP_RTCTL: 468 case PCI_EXP_RTCAP: 469 case PCI_EXP_RTSTA: 470 return pcie_cap_has_rtctl(dev); 471 case PCI_EXP_DEVCAP2: 472 case PCI_EXP_DEVCTL2: 473 case PCI_EXP_LNKCAP2: 474 case PCI_EXP_LNKCTL2: 475 case PCI_EXP_LNKSTA2: 476 return pcie_cap_version(dev) > 1; 477 default: 478 return false; 479 } 480 } 481 482 static inline void __iomem __must_check * 483 pci_map_rom(struct pci_dev *pdev, size_t *size) 484 { 485 return vga_pci_map_bios(device_get_parent(pdev->dev.bsddev), size); 486 } 487 488 static inline void 489 pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom) 490 { 491 vga_pci_unmap_bios(device_get_parent(pdev->dev.bsddev), rom); 492 } 493 494 #include <linux/pci-dma-compat.h> 495 496 #endif /* LINUX_PCI_H */ 497